Patents by Inventor Ching-Yu Chang

Ching-Yu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • BUMP STRUCTURE AND METHOD OF MANUFACTURING BUMP STRUCTURE
    Publication number: 20220406741
    Abstract: A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.
    Type: Application
    Filed: July 27, 2022
    Publication date: December 22, 2022
    Inventors: Ching-Yu CHANG, Ming-Da CHENG, Ming-Hui WENG
  • METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
    Publication number: 20220392763
    Abstract: A method of manufacturing a semiconductor device includes forming a first protective layer over an edge portion of a first main surface of a semiconductor substrate. A metal-containing photoresist layer is formed over the first main surface of the semiconductor substrate. The first protective layer is removed, and the metal-containing photoresist layer is selectively exposed to actinic radiation. A second protective layer is formed over the edge portion of the first main surface of the semiconductor substrate. The selectively exposed photoresist layer is developed to form a patterned photoresist layer, and the second protective layer is removed.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 8, 2022
    Inventors: An-Ren ZI, Ching-Yu CHANG, Chin-Hsiang LIN
  • UNDERLAYER OF MULTILAYER STRUCTURE AND METHODS OF USE THEREOF
    Publication number: 20220392764
    Abstract: A method includes providing a layered structure on a substrate, the layered structure including a bottom layer formed over the substrate and a photoresist layer formed over the bottom layer, exposing the photoresist layer to a radiation source, developing the photoresist layer, patterning the bottom layer and removing portions of the substrate through openings in the patterned bottom layer. In some embodiments, a middle layer is provided between the bottom layer and the photoresist layer. The material of the bottom layer includes at least one cross-linking agent that has been functionalized to decrease its affinity to other materials in the bottom layer.
    Type: Application
    Filed: September 22, 2021
    Publication date: December 8, 2022
    Inventors: Jing-Hong HUANG, Wei-Han LAI, Ching-Yu CHANG
  • MATERIALS AND METHODS FOR FORMING RESIST BOTTOM LAYER
    Publication number: 20220373891
    Abstract: A method includes forming a bottom layer over a semiconductor substrate, where the bottom layer includes a polymer bonded to a first cross-linker and a second cross-linker, the first cross-linker being configured to be activated by ultraviolet (UV) radiation and the second cross-linker being configured to be activated by heat at a first temperature. The method then proceeds to exposing the bottom layer to a UV source to activate the first cross-linker, resulting in an exposed bottom layer, where the exposing activates the first cross-linker. The method further includes baking the exposed bottom layer, where the baking activates the second cross-linker.
    Type: Application
    Filed: July 25, 2022
    Publication date: November 24, 2022
    Inventors: Jing Hong Huang, Chien-Wei Wang, Shang-Wern Chang, Ching-Yu Chang
  • METHOD AND APPARATUS OF PATTERNING A SEMICONDUCTOR DEVICE
    Publication number: 20220365437
    Abstract: A method of forming a masking element is provided. The method includes forming a photoresist material having a polymer backbone over a substrate, where the polymer backbone includes a linking group that links a first polymer segment to a second polymer segment, each of the first and the second polymer segments having an ultraviolet (UV) curable group. The method includes exposing the photoresist material under a first UV radiation to break the link between the first polymer segment and the second polymer segment. The method includes exposing the photoresist material under a second UV radiation different from the first UV radiation to form a patterned resist layer. And the method includes developing the patterned resist layer to form a masking element.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Inventors: An-Ren Zi, Ching-Yu Chang
  • SPIN ON CARBON COMPOSITION AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
    Publication number: 20220367178
    Abstract: A spin on carbon composition, comprises: a carbon backbone polymer; a first crosslinker; and a second crosslinker. The first crosslinker reacts with the carbon backbone polymer to partially crosslink the carbon backbone polymer at a first temperature, and the second crosslinker reacts with the carbon backbone polymer to further crosslink the carbon backbone polymer at a second temperature higher than the first temperature. The first crosslinker is a monomer, oligomer, or polymer. The second crosslinker is a monomer, oligomer, or polymer. The first and second crosslinkers are different from each other. When either of the first crosslinker or the second crosslinker is a polymer, the polymer is a different polymer than the carbon backbone polymer.
    Type: Application
    Filed: July 13, 2022
    Publication date: November 17, 2022
    Inventors: Jing Hong HUANG, Ching-Yu CHANG, Wei-Han LAI
  • Semiconductor Device and Method
    Publication number: 20220367179
    Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: Ching-Yu Chang, Jei Ming Chen, Tze-Liang Lee
  • Methods of Determining Process Recipes and Forming a Semiconductor Device
    Publication number: 20220367293
    Abstract: In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.
    Type: Application
    Filed: October 4, 2021
    Publication date: November 17, 2022
    Inventors: Jung-Hau Shiu, Ching-Yu Chang, Jei Ming Chen, Jr-Yu Chen, Tze-Liang Lee
  • PHOTORESIST MATERIALS AND ASSOCIATED METHODS
    Publication number: 20220365428
    Abstract: Photoresist materials described herein may include various types of tin (Sn) clusters having one or more types of ligands. As an example, a photoresist material described herein may include tin clusters bearing two or more different types of carboxylate ligands. As another example, a photoresist material described herein may include tin oxide clusters that include carbonate ligands. The two or more different types of carboxylate ligands and the carbonate ligands may reduce, minimize, and/or prevent crystallization of the photoresist materials described herein, which may increase the coating performance of the photoresist materials and may decrease the surface roughness of photoresist layers formed using the photoresist materials described herein.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 17, 2022
    Inventors: Ming-Hui WENG, Yahru CHENG, Ching-Yu CHANG
  • NEGATIVE TONE PHOTORESIST FOR EUV LITHOGRAPHY
    Publication number: 20220365430
    Abstract: A negative tone photoresist and method for developing the negative tone photoresist is disclosed. For example, the negative tone photoresist includes a solvent, a dissolution inhibitor, and a polymer. The polymer includes a hydroxyl group. The polymer may be greater than 40 weight percent of a total weight of the negative tone photoresist.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Po YANG, Wei-Han LAI, Ching-Yu CHANG
  • PHOTORESIST COMPOSITION AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
    Publication number: 20220365427
    Abstract: A method for manufacturing a semiconductor device includes forming a resist layer including a resist composition over a substrate. The resist composition includes: a metal, a ligand, and a solvent. The solvent is mixture of a first solvent having a vapor pressure of at least 0.75 kPa, wherein the first solvent is one or more of an ether, an ester, an alkane, an aldehyde, or a ketone, and a second solvent different from the first solvent. Alternatively, the solvent is a third solvent, wherein the third solvent is a C4-C14 tertiary alcohol. The resist layer is patterned.
    Type: Application
    Filed: April 30, 2021
    Publication date: November 17, 2022
    Inventors: An-Ren ZI, Ching-Yu CHANG
  • METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
    Publication number: 20220359190
    Abstract: Method of manufacturing a semiconductor device, includes forming a protective layer over substrate having a plurality of protrusions and recesses. The protective layer includes polymer composition including polymer having repeating units of one or more of: Wherein a, b, c, d, e, f, g, h, and i are each independently H, —OH, —ROH, —R(OH)2, —NH2, —NHR, —NR2, —SH, —RSH, or —R(SH)2, wherein at least one of a, b, c, d, e, f, g, h, and i on each repeating unit is not H. R, R1, and R2 are each independently a C1-C10 alkyl group, a C3-C10 cycloalkyl group, a C1-C10 hydroxyalkyl group, a C2-C10 alkoxy group, a C2-C10 alkoxy alkyl group, a C2-C10 acetyl group, a C3-C10 acetylalkyl group, a C1-C10 carboxyl group, a C2-C10 alkyl carboxyl group, or a C4-C10 cycloalkyl carboxyl group, and n is 2-1000. A resist layer is formed over the protective layer, and the resist layer is patterned.
    Type: Application
    Filed: April 23, 2021
    Publication date: November 10, 2022
    Inventors: Jing Hong Huang, Wei-Han Lai, Ching-Yu Chang
  • Method for forming semiconductor structure by patterning resist layer having inorganic material
    Patent number: 11495460
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate, and forming a first layer over the material layer. The method also includes forming a second layer over the first layer, and the second layer includes an auxiliary. The method further includes forming a third layer over the second layer, and the third layer includes an inorganic material, the inorganic material includes a plurality of metallic cores, and a plurality of first linkers bonded to the metallic cores. A topmost surface of the second layer is in direct contact with a bottommost surface of the third layer. The method includes exposing a portion of the second layer by performing an exposure process, and the auxiliary reacts with the first linkers during the exposure process.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: November 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Chin-Hsiang Lin, Ching-Yu Chang
  • CLEANING SOLUTION AND METHOD OF CLEANING WAFER
    Publication number: 20220351963
    Abstract: A cleaning solution includes a solvent having Hansen solubility parameters: 25>?d>13, 25>?p>3, 30>?h>4; an acid having an acid dissociation constant pKa: ?11<pKa<4, or a base having pKa of 40>pKa>9.5; and a surfactant. The surfactant is an ionic or non-ionic surfactant, selected from R is substituted or unsubstituted aliphatic, alicyclic, or aromatic group, and non-ionic surfactant has A-X or A-X-A-X structure, where A is unsubstituted or substituted with oxygen or halogen, branched or unbranched, cyclic or non-cyclic, saturated C2-C100 aliphatic or aromatic group, X includes polar functional groups selected from —OH, ?O, —S—, —P—, —P(O2), —C(?O)SH, —C(?O)OH, —C(?O)OR—, —O—, —N—, —C(?O)NH, —SO2OH, —SO2SH, —SOH, —SO2—, —CO—, —CN—, —SO—, —CON—, —NH—, —SO3NH—, and SO2NH.
    Type: Application
    Filed: June 29, 2022
    Publication date: November 3, 2022
    Inventors: An-Ren ZI, Ching-Yu CHANG
  • METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
    Publication number: 20220351964
    Abstract: A method of manufacturing a semiconductor device includes forming a dopant layer including a dopant composition over a substrate. A resist layer including a resist composition is formed over the dopant layer. A dopant is diffused from the dopant composition in the dopant layer into the resist layer; and a pattern is formed in the resist layer.
    Type: Application
    Filed: April 30, 2021
    Publication date: November 3, 2022
    Inventors: An-Ren ZI, Ching-Yu CHANG
  • Semiconductor device and method
    Patent number: 11482411
    Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: October 25, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ching-Yu Chang, Jei Ming Chen, Tze-Liang Lee
  • PHOTORESIST TOP COATING MATERIAL FOR ETCHING RATE CONTROL
    Publication number: 20220334482
    Abstract: A patterning stack is provided. The patterning stack includes a bottom anti-reflective coating (BARC) layer over a substrate, a photoresist layer having a first etching resistance over the BARC layer, and a top coating layer having a second etching resistance greater than the first etching resistance over the photoresist layer. The top coating layer includes a polymer having a polymer backbone including at least one functional unit of high etching resistance and one or more acid labile groups attached to the polymer backbone or a silicon cage compound.
    Type: Application
    Filed: April 15, 2021
    Publication date: October 20, 2022
    Inventors: Tzu-Yang LIN, Ching-Yu CHANG, Chin-Hsiang LIN
  • Spin on carbon composition and method of manufacturing a semiconductor device
    Patent number: 11476108
    Abstract: A method of manufacturing a semiconductor device includes forming a spin on carbon layer comprising a spin on carbon composition over a semiconductor substrate. The spin on carbon layer is first heated at a first temperature to partially crosslink the spin on carbon layer. The spin on carbon layer is second heated at a second temperature to further crosslink the spin on carbon layer. An overlayer is formed over the spin on carbon layer. The second temperature is higher than the first temperature.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: October 18, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jing Hong Huang, Ching-Yu Chang, Wei-Han Lai
  • METHOD FOR FORMING SEMICONDUCTOR DEVICE
    Publication number: 20220319862
    Abstract: A method includes forming a dielectric layer over a substrate; forming a patterned amorphous silicon layer over a dielectric layer; depositing a first spacer layer over the patterned amorphous silicon layer; depositing a second spacer layer over the first spacer layer; forming a photoresist having an opening over the substrate; depositing a hard mask layer in the opening of the photoresist; after depositing the hard mask layer in the opening of the photoresist, removing the photoresist; and performing an etching process to etch the dielectric layer by using the patterned amorphous silicon layer, the first spacer layer, the second spacer layer, and the hard mask layer as an etch mask, in which the etching process etches the second spacer layer at a slower etch rate than etching the first spacer layer.
    Type: Application
    Filed: August 2, 2021
    Publication date: October 6, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Yu CHANG, Jei-Ming CHEN, Tze-Liang LEE
  • Method and apparatus of patterning a semiconductor device
    Patent number: 11460776
    Abstract: A method of making a semiconductor device is provided. The method includes forming a photoresist material over a substrate, the photoresist material having a polymer that includes a backbone having a segment and a linking group, the segment including a carbon chain and an ultraviolet (UV) curable group, the UV curable group coupled to the carbon chain and to the linking group; performing a first exposure process that breaks the backbone of the polymer via decoupling the linking group from the connected UV curable group of each segment; performing a second exposure process to form a patterned photoresist layer; and developing the patterned photoresist layer.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: October 4, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: An-Ren Zi, Ching-Yu Chang