Patents by Inventor Ching-Yu Chang

Ching-Yu Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210271166
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist underlayer including a photoresist underlayer composition over a semiconductor substrate and forming a photoresist layer comprising a photoresist composition over the photoresist underlayer. The photoresist layer is selectively exposed to actinic radiation, and the photoresist layer is developed to form a pattern in the photoresist layer. The photoresist underlayer composition includes: a first polymer having one or more of pendant acid-labile groups and pendant epoxy groups, a second polymer having one or more crosslinking groups, an acid generator, a quencher or photodecomposable base, and a solvent. The photoresist underlayer composition includes 0 wt. % to 10 wt. % of the quencher or photodecomposable base based on a total weight of the first and second polymers.
    Type: Application
    Filed: January 15, 2021
    Publication date: September 2, 2021
    Inventors: An-Ren ZI, Ching-Yu CHANG
  • Publication number: 20210271164
    Abstract: Manufacturing method includes forming photoresist layer including photoresist composition over substrate. Photoresist composition includes: photoactive compound, polymer, crosslinker. The polymer structure A1, A2, A3 independently C1-C30 aryl, alkyl, cycloalkyl, hydroxylalkyl, alkoxy, alkoxyl alkyl, acetyl, acetylalkyl, carboxyl, alky carboxyl, cycloalkyl carboxyl, hydrocarbon ring, heterocyclic, chain, ring, 3-D structure; R1 is C4-C15 chain, cyclic, 3-D structure alkyl, cycloalkyl, hydroxylalkyl, alkoxy, or alkoxyl alkyl; proportion of x, y, and z in polymer is 0?x/(x+y+z)?1, 0?y/(x+y+z)?1, and 0?z/(x+y+z)?1, x, y, and z all not 0 for same polymer.
    Type: Application
    Filed: February 4, 2021
    Publication date: September 2, 2021
    Inventors: Yen-Hao CHEN, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20210272911
    Abstract: An overlay mark includes a first feature extending in an X-direction, wherein the first feature is a first distance from a substrate. The overlay mark further includes a second feature extending in a Y-direction perpendicular to the X-direction, wherein the second feature is a second distance from the substrate, and the second distance is different from the first distance, wherein at least one of the first feature or the second feature comprises a conductive material. The overlay mark further includes a third feature extending in the X-direction and the Y-direction, wherein the third feature is a third distance from the substrate, and the third distance is different from the first distance and the second distance. The first distance, the second distance and the third distance from the substrate are along a Z-direction perpendicular to both the X-direction and the Y-direction.
    Type: Application
    Filed: May 18, 2021
    Publication date: September 2, 2021
    Inventors: Chen-Yu CHEN, Ming-Feng SHIEH, Ching-Yu CHANG
  • Patent number: 11106138
    Abstract: The present disclosure provides resist rinse solutions and corresponding lithography techniques that achieve high pattern structural integrity for advanced technology nodes. An example lithography method includes forming a resist layer over a workpiece, exposing the resist layer to radiation, developing the exposed resist layer using a developer that removes an unexposed portion of the exposed resist layer, thereby forming a patterned resist layer, and rinsing the patterned resist layer using a rinse solution. The developer is an organic solution, and the rinse solution includes water.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: August 31, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Wei Wang, Wei-Han Lai, Ching-Yu Chang
  • Publication number: 20210263419
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The method includes exposing a portion of the resist layer. The resist layer includes a photoacid generator (PAG) group, a quencher group, an acid-labile group (ALG) and a polar unit (PU). The method also includes performing a baking process on the resist layer and developing the resist layer to form a patterned resist layer. The method further includes doping a portion of the material layer by using the patterned resist layer as a mask to form a doped region. In addition, the method includes removing the patterned resist layer.
    Type: Application
    Filed: May 10, 2021
    Publication date: August 26, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Li-Yen LIN, Ching-Yu CHANG, Chin-Hsiang LIN
  • Patent number: 11094541
    Abstract: In accordance with an embodiment a bottom anti-reflective layer comprises a surface energy modification group which modifies the surface energy of the polymer resin to more closely match a surface energy of an underlying material in order to help fill gaps between structures. The surface energy of the polymer resin may be modified by either using a surface energy modifying group or else by using an inorganic structure.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: August 17, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Chung Su, Ching-Yu Chang
  • Patent number: 11079681
    Abstract: A lithography method includes forming a resist layer over a substrate. The resist layer is exposed to radiation. The exposed resist layer is developed using a developer that removes an exposed portion of the exposed resist layer, thereby forming a patterned resist layer. The patterned resist layer is rinsed using a basic aqueous rinse solution.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: August 3, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Hui Weng, Chen-Yu Liu, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 11073763
    Abstract: Shrinkage and mass losses are reduced in photoresist exposure and post exposure baking by utilizing a small group which will decompose. Alternatively a bulky group which will not decompose or a combination of the small group which will decompose along with the bulky group which will not decompose can be utilized. Additionally, polar functional groups may be utilized in order to reduce the diffusion of reactants through the photoresist.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: July 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Han Lai, Ching-Yu Chang, Chen-Hau Wu
  • Patent number: 11069528
    Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: July 20, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Chang, Jung-Hau Shiu, Jen Hung Wang, Tze-Liang Lee
  • Patent number: 11054742
    Abstract: A photoresist layer is formed over a wafer. The photoresist layer includes a metallic photoresist material and one or more additives. An extreme ultraviolet (EUV) lithography process is performed using the photoresist layer. The one or more additives include: a solvent having a boiling point greater than about 150 degrees Celsius, a photo acid generator, a photo base generator, a quencher, a photo de-composed base, a thermal acid generator, or a photo sensitivity cross-linker.
    Type: Grant
    Filed: June 15, 2018
    Date of Patent: July 6, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Ren Zi, Joy Cheng, Ching-Yu Chang
  • Publication number: 20210198468
    Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Photoresist layer is selectively exposed to radiation, and selectively exposed photoresist layer developed. Photoresist composition includes photoactive compound, crosslinker, copolymer.
    Type: Application
    Filed: November 13, 2020
    Publication date: July 1, 2021
    Inventors: Yen-Hao CHEN, Wei-Han LAI, Ching-Yu CHANG
  • Publication number: 20210200092
    Abstract: A method of forming a photoresist pattern includes forming a protective layer over a photoresist layer formed on a substrate. The protective layer and the photoresist layer are selectively exposed to actinic radiation. The photoresist layer is developed to form a pattern in the photoresist layer. The protective layer includes a polymer without a nitrogen-containing moiety, and a basic quencher, an organic acid, a photoacid generator, or a thermal acid generator.
    Type: Application
    Filed: November 13, 2020
    Publication date: July 1, 2021
    Inventors: Yu-Chung SU, Tsung-Han KO, Ching-Yu CHANG
  • Publication number: 20210200091
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist underlayer over a semiconductor substrate. The underlayer includes a polymer having a photocleavable functional group. A photoresist layer is formed over the underlayer. The photoresist layer is selectively exposed to actinic radiation, and the selectively exposed photoresist layer is developed to form a photoresist pattern.
    Type: Application
    Filed: November 18, 2020
    Publication date: July 1, 2021
    Inventors: Chun-Chih HO, Chin-Hsiang LIN, Ching-Yu CHANG
  • Patent number: 11043388
    Abstract: The present disclosure provides a semiconductor fabrication apparatus. The semiconductor apparatus includes a processing chamber; a substrate stage provided in the processing chamber and being configured to secure and rotate a semiconductor wafer; a gas injector configured to inject a chemical to the processing chamber; a window attached to the gas injector; and an adjustable fastening device coupled with the gas injector and the window.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: June 22, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yung-Shun Hsu, Ching-Yu Chang, Chiao-Kai Chang, Wai Hong Cheah, Chien-Fang Lin
  • Patent number: 11037820
    Abstract: A method for forming openings in an underlayer includes: forming a photoresist layer on an underlayer formed on a substrate; exposing the photoresist layer; forming photoresist patterns by developing the exposed photoresist layer, the photoresist patterns covering regions of the underlayer in which the openings are to be formed; forming a liquid layer over the photoresist patterns; after forming the liquid layer, performing a baking process so as to convert the liquid layer to an organic layer in a solid form; performing an etching back process to remove a portion of the organic layer on a level above the photoresist patterns; removing the photoresist patterns, so as to expose portions of the underlayer by the remaining portion of the organic layer; forming the openings in the underlayer by using the remaining portion of the organic layer as an etching mask; and removing the remaining portion of the organic layer.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: June 15, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tzu-Yang Lin, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 11036137
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an assist layer over a material layer. The assist layer includes a first polymer with a first polymer backbone, a floating group bonded to the first polymer backbone, and the floating group includes carbon fluoride (CxFy), and a second polymer. The method includes forming a resist layer over the assist layer, and the first polymer is closer to an interface between the assist layer and the resist layer than the second polymer. The method also includes patterning the resist layer.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: June 15, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 11037882
    Abstract: An overlay mark includes a first feature extending in an X-direction, wherein the first feature is a first distance from a substrate. The overlay mark further includes a second feature extending in a Y-direction perpendicular to the X-direction, wherein the second feature is a second distance from the substrate, and the second distance is different from the first distance. The overlay mark further includes a third feature extending in the X-direction and the Y-direction, wherein the third feature is a third distance from the substrate, and the third distance is different from the first distance and the second distance.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: June 15, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Yu Chen, Ming-Feng Shieh, Ching-Yu Chang
  • Patent number: 11029602
    Abstract: A method of forming a photoresist pattern includes forming a protective layer over a photoresist layer formed on a substrate, and selectively exposing the photoresist layer to actinic radiation. The photoresist layer is developed to form a pattern in the photoresist layer, and the protective layer is removed. The protective layer includes a polymer having fluorocarbon pendant groups.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: June 8, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Chin-Hsiang Lin, Ching-Yu Chang, Yahru Cheng
  • Patent number: 11022886
    Abstract: The present disclosure provides a method for planarization. The method includes providing a substrate having a top surface and a trench recessed from the top surface; coating a sensitive material layer on the top surface of the substrate, wherein the sensitive material layer fills in the trench; performing an activation treatment to the sensitive material layer so that portions of the material layer are chemically changed; and performing a wet chemical process to the sensitive material layer so that top portions of the sensitive material layer above the trench are removed, wherein remaining portions of the sensitive material layer have top surfaces substantially coplanar with the top surface of the substrate.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: June 1, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO,, LTD.
    Inventors: Ming-Hui Weng, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 11022885
    Abstract: A method includes providing a substrate; forming a bottom layer over the substrate; forming a middle layer over the bottom layer, a top surface of which including a photosensitive moiety having a first end anchored in the middle layer and a second end extending away from the top surface of the middle layer; forming a photoresist layer over the middle layer; exposing the photoresist layer to a radiation source; and developing the photoresist layer to form a pattern. The photosensitive moiety, which includes one of a photo-acid generator (PAG), a photo-base generator (PBG), photo-decomposable base (PDB), or photo-decomposable quencher (PDQ), may be anchored to a polymer backbone forming the middle layer via one or more linker groups. A distance by which the photosensitive moiety extends into the photoresist layer may be determined by a length of the linker group.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: June 1, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Chih Ho, Kuan-Hsin Lo, Ching-Yu Chang, Chin-Hsiang Lin