Patents by Inventor Ching-Yu Chen

Ching-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12507119
    Abstract: A network connection control system and method is provided. The network connection control system includes user equipments, base stations, a server and first and second processing units. Each user equipment transmits a network parameter between it and every base station to the server through the base station connected therewith. The first processing unit assigns CIO set values corresponding to the base station. The network connection control system is configured to perform an optimizing procedure. In the optimizing procedure, according to the CIO set values, the network parameters, the throughput objective function and connection and network resource constraints of all the user equipments and base stations, the first and second processing units processes based on classical algorithm and quantum annealing algorithm respectively to obtain the optimized connection configuration.
    Type: Grant
    Filed: July 11, 2023
    Date of Patent: December 23, 2025
    Assignee: Compal Electronics, Inc.
    Inventors: Tsung-Hsuan Tsai, Yi-Ching Chen, Ching-Yu Chen
  • Publication number: 20250295038
    Abstract: A method for producing ferroelectric thin films using a substrate capable of generating a polarization field is disclosed. This method involves providing a substrate that can produce an electric field effect on its surface, followed by growing a first thin film layer on this substrate through an epitaxial process, and then further growing a second thin film layer on the first thin film layer. The second thin film layer develops ferroelectric properties due to the electric field effect generated by the substrate's surface, causing two atomic layers within the second thin film layer to exhibit ferroelectric characteristics through misaligned stacking epitaxial growth.
    Type: Application
    Filed: July 17, 2024
    Publication date: September 18, 2025
    Inventors: CHUNG-LIN WU, ZHEN-YOU LIN, SHENG-SHIANG WONG, YEN-FU HUANG, PING-HUNG LI, CHING-YU CHEN
  • Publication number: 20250254123
    Abstract: A load balancing system and method is provided. The load balancing system includes a core network, CPEs (customer premise equipments), user equipments, and a load balancing equipment. The CPEs receive signals from the core network and connect to each other through a network topology. The user equipments are connected to the CPEs. The load balancing equipment is connected to one CPE, and the load balancing equipment confirms a throughput limit of each CPE and includes a data analysis module and a processing unit. The data analysis module receives network parameters between the CPEs and the user equipments, and calculates premise throughputs of the CPEs. The processing unit generates a route control table according to the premise throughputs. According to the route control table, the CPEs adjusts signal transmission between the CPEs and the user equipments to balance the premise throughputs of the CPEs.
    Type: Application
    Filed: May 7, 2024
    Publication date: August 7, 2025
    Inventors: Ching-Yu Chen, Yi-Ching Chen, Ko-Cheng Liu
  • Patent number: 12301280
    Abstract: A spread spectrum switching converter converts an input power to an output power. The spread spectrum switching converter includes a pulse width modulation (PWM) circuit and a pulse omission control circuit. The PWM circuit generate an initial PWM signal according to a feedback signal related to the output power. The initial PWM signal controls at least one switch to switch an inductor to generate the output power. The pulse omission control circuit generates a pulse omission control signal to mask a portion of pulses of the initial PWM signal, to thereby generate an adjusted PWM signal. The pulse omission control circuit randomly adjusts the pulse width of the pulse omission control signal according to a random control signal, such that the adjusted PWM signal has a spread spectrum characteristic.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: May 13, 2025
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Jung-Sheng Chen, Chin-Yen Lin, Ching-Yu Chen, Ting-Jung Lo, Hsing-Shen Huang
  • Publication number: 20250000987
    Abstract: A compound or a pharmaceutically acceptable salt thereof, and a pharmaceutical composition thereof are provided, wherein the compound includes a retinoic acid conjugated with a carbohydrate. In addition, use of the compound or the pharmaceutically acceptable salt thereof or the pharmaceutical composition in the manufacture of a medicament for inhibiting infection or replication of a virus or for treating a cancer is also provided.
    Type: Application
    Filed: September 5, 2024
    Publication date: January 2, 2025
    Inventors: Ching-Yu Chen, Bo-Lin Lin
  • Publication number: 20240423942
    Abstract: A pharmaceutical composition including a retinoic acid and a carbohydrate is provided. The pharmaceutical composition may further include a metal ion. Use of the pharmaceutical composition in the manufacture of a medicament for inhibiting infection or replication of a virus or for treating a cancer is also provided. The pharmaceutical composition can enhance the inhibition ability of virus infection and/or or replication in comparison with the retinoic acid used only.
    Type: Application
    Filed: September 5, 2024
    Publication date: December 26, 2024
    Inventors: Ching-Yu Chen, Junjen Liu, Chi-Fu Yen, Bo-Lin Lin
  • Patent number: 12009516
    Abstract: A fast charging lithium-ion battery includes a positive electrode plate, a negative electrode plate, a separator, and an electrolyte. The positive electrode plate includes a positive current collector and a positive active material layers. The negative electrode plate includes a negative current collector and negative active material layers. The negative active material layers include titanium niobium oxide, lithium titanate, or a combination thereof. The separator is disposed between the positive electrode plate and the negative electrode plate. The electrolyte contacts the positive electrode plate and the negative electrode plate. The negative active material layers have an effective area corresponding to the positive electrode plate. The negative active material layers have a thickness on one surface of the negative current collector. A ratio of the effective area to the thickness is greater than 2×105 mm.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: June 11, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Deng-Tswen Shieh, Sheng-Fa Yeh, Shih-Chieh Liao, Ching-Yu Chen, Hao-Tzu Huang
  • Publication number: 20240088284
    Abstract: Disclosed is a semiconductor device and a method for fabricating such semiconductor device, specifically a High Electron Mobility Transistor (HEMT) with a back barrier layer for blocking electron leakage and improve threshold voltage. In one embodiment, a semiconductor device, includes: a Gallium Nitride (GaN) layer; a front barrier layer over the GaN layer; a source electrode, a drain electrode and a gate electrode formed over the front barrier layer; a 2-Dimensional Electron Gas (2-DEG) in the GaN layer at a first interface between the GaN layer and the front barrier layer; and a back barrier layer in the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AlN).
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Chia-Ling YEH, Pravanshu MOHANTA, Ching-Yu CHEN, Jiang-He XIE, Yu-Shine LIN
  • Publication number: 20240022961
    Abstract: A network connection control system and method is provided. The network connection control system includes user equipments, base stations, a server and first and second processing units. Each user equipment transmits a network parameter between it and every base station to the server through the base station connected therewith. The first processing unit assigns CIO set values corresponding to the base station. The network connection control system is configured to perform an optimizing procedure. In the optimizing procedure, according to the CIO set values, the network parameters, the throughput objective function and connection and network resource constraints of all the user equipments and base stations, the first and second processing units processes based on classical algorithm and quantum annealing algorithm respectively to obtain the optimized connection configuration.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 18, 2024
    Inventors: Tsung-Hsuan Tsai, Yi-Ching Chen, Ching-Yu Chen
  • Patent number: 11855199
    Abstract: Disclosed is a semiconductor device and a method for fabricating such semiconductor device, specifically a High Electron Mobility Transistor (HEMT) with a back barrier layer for blocking electron leakage and improve threshold voltage. In one embodiment, a semiconductor device, includes: a Gallium Nitride (GaN) layer; a front barrier layer over the GaN layer; a source electrode, a drain electrode and a gate electrode formed over the front barrier layer; a 2-Dimensional Electron Gas (2-DEG) in the GaN layer at a first interface between the GaN layer and the front barrier layer; and a back barrier layer in the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AlN).
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ling Yeh, Pravanshu Mohanta, Ching-Yu Chen, Jiang-He Xie, Yu-Shine Lin
  • Patent number: 11843042
    Abstract: Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: December 12, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Yu Chen, Wei-Ting Chang, Yu-Shine Lin, Jiang-He Xie
  • Publication number: 20230223987
    Abstract: A spread spectrum switching converter converts an input power to an output power. The spread spectrum switching converter includes a pulse width modulation (PWM) circuit and a pulse omission control circuit. The PWM circuit generate an initial PWM signal according to a feedback signal related to the output power. The initial PWM signal controls at least one switch to switch an inductor to generate the output power. The pulse omission control circuit generates a pulse omission control signal to mask a portion of pulses of the initial PWM signal, to thereby generate an adjusted PWM signal. The pulse omission control circuit randomly adjusts the pulse width of the pulse omission control signal according to a random control signal, such that the adjusted PWM signal has a spread spectrum characteristic.
    Type: Application
    Filed: October 28, 2022
    Publication date: July 13, 2023
    Inventors: Jung-Sheng Chen, Chin-Yen Lin, Ching-Yu Chen, Ting-Jung Lo, Hsing-Shen Huang
  • Publication number: 20220384630
    Abstract: Disclosed is a semiconductor device and a method for fabricating such semiconductor device, specifically a High Electron Mobility Transistor (HEMT) with a back barrier layer for blocking electron leakage and improve threshold voltage. In one embodiment, a semiconductor device, includes: a Gallium Nitride (GaN) layer; a front barrier layer over the GaN layer; a source electrode, a drain electrode and a gate electrode formed over the front barrier layer; a 2-Dimensional Electron Gas (2-DEG) in the GaN layer at a first interface between the GaN layer and the front barrier layer; and a back barrier layer in the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AIN).
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Chia-Ling YEH, Pravanshu Mohanta, Ching-Yu Chen, Jiang-He Xie, Yu-Shine Lin
  • Publication number: 20220140123
    Abstract: Disclosed is a semiconductor device and a method for fabricating such semiconductor device, specifically a High Electron Mobility Transistor (HEMT) with a back barrier layer for blocking electron leakage and improve threshold voltage. In one embodiment, a semiconductor device, includes: a Gallium Nitride (GaN) layer; a front barrier layer over the GaN layer; a source electrode, a drain electrode and a gate electrode formed over the front barrier layer; a 2-Dimensional Electron Gas (2-DEG) in the GaN layer at a first interface between the GaN layer and the front barrier layer; and a back barrier layer in the GaN layer, wherein the back barrier layer comprises Aluminum Nitride (AlN).
    Type: Application
    Filed: October 29, 2020
    Publication date: May 5, 2022
    Inventors: Chia-Ling YEH, Pravanshu MOHANTA, Ching-Yu CHEN, Jiang-He XIE, Yu-Shine LIN
  • Publication number: 20210376308
    Abstract: An electrode plate includes a metal foil, a first active material layer directly disposed on the top surface of the metal foil, and a second active material layer directly disposed on the bottom surface of the metal foil. The crystalline system of the first active material layer is different from that of the second active material layer.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 2, 2021
    Inventors: Sheng-Fa YEH, Deng-Tswen SHIEH, Ching-Yu CHEN, Shih-Chieh LIAO, Hao-Tzu HUANG
  • Publication number: 20210376118
    Abstract: Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer.
    Type: Application
    Filed: August 18, 2021
    Publication date: December 2, 2021
    Inventors: Ching-Yu CHEN, Wei-Ting CHANG, Yu-Shine LIN, Jiang-He XIE
  • Patent number: 11121230
    Abstract: Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ching-Yu Chen, Wei-Ting Chang, Yu-Shine Lin, Jiang-He Xie
  • Patent number: 10989221
    Abstract: A cooling system includes a fan and a system component. The fan includes a plurality of fan blades and configured to rotate in a fan direction. The system component is located downstream of the fan, and includes a cutout for passing of airflow from the fan, and a bridge spanning the cutout. The bridge includes a center section and at least one arm section extending from the center section to an edge of the cutout along a curved path offset towards the fan direction.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: April 27, 2021
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chao-Jung Chen, Yu-Nien Huang, Ching-Yu Chen, Tsung-Ta Li
  • Publication number: 20210099818
    Abstract: A system and a method for evaluating noise cancelling capability are provided, and the system and method are configured to evaluate a noise cancelling capability of an external device. The system includes a mixer, a player, a recorder and a comparator. The mixer receives and mixes a target audio file and a noise audio file and outputs a mix audio file. The player is connected to the mixer for receiving the mix audio file. The player outputs a first audio signal to the external device. The external device cancels the noise of the first audio signal and outputs a second audio signal. The recorder receives the second audio signal and outputs a noise-cancelled audio file. The comparator is connected to the recorder for receiving the noise-cancelled audio file. The comparator compares the noise-cancelled audio file and the target audio file and outputs an evaluation report according to a comparing result.
    Type: Application
    Filed: November 18, 2019
    Publication date: April 1, 2021
    Inventors: Yi-Ching Chen, Ching-Yu Chen, Yun-Chiu Ching
  • Publication number: 20210083279
    Abstract: A fast charging lithium-ion battery includes a positive electrode plate, a negative electrode plate, a separator, and an electrolyte. The positive electrode plate includes a positive current collector and a positive active material layers. The negative electrode plate includes a negative current collector and negative active material layers. The negative active material layers include titanium niobium oxide, lithium titanate, or a combination thereof. The separator is disposed between the positive electrode plate and the negative electrode plate. The electrolyte contacts the positive electrode plate and the negative electrode plate. The negative active material layers have an effective area corresponding to the positive electrode plate. The negative active material layers have a thickness on one surface of the negative current collector. A ratio of the effective area to the thickness is greater than 2×105 mm.
    Type: Application
    Filed: September 18, 2020
    Publication date: March 18, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Deng-Tswen SHIEH, Sheng-Fa YEH, Shih-Chieh LIAO, Ching-Yu CHEN, Hao-Tzu HUANG