Abstract: A light emitting device package structure is described. The light emitting device package structure includes a substrate serving as a carrier supporting a light emitting device chip. The substrate and the light emitting device chip have a chip side and a substrate side separately. A first electrode layer is disposed on a first surface of the light emitting device chip and a second electrode layer is disposed on a second surface of the light emitting device chip, in which the first surface and the second surface are not coplanar. A first conductive trace is electrically connected to the first electrode layer and a second conductive trace is electrically connected to the second electrode layer. At least the first conductive trace or the second conductive trace is formed along the chip side and the substrate side simultaneously.

Abstract: A semiconductor device and manufacturing method thereof are disclosed. The device comprises a semiconductor die, a passivation layer, a wiring redistribution layer (RDL), an Ni/Au layer, and a solder mask. The semiconductor die comprises a top metal exposed in an active surface thereof. The passivation layer overlies the active surface of the semiconductor die, and comprises a through passivation opening overlying the top metal. The wiring RDL, comprising an Al layer, overlies the passivation layer, and electrically connects to the top metal via the passivation opening. The solder mask overlies the passivation layer and the wiring RDL, exposing a terminal of the wiring RDL.

Abstract: Described are semiconductor package devices with improved reliability and methods of manufacturing thereof. In one embodiment, a package device is disclosed that includes a chip having an active surface and a coupling surface opposite the active surface, where the chip has one or more integrated circuits and bumps. The device also includes a thermal spreader thermally coupled to the coupling surface of the chip for dissipating heat generated by the chip, and a thermal interface material located between the thermal spreader and the coupling surface of the chip for improving the heat dissipation. In addition, the device also includes a boundary material located between the thermal spreader and the coupling surface of the chip, where the boundary material is configured to surround a perimeter of the thermal interface material to maintain the thermal interface material between the thermal spreader and the coupling surface of the chip.

Abstract: A constraint stiffener for reinforcing an integrated circuit package is provided. In one embodiment, the constraint stiffener comprises a rigid, planar base element for bonding to an integrated circuit substrate. The base element has a plurality of elongated support members, and the base element has an opening therein for surrounding an integrated circuit. The base element and support members reduce warpage due to thermal expansion mismatches between at least the integrated circuit and the substrate. In one embodiment, the elongated support members are detachable from the corners of the base element. In another embodiment, the elongated support members have means for attaching and detaching to the corners of the base element. In yet another embodiment, the elongated support members are detachable from about the midsections of the base element. In another embodiment, the elongated support members have means for attaching and detaching to the midsections of the base element.

Abstract: A constraint stiffener for reinforcing an integrated circuit package is provided. In one embodiment, the constraint stiffener comprises a rigid, planar base element for bonding to an integrated circuit substrate. The base element has a plurality of elongated support members, and the base element has an opening therein for surrounding an integrated circuit. The base element and support members reduce warpage due to thermal expansion mismatches between at least the integrated circuit and the substrate. In one embodiment, the elongated support members are detachable from the corners of the base element. In another embodiment, the elongated support members have means for attaching and detaching to the corners of the base element. In yet another embodiment, the elongated support members are detachable from about the midsections of the base element. In another embodiment, the elongated support members have means for attaching and detaching to the midsections of the base element.

Abstract: Described are semiconductor package devices with improved reliability and methods of manufacturing thereof. In one embodiment, a package device is disclosed that includes a chip having an active surface and a coupling surface opposite the active surface, where the chip has one or more integrated circuits and bumps. The device also includes a thermal spreader thermally coupled to the coupling surface of the chip for dissipating heat generated by the chip, and a thermal interface material located between the thermal spreader and the coupling surface of the chip for improving the heat dissipation. In addition, the device also includes a boundary material located between the thermal spreader and the coupling surface of the chip, where the boundary material is configured to surround a perimeter of the thermal interface material to maintain the thermal interface material between the thermal spreader and the coupling surface of the chip.

Abstract: A semiconductor package having a sealing membrane for thermal interface material is provided. In one embodiment, the semiconductor package comprises a semiconductor die, a heat spreader, and a sealed membrane for containing a thermal interface material (TIM) therein, the sealed membrane is located between the die and the heat spreader for transmitting heat generated from the die to the heat spreader.

Abstract: Described are semiconductor package devices with improved reliability and methods of manufacturing thereof. In one embodiment, a package device is disclosed that includes a chip having an active surface and a coupling surface opposite the active surface, where the chip has one or more integrated circuits and bumps. The device also includes a thermal spreader thermally coupled to the coupling surface of the chip for dissipating heat generated by the chip, and a thermal interface material located between the thermal spreader and the coupling surface of the chip for improving the heat dissipation. In addition, the device also includes a boundary material located between the thermal spreader and the coupling surface of the chip, where the boundary material is configured to surround a perimeter of the thermal interface material to maintain the thermal interface material between the thermal spreader and the coupling surface of the chip.

Abstract: Described are semiconductor package devices with improved reliability and methods of manufacturing thereof. In one embodiment, a package device is disclosed that includes a chip having an active surface and a coupling surface opposite the active surface, where the chip has one or more integrated circuits and bumps. The device also includes a thermal spreader thermally coupled to the coupling surface of the chip for dissipating heat generated by the chip, and a thermal interface material located between the thermal spreader and the coupling surface of the chip for improving the heat dissipation. In addition, the device also includes a boundary material located between the thermal spreader and the coupling surface of the chip, where the boundary material is configured to surround a perimeter of the thermal interface material to maintain the thermal interface material between the thermal spreader and the coupling surface of the chip.