Patents by Inventor Ching-Yuan Lin

Ching-Yuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070252640
    Abstract: A voltage regulator has a first charge circuit, a second charge circuit, and a control circuit. The control circuit has five input terminals and two output terminals. The five input terminals are respectively coupled to a reference voltage, a first voltage source, a second voltage source, an output terminal of the first charge circuit, and an output terminal of the second charge circuit. The control circuit equalizes a voltage difference between the output terminal of the first charge circuit and the first voltage source and a voltage difference between the second voltage source and the output terminal of the second charge circuit.
    Type: Application
    Filed: April 28, 2006
    Publication date: November 1, 2007
    Inventors: Yen-Tai Lin, Ching-Yuan Lin
  • Publication number: 20070242523
    Abstract: An operating method of a non-volatile memory is provided. The non-volatile memory includes plural memory cells. Each memory cell includes a charge storage structure, a gate, and a source and a drain disposed in the well on the both sides of the gate. During an erasing operation, a first voltage is applied to the source of the selected memory cell, a second voltage is applied to the gate of each selected memory cell, and a third voltage is applied to the well; and the drain of the selected memory cell is floated, so that the selected memory cell is erased. In the meantime, the fourth voltage is applied to the drain of each unselected memory cell, the fifth voltage is applied to the gate of the unselected memory cell, and the source of the unselected memory cell is floated to prevent the unselected memory cell from being erased.
    Type: Application
    Filed: April 12, 2006
    Publication date: October 18, 2007
    Inventors: Hong-Yi Liao, Wu-Chang Chang, Ching-Yuan Lin
  • Publication number: 20070210129
    Abstract: This invention relates to a detachable mobile sound source structure, which is able to be formed as either a U-shape ribbon or two sound units, comprising two loudspeakers and a pocket that is used for containing playback equipment, e.g., MP3, etc. By means of the connection of a signal output line and said loudspeakers, the detachable mobile sound source device has a coupling component disposed thereon to be attached to a backpack or shoulder straps; Accordingly, the invention provides a detachable mobile sound source device enabling a user to listen to music or broadcast from playback equipment while on the move.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 13, 2007
    Inventors: Chi-Feng Feng, Chi-Ru Lee, Ching-Yuan Lin
  • Patent number: 7254086
    Abstract: The present invention provides a method for accessing a memory. The memory contains M one-time programmable memory blocks, and each has a first memory sector and a second memory sector. The method includes: selecting a first target memory block and reading the first target memory block. The step of selecting a first target memory block is performed by comparing the second memory sectors of N one-time programmable memory blocks from M one-time programmable memory blocks by following a search rule to select the first target memory block.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: August 7, 2007
    Assignee: eMemory Technology Inc.
    Inventors: Ching-Yuan Lin, Hong-Yi Liao, Yen-Tai Lin, Shih-Yun Lin, Chun-Hung Lu
  • Patent number: 7244985
    Abstract: A non-volatile memory array including memory units which are arranged in a row/column array is provided. Source lines are arranged in parallel in the column direction and connect to the source regions of the memory units in the same column. Bit lines are arranged in parallel in the row direction and connect to the drain regions of the memory units in the same row. Word lines are arranged in parallel in the column direction and connect to the select gates of the memory units in the same column. Control lines are arranged in parallel in the column direction and connect to the control gates of the memory units in the same column. The control lines are grouped into several groups with n control lines (n is a positive integer not less than 2) in one group, and the control lines in each group are electrically connected to each other.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: July 17, 2007
    Assignee: eMemory Technology Inc.
    Inventors: Jie-Hau Huang, Ching-Yuan Lin
  • Publication number: 20070159883
    Abstract: A method capable of improving endurance of memory includes detecting whether a record cell is the last non-programmed record cell of a set of record cells that includes the record cell. The method includes erasing the corresponding set of multi-time programmable memory blocks and erasing the set of record cells, if the record cell is the last non-programmed record cell of the set of record cells that includes the record cell. The method further includes programming the record cell corresponding to a first non-programmed record cell in the set of record cells if the non-programmed record cell is not the last non-programmed record cell of the set of record cells.
    Type: Application
    Filed: September 13, 2006
    Publication date: July 12, 2007
    Inventors: Ching-Yuan Lin, Yen-Tai Lin
  • Publication number: 20070147127
    Abstract: A nonvolatile memory device having a self reprogramming function is provided. The nonvolatile memory device includes a memory cell, a first transistor, a second transistor, and a latch circuit. The memory cell is for data storage. The first transistor receives a reading control signal at a gate. And a first source/drain is electrically coupled to the memory cell. The second transistor receives a reset control signal at a gate. A source/drain is electrically coupled to a second source/drain of the first transistor, and a second source/drain of the second transistor is grounded. In addition, the electrical characteristics of the second transistor are opposite to that of the first transistor. The latch circuit includes a latch input terminal and a latch output terminal. In which, the latch input terminal is electrically coupled to the second source/drain of the first transistor and the first source/drain of the second transistor.
    Type: Application
    Filed: December 26, 2005
    Publication date: June 28, 2007
    Inventors: Ching-Yuan Lin, Chien-Liang Kuo
  • Publication number: 20070117330
    Abstract: A sensing amplifier comprising a program cell current sensing circuit, an erase cell current sensing circuit and a latch circuit is provided. Each of the program and erase cell current sensing circuits further comprises a plurality of program/erase memory cells, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor and a fourth PMOS transistor. Wherein, one of the drain/source of the first NMOS transistor is electrically coupled to both the program/erase memory cells and a gate of the third NMOS transistor to form a node. In addition, one of the drain/source of the third NMOS transistor is coupled to the latch circuit. Moreover, the program/erase memory cell provides a program/erase current to the first NMOS transistor. The latch circuit will be driven once the amount of the electric charges accumulated at the node caused by the program/erase current overcomes a threshold voltage of the third NMOS transistor.
    Type: Application
    Filed: November 24, 2005
    Publication date: May 24, 2007
    Inventors: Ching-Yuan Lin, Hong-Ping Tsai
  • Publication number: 20070063264
    Abstract: A non-volatile memory array including memory units which are arranged in a row/column array is provided. Source lines are arranged in parallel in the column direction and connect to the source regions of the memory units in the same column. Bit lines are arranged in parallel in the row direction and connect to the drain regions of the memory units in the same row. Word lines are arranged in parallel in the column direction and connect to the select gates of the memory units in the same column. Control lines are arranged in parallel in the column direction and connect to the control gates of the memory units in the same column. The control lines are grouped into several groups with n control lines (n is a positive integer not less than 2) in one group, and the control lines in each group are electrically connected to each other.
    Type: Application
    Filed: November 14, 2005
    Publication date: March 22, 2007
    Inventors: Jie-Hau Huang, Ching-Yuan Lin
  • Publication number: 20060267041
    Abstract: A high-brightness light-emitting diode is disclosed. The high-brightness light-emitting diode, comprises: a chip; a base for holding the chip; and a transparent layer for covering the chip, wherein the chip is connected to an electrode by a metal wire. The improvement comprises an adhesive injection hole formed on the transparent layer for injecting a layer of fluorescent-powdered adhesive into it, thereby providing the light-emitting diode with the advantages such as good light collection and uniform light shape.
    Type: Application
    Filed: May 27, 2005
    Publication date: November 30, 2006
    Inventors: Huei-Tso Lin, Ching-Yuan Lin
  • Publication number: 20060262626
    Abstract: The present invention provides a method for accessing a memory. The memory contains M one-time programmable memory blocks, and each has a first memory sector and a second memory sector. The method includes: selecting a first target memory block and reading the first target memory block. The step of selecting a first target memory block is performed by comparing the second memory sectors of N one-time programmable memory blocks from M one-time programmable memory blocks by following a search rule to select the first target memory block.
    Type: Application
    Filed: October 19, 2005
    Publication date: November 23, 2006
    Inventors: Ching-Yuan Lin, Hong-Yi Liao, Yen-Tai Lin, Shih-Yun Lin, Chun-Hung Lu
  • Publication number: 20060262533
    Abstract: A modular light emitting diode is disclosed. The modular light emitting diode comprises a heat-sinking base, a circuit board, a LED light emitting device, and a waterproofing layer. A protrudent portion and a plurality of trenches are formed on the surface of the heat-sinking base. Waterproof connection terminals are mounted on both sides of the circuit board. The LED light emitting device is mounted on and connected to the circuit board so as to form a complete circuit. Thereafter, the circuit board on which the LED light emitting device is mounted is stacked on the heat-sinking base to allow the LED light emitting device to be mounted on the protrudent portion of the heat-sinking base. These three stacked components are locally packaged by a waterproofing layer to complete the modular light emitting diode having the advantages of good waterproofing, rapid heat sinking, and flexible assembly.
    Type: Application
    Filed: May 18, 2005
    Publication date: November 23, 2006
    Inventors: Huei-Tso Lin, Ching-Yuan Lin
  • Patent number: 6930412
    Abstract: A closed box structure of a horizontal linear motor machine tool, comprising a frame, serving as a machine platform, carrying an X-movable part, a Y-movable part, and a Z-movable part, with said Y-movable part mounted on said X-movable part, said Z-movable part mounted on said Y-movable part, and said Z-movable part having a main axis head; characterized in that said frame, said X-movable part and said Y-movable part are shaped like open squares, said X-movable part, said Y-movable part and said Z-movable part each carry a set of two symmetrically adapted linear motors for being driven, wherein for each of said sets of linear motors magnetic forces are balanced against each other, so that deformations due to magnetic forces are avoided.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: August 16, 2005
    Inventors: En-Sheng Chang, Ching-Yuan Lin, Chin-Mou Hsu, Hsuan-Jen Kung
  • Patent number: 6865405
    Abstract: A method is implemented in a cellular phone having a display, a CPU, a photosensitive element (e.g., photoresistor) on a surface, and a control circuit coupled to the photosensitive element. The method comprises the steps of switching the cellular phone to an automatic background brightness control mode; measuring a voltage between two terminals of the photosensitive element by the CPU; and adjusting a background brightness of the display with respect to the measured voltage. Accordingly, CPU may lower the background brightness of the display as the voltage decreases, while increasing the background brightness of the display as the voltage increases. This can reduce power consumption of cellular phone display in a strong light environment.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: March 8, 2005
    Assignee: Inventec Appliances Corp.
    Inventor: Ching-Yuan Lin
  • Patent number: 6819620
    Abstract: A power supply used for providing a flash memory with an operating voltage has a plurality of memory blocks and a plurality of decoders corresponding to the memory blocks. Each memory block has a plurality of memory cells for storing binary data. Each decoder is used for selecting memory cells in the corresponding memory block. The power supply has at least three power sources for generating different voltages, and controls the power sources for making a voltage difference between a high voltage level and a low voltage level of the unselected decoder less than a voltage difference between a high voltage level and a low voltage level of the selected decoder.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: November 16, 2004
    Assignee: eMemory Technology Inc.
    Inventors: Yen-Tai Lin, Ching-Yuan Lin, Chien-Hung Ho
  • Publication number: 20040145931
    Abstract: A power supply used for providing a flash memory with an operating voltage has a plurality of memory blocks and a plurality of decoders corresponding to the memory blocks. Each memory block has a plurality of memory cells for storing binary data. Each decoder is used for selecting memory cells in the corresponding memory block. The power supply has at least three power sources for generating different voltages, and controls the power sources for making a voltage difference between a high voltage level and a low voltage level of the unselected decoder less than a voltage difference between a high voltage level and a low voltage level of the selected decoder.
    Type: Application
    Filed: January 23, 2003
    Publication date: July 29, 2004
    Inventors: Yen-Tai Lin, Ching-Yuan Lin, Chien-Hung Ho
  • Publication number: 20040140721
    Abstract: A closed box structure of a horizontal linear motor machine tool, comprising a frame, serving as a machine platform, carrying an X-movable part, a Y-movable part, and a Z-movable part, with said Y-movable part mounted on said X-movable part, said Z-movable part mounted on said Y-movable part, and said Z-movable part having a main axis head; characterized in that said frame, said X-movable part and said Y-movable part are shaped like open squares, said X-movable part, said Y-movable part and said Z-movable part each carry a set of two symmetrically adapted linear motors for being driven, wherein for each of said sets of linear motors magnetic forces are balanced against each other, so that deformations due to magnetic forces are avoided.
    Type: Application
    Filed: January 16, 2003
    Publication date: July 22, 2004
    Inventors: En-Sheng Chang, Ching-Yuan Lin, Chin-Mou Hsu, Hsuan-Jen Kung
  • Publication number: 20040129954
    Abstract: The present invention includes a nonvolatile memory structure comprising: nonvolatile memory cell area including write/erase pins, address pins and data input/output pins; conductive contact pads arranged at the periphery area of the nonvolatile memory cell area for power input to operate the nonvolatile memory cell, wherein the conductive contact pads are connected to a power selecting from a positive power, a negative power or the combination thereof. The conductive contact pads include a positive power pin or a negative power pin for providing the operating power.
    Type: Application
    Filed: January 8, 2003
    Publication date: July 8, 2004
    Inventors: Yu-Ming Hsu, Yen-Tai Lin, Chien-Hung Ho, Ching-Yuan Lin
  • Patent number: 6728137
    Abstract: A method for controlling programming and reading operations of a plurality of one-time programmable (OTP) memory blocks includes (a) selecting an un-programmed OTP memory block from the OTP memory blocks according to status of the OTP memory blocks recorded In a memory element, (b) programming the selected OTP memory block, and (c) updating the status of the OTP memory blocks recorded in the memory element so as to record that the selected OTP memory block is programmed.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: April 27, 2004
    Assignee: eMemory Technology Inc.
    Inventor: Ching-Yuan Lin
  • Patent number: 6578677
    Abstract: A braking device of a linear guide comprises a braking slide seat which is mounted on the guide. The braking slide seat is provided with a braking rod which is provided in the mid-segment with an insertion slot having a tapered bevel and in the rear end with a disk spring for pushing the front end of the braking rod to make a frictional contact with the guide. An urging rod is powered by a hydraulic or a pneumatic source to enter the insertion slot to cause the braking rod to move away from the guide. In the event of a power outage, the urging rod is retreated from the insertion slot, the braking rod is urged by the spring to make a frictional contact with the guide, thereby exerting a braking force on the guide to bring the slide seat to an abrupt halt.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: June 17, 2003
    Assignee: Industrial Technology Research Institute
    Inventors: Chin-Mou Hsu, Ching-Yuan Lin, Hsi-Hung Hsiao