Patents by Inventor Chiu Ng

Chiu Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180109357
    Abstract: The present invention discloses methods and systems for managing an error correction mode at a first communications router. The first communication router transmits data packets to a second communications router and stores the first data packet in a local storage medium, When a delay inquiry message is received from the second communications router, the first communications router activates the error correction mode. When the error correction mode is activated, the first data packet is retransmitted to the second communications router and an error correction packet corresponding to the first data packet is also transmitted. When a back-to-normal message is received from the second communications router, the first communications router deactivates the error correction mode. The back-to-normal message indicates that the first communications router no longer needs to be in error correction mode.
    Type: Application
    Filed: October 17, 2016
    Publication date: April 19, 2018
    Applicant: Pismo Labs Technology Limited
    Inventors: Patrick Ho Wai Sung, Kam Chiu NG, Ho Ming Chan
  • Patent number: 9894694
    Abstract: A method and system for a first node to transmit packets to a second none, comprising receiving a packet from a local area network (LAN) interface, inspecting the packet; determining whether the packet satisfies at least one packet condition; transmitting the packet through a predefined tunnel if the packet satisfies the at least one packet condition; transmitting the packet through a second tunnel if the packet does not satisfy the at least one packet condition. The predefined tunnel is a first tunnel and is established before the packet is received by the first node. The second tunnel belongs to a first tunnel group or a second tunnel group. The first tunnel, the second tunnel and other tunnels may together form an aggregated connection. Further, the use of predefined tunnel may be based on whether the packets satisfy a session condition.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: February 13, 2018
    Assignee: PISMO LABS TECHNOLOGY LIMITED
    Inventors: Patrick Ho Wai Sung, Kit Wai Chau, Kam Chiu Ng, Wan Chun Leung, Ying Kwan, Martin Langmaid
  • Publication number: 20180034666
    Abstract: A method and a first communications router for transmitting data packets to a second communications router by establishing an aggregated end-to-end connection with the second communications router. The aggregated end-to-end connection comprises a plurality of established end-to-end connections. Data packets are transmitted through a first established end-to-end connection when a first condition is satisfied, and through a second established end-to-end connection when a second condition is satisfied. The first and second established end-to-end connections belong to the aggregated end-to-end connection. The first communications router comprises a plurality of network interfaces.
    Type: Application
    Filed: October 5, 2017
    Publication date: February 1, 2018
    Applicant: Pismo Labs Technology Limited
    Inventors: Patrick Ho Wai SUNG, Kam Chiu NG, Wan Chun LEUNG
  • Patent number: 9876723
    Abstract: The present invention discloses a method carried out by a first communications device for determining performance of a plurality of connections and selecting at least one first connection from the plurality of connections substantially based on performance. Data packets are then transmitted through the at least one first connection. The plurality of connections are aggregated to form an aggregated connection. The determining of performance is performed by transmitting evaluation packets through the plurality of connections. The evaluation packets are based on data packets that are received by the first communication device but have not yet been transmitted through the aggregated connection. The data packets may be designated for a host or node reachable through the aggregated connection. Alternatively, the evaluation packets may be based on predefined information when there are no data packets to be transmitted through the aggregated connection. The performance may be determined periodically.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: January 23, 2018
    Assignee: PISMO LABS TECHNOLOGY LIMITED
    Inventors: Patrick Ho Wai Sung, Wan Chun Leung, Kit Wai Chau, Kam Chiu Ng
  • Patent number: 9871128
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device with sub-cathode enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. The bipolar semiconductor device also includes first and second depletion trenches, each having a depletion electrode. In addition, the bipolar semiconductor device includes a first control trench situated between the first and second depletion trenches, the first control trench extending into the drift region and being adjacent to cathode diffusions. An enhancement region having the first conductivity type is localized in the drift region between the first control trench and one or both of the first and second depletion trenches. In one implementation, the bipolar semiconductor device may be an insulated-gate bipolar transistor (IGBT).
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: January 16, 2018
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Publication number: 20180012983
    Abstract: A semiconductor device includes a drift region of a first conductivity type, an anode region of a second conductivity type situated below the drift region, an inversion region of the second conductivity type situated above the drift region, an enhancement region of the first conductivity type situated between the drift region and the inversion region, first and second control trenches extending through the inversion region and the enhancement region into the drift region, each control trench being bordered by a cathode diffusion region of the first conductivity type, and a superjunction structure situated in the drift region between the first and the second control trenches so that the superjunction structure does not extend under either the first or the second control trench. The superjunction structure is separated from the inversion region by the enhancement region and includes alternating regions of the first and the second conductivity types.
    Type: Application
    Filed: September 1, 2017
    Publication date: January 11, 2018
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Patent number: 9859407
    Abstract: There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) with buried depletion electrode. Such an IGBT may include a collector at a bottom surface of a semiconductor substrate, a drift region having a first conductivity type situated over the collector, and a base layer having a second conductivity type opposite the first conductivity type situated over the drift region. The IGBT also includes a plurality of deep insulated trenches with a buried depletion electrode and at least one gate electrode disposed therein. In addition, the IGBT includes an active cell including an emitter adjacent the gate electrode, and an implant zone, situated between adjacent deep insulated trenches. The implant zone is formed below the base layer and has the first conductivity type. In one implementation, the IGBT may also include a dummy cell neighboring the active cell.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: January 2, 2018
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Yi Tang, Niraj Ranjan, Chiu Ng
  • Publication number: 20170359448
    Abstract: Methods and systems for creating protocol header to allow network device to transfer and receive layer two packets through multiple network links. One or more layer three packets are used to encapsulate layer two packets. The protocol header includes a network link identification and a tunnel sequence number. The network link identification is used to identify the network link and the tunnel sequence number is used to identify the sequence of the one or more layer three packets in a network link. A layer two packet may be encrypted first before being embedded in the one or more layer three packets.
    Type: Application
    Filed: June 13, 2016
    Publication date: December 14, 2017
    Applicant: Pismo Labs Technology Limited
    Inventors: Patrick Ho Wai Sung, Alex Wing Hong CHAN, Kam Chiu NG
  • Publication number: 20170353908
    Abstract: The present invention discloses methods and network nodes for distributing data packets through a plurality of wide area network (WAN) interfaces and through a gateway at a network node. In order to determine whether the gateway is a slave gateway, identification request is sent to the gateway by a network node. When the gateway is configured as a slave gateway, transmitting instruction to the gateway. Further, weighting may be assigned to the WAN interfaces. Further, connections may be established through WAN interfaces of the network node and WAN interfaces of the gateway. The connections may further be aggregated together to form an aggregated connection.
    Type: Application
    Filed: August 21, 2017
    Publication date: December 7, 2017
    Applicant: Pismo Labs Technology Limited
    Inventors: Patrick Ho Wai Sung, Kit Wai Chau, Wan Chun Leung, Kam Chiu Ng
  • Patent number: 9831330
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a deep charge-balanced structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes a control trench extending through an inversion region having the second conductivity type into the drift region, and bordered by a cathode diffusion having the first conductivity type. In addition, the device includes a deep sub-trench structure situated under the control trench. The deep sub-trench structure includes one or more first conductivity regions having the first conductivity type and one or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the one or more second conductivity regions configured to substantially charge-balance the deep sub-trench structure.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: November 28, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Patent number: 9799725
    Abstract: There are disclosed herein various implementations of an insulated-gate bipolar transistor (IGBT) having a deep superjunction structure. Such an IGBT includes a drift region having a first conductivity type situated over a collector having a second conductivity type. The IGBT also includes a gate trench extending through a base having the second conductivity type into the drift region. In addition, the IGBT includes a deep superjunction structure situated under the gate trench. The deep superjunction structure includes one or more first conductivity regions having the first conductivity type and two or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the two or more second conductivity regions configured to substantially charge-balance the deep superjunction structure.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: October 24, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Publication number: 20170302475
    Abstract: A method carried out by a first communication gateway for transmitting broadcast data. Broadcast data is first received through a first network interface. The first communication gateway determines whether the broadcast data satisfies at least one condition, and forwards the broadcast data through at least one tunnel and through a second network interface to a second communication gateway if the broadcast data satisfies the at least one condition. The broadcast data is encapsulated in at least one encapsulating packet and the at least one encapsulating packet is decapsulated by the second communication gateway in order to retrieve the broadcast data. The broadcast data is then distributed by the second communication gateway to a second network.
    Type: Application
    Filed: February 24, 2017
    Publication date: October 19, 2017
    Applicant: Pismo Labs Technology Limited
    Inventors: Ho Mng CHAN, Kam Chiu NG
  • Publication number: 20170302593
    Abstract: The present invention discloses methods and systems for processing data packets received at a first network node and for processing encapsulating packets received at a second network node. The first network node receives data packets from its network interface. It then selects a first tunnel and selects none or at least one second tunnel according to a selection policy. Original encapsulating packets (OEPs) are transmitted to a second network node through the first tunnel and at least one duplicate encapsulating packet (DEP) is transmitted through the at least one second tunnel. The second network node receives an encapsulating packet with a global sequence number (GSN) through an aggregated connection. The second network node determines whether one or more data packets corresponding to the encapsulating packet have been received earlier. The second network node may then determine whether or not to forward the one or more data packets.
    Type: Application
    Filed: February 24, 2017
    Publication date: October 19, 2017
    Applicant: Pismo Labs Technology Limited
    Inventors: Patrick Ho Wai SUNG, Kam Chiu NG, Ho Ming CHAN
  • Patent number: 9787501
    Abstract: A method and a first communications router for transmitting data packets to a second communications router by establishing an aggregated end-to-end connection with the second communications router. The aggregated end-to-end connection comprises a plurality of established end-to-end connections. Data packets are transmitted through a first established end-to-end connection when a first condition is satisfied, and through a second established end-to-end connection when a second condition is satisfied. The first and second established end-to-end connections belong to the aggregated end-to-end connection. The first communications router comprises a plurality of network interfaces.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: October 10, 2017
    Assignee: PISMO LABS TECHNOLOGY LIMITED
    Inventors: Patrick Ho Wai Sung, Kam Chiu Ng, Wan Chun Leung
  • Patent number: 9787776
    Abstract: The present invention discloses methods and systems for transmitting a received packet at a first network node through an aggregated connection. The first network node determines session information of the received packet and determines whether a new tunnel needs to be selected for transmitting the received packet. When a new tunnel needs to be selected, a hash result is determined. The hash result is substantially based on the session information and the number of available tunnels. A first tunnel is determined for transmitting the received packet according to the hash result. The session information and tunnel ID of the first tunnel is then stored in a first database. The received packet is transmitted through the first tunnel. When a new tunnel need not be selected, a lookup is performed to determine a tunnel ID substantially based on the session information. The received packet is transmitted through the determined tunnel.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: October 10, 2017
    Assignee: PISMO LABS TECHNOLOGY LIMITED
    Inventors: Kam Chiu Ng, Patrick Ho Wai Sung, Ying Kwan, Wan Chun Leung
  • Publication number: 20170271445
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having localized enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. The bipolar semiconductor device also includes a first control trench extending through an inversion region having the second conductivity type, and further extending into the drift region, the first control trench being adjacent to cathode diffusions. In addition, the bipolar semiconductor device includes first and second depletion trenches, each having a depletion electrode, the first depletion trench being situated between the second depletion trench and the first control trench. An enhancement region having the first conductivity type is localized in the drift region between the first and second depletion trenches.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 21, 2017
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Publication number: 20170271488
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device with multi-trench enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having an opposite, second conductivity type. The device also includes a first control trench extending through an inversion region having the second conductivity type, and further extending into the drift region, the first control trench being adjacent to cathode diffusions. In addition, the device includes first and second depletion trenches, each having a depletion electrode, the first depletion trench being situated between the second depletion trench and the first control trench. An enhancement region having the first conductivity type is localized in the drift region and extends from the first control trench to the first second depletion trench and further from the first depletion trench to the second depletion trench.
    Type: Application
    Filed: March 18, 2016
    Publication date: September 21, 2017
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Publication number: 20170271487
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device with sub-cathode enhancement regions. Such a bipolar semiconductor device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type opposite the first conductivity type. The bipolar semiconductor device also includes first and second depletion trenches, each having a depletion electrode. In addition, the bipolar semiconductor device includes a first control trench situated between the first and second depletion trenches, the first control trench extending into the drift region and being adjacent to cathode diffusions. An enhancement region having the first conductivity type is localized in the drift region between the first control trench and one or both of the first and second depletion trenches. In one implementation, the bipolar semiconductor device may be an insulated-gate bipolar transistor (IGBT).
    Type: Application
    Filed: March 18, 2016
    Publication date: September 21, 2017
    Inventors: Florin Udrea, Gianluca Camuso, Alice Pei-Shan Hsieh, Chiu Ng, Yi Tang, Rajeev Krishna Vytla, Canhua Li
  • Patent number: 9768284
    Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a charge-balanced inter-trench structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes first and second control trenches extending through an inversion region having the second conductivity type into the drift region, each of the first and second control trenches being bordered by a cathode diffusion having the first conductivity type. In addition, the device includes an inter-trench structure situated in the drift region between the first and second control trenches.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: September 19, 2017
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Florin Udrea, Alice Pei-Shan Hsieh, Gianluca Camuso, Chiu Ng, Yi Tang, Rajeev Krishna Vytla
  • Publication number: 20170250899
    Abstract: The present invention discloses methods and systems for transmitting broadcast data at a communication gateway. When the communication gateway receives a broadcast packet from a host or node, the communication gateway determines whether the broadcast packet satisfies at least one condition. If the broadcast packet satisfies the at least one condition, it is determined whether or not to modify a time to live (TTL) value. The TTL value of the broadcast packet is modified if it is determined to modify the TTL value. The broadcast packet is then forwarded to the destination address of the broadcast packet based on the TTL value. The destination address is reachable through an interconnected network.
    Type: Application
    Filed: October 29, 2014
    Publication date: August 31, 2017
    Applicant: Pismo Labs Technology Limited
    Inventors: Ho Ming Chan, Kam Chiu Ng, Yu Yeung, Kwok Yui Mok