Abstract: An optical sensing module includes a substrate, an optical sensing device, and a plurality of solders. The substrate has an upper surface, and the upper surface has a plurality of first soldering pads. The optical sensing device is disposed upright on the substrate. The optical sensing device includes a transposition plate and an optical sensing package. The transposition plate includes a first surface, a second surface, and a third surface. The first surface has a plurality of second soldering pads, the second surface has a plurality of conductive through holes, and the third surface has a plurality of metal ribs. The conductive through holes are electrically connected to the second soldering pads and the metal ribs. The optical sensing package is disposed on the first surface and electrically connected to the second soldering pads. The plurality of solders climb onto the plurality of metal ribs, respectively.

Abstract: A system for generating situational effects of live real-time sound receiving and application method thereof, comprises: a situational effect controller provided with a plurality of control keys to control different situational effect items, and simultaneously outputs relative situational coding signals to a sound mixer device for mixing sound, then outputs a first audio signal from a live speaker, and a microphone sound receiving module of the situational effect generator can receive a first audio signal of a live environment, which is decoded and read through a situational decoding unit module and generate a corresponding first control signal and a second audio signal to trigger a situational action module to generate a relative situational action. In this way, it can be used in various parties, concerts, movie theaters, or nightclubs, etc., to capture live environmental audio.

Abstract: A capacitor structure for a power semiconductor device includes a semiconductor substrate, an isolation insulating layer having a ring-shape and including an outer periphery and an inner periphery defining an opening region, a first electrode disposed on the isolation insulating layer, a dielectric layer disposed on the first electrode, and a second electrode disposed on the dielectric layer.

Abstract: Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide electronic devices which meet reduced thickness, lower thermal budget, and Vt requirements, and have improved device performance and reliability. The electronic devices described herein comprise a source region, a drain region, and a channel separating the source region and the drain region, an interfacial layer on a top surface of the channel, a high-? dielectric layer on the interfacial layer, a dipole layer on the high-? dielectric layer, and a capping layer on the dipole layer. In some embodiments, the dipole layer comprises a metal oxynitride (MON), such as aluminum oxynitride (AlON). In some embodiments, the methods comprise annealing the substrate to drive atoms from the dipole layer into one or more of the interfacial layer or the high-? dielectric layer.

Abstract: A burner of a gas stove includes a burner body, a partition member, and at least one flame cover. The burner body includes a gas conduit and a base. The gas conduit has at least one gas input passage for injecting gas and air, and the base has at least one mixture passage for mixing the gas and the air. The at least one mixture passage communicates with the at least one gas input passage. The partition member has a plurality of through holes and covers the at least one mixture passage. The at least one flame cover provided with a plurality of flame holes covers the partition member. Whereby, the size of the burner of the gas stove is reduced significantly, and the gas can mix with the air effectively and uniformly.

Abstract: A semiconductor structure and method of manufacture is provided. In some embodiments, a semiconductor structure includes a first doped well doped with a first impurity having a first conductivity type, a second doped well adjacent the first doped well and doped with a second impurity having a second conductivity type opposite the first conductivity type, a third doped well adjacent the second doped well and doped with a third impurity having the first conductivity type, a fourth doped region in the third doped well and doped with a fourth impurity having the second conductivity type, and a deep doped well doped with a fifth impurity having the first conductivity type under a first portion of the second doped well, under the third doped well, and under the fourth doped region.

Abstract: Methods of forming metallic tungsten films selectively on a conductive surface relative to a dielectric surface are described. A substrate is exposed to a first process condition to deposit a tungsten-containing film that is substrate free of tungsten metal. The tungsten-containing film is then converted to a metallic tungsten film by exposure to a second process condition.

Abstract: A capacitor structure for a power semiconductor device includes a semiconductor substrate, an isolation insulating layer having a ring-shape and including an outer periphery and an inner periphery defining an opening region, a first electrode disposed on the isolation insulating layer, a dielectric layer disposed on the first electrode, and a second electrode disposed on the dielectric layer.

Abstract: A transmission structure of a climbing machine for an operator to operate in a standing position is disclosed. The transmission structure of the climbing machine includes a base, a support frame, a first slide rail, a second slide rail, a first transmission unit, a second transmission unit, a first handle slider, a first pedal slider, a second handle slider, a second pedal slider, and a resistance unit. The climbing machine is used to train the synchronized and coordinated movements of hands and feet for simulating rock climbing and mountaineering. The support frame, the first slide rail, the second slide rail, the first transmission unit and the second transmission unit are all located at the center line position of the upright trunk of the operator. The volume of the climbing machine can be reduced greatly to save the space occupied.

Abstract: A method for manufacturing a device may include providing an ultra-high voltage (UHV) component that includes a source region and a drain region, and forming an oxide layer on a top surface of the UHV component. The method may include connecting a low voltage terminal to the source region of the UHV component, and connecting a high voltage terminal to the drain region of the UHV component. The method may include forming a shielding structure on a surface of the oxide layer provided above the drain region of the UHV component, forming a high voltage interconnection that connects to the shielding structure and to the high voltage terminal, and forming a metal routing that connects the shielding structure and the low voltage terminal.

Abstract: Embodiments of the present disclosure advantageously provide improved control over precursor/reactant pulse/purge time, greater growth per cycle, and higher throughput during formation of a metal-containing film on a substrate surface (including substrate surfaces having at least one feature) compared to traditional atomic layer deposition (ALD) processes. In some embodiments, forming the metal-containing film comprises exposing a substrate to a constant flow of an inert carrier gas and a co-flow of a pulse of a metal-containing precursor and a pulse of a reactant. The pulse of the metal-containing precursor and the pulse of the reactant may be interrupted by a mini purge. The metal-containing precursor and/or the reactant may be charged during the mini purge to avoid precursor/reactant depletion.

Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.

Abstract: A method for manufacturing a device may include providing an ultra-high voltage (UHV) component that includes a source region and a drain region, and forming an oxide layer on a top surface of the UHV component. The method may include connecting a low voltage terminal to the source region of the UHV component, and connecting a high voltage terminal to the drain region of the UHV component. The method may include forming a shielding structure on a surface of the oxide layer provided above the drain region of the UHV component, forming a high voltage interconnection that connects to the shielding structure and to the high voltage terminal, and forming a metal routing that connects the shielding structure and the low voltage terminal.

Abstract: A power converter includes a high side switch, a low side switch, a low side driver, a loading detector, a configurable regulator and a high side driver. The low side driver generates a low side drive signal to control the low side switch. The configurable regulator generates a regulation voltage, a magnitude of which is greater when the loading detector detects that the power converter has light loading than when the loading detector detects that the power converter has heavy loading. The high side driver generates a high side drive signal that switches between the input voltage and the regulation voltage to control the high side switch.

Abstract: Various embodiments of the present application are directed towards an integrated circuit (IC) in which a high voltage metal-oxide-semiconductor (HVMOS) device is integrated with a high voltage junction termination (HVJT) device. In some embodiments, a first drift well and a second drift well are in a substrate. The first and second drift wells border in a ring-shaped pattern and have a first doping type. A peripheral well is in the substrate and has a second doping type opposite the first doping type. The peripheral well surrounds and separates the first and second drift wells. A body well is in the substrate and has the second doping type. Further, the body well overlies the first drift well and is spaced from the peripheral well by the first drift well. A gate electrode overlies a junction between the first drift well and the body well.

Abstract: Embodiments of the present disclosure generally relate to methods of cleaning a structure and methods of depositing a capping layer in a structure. The method of cleaning a structure includes suppling a cleaning gas, including a first gas including nitrogen (N) and a second gas including fluorine (F), to a bottom surface of a structure. The cleaning gas removes unwanted metal oxide and etch residue from the bottom surface of the structure. The method of depositing a capping layer includes depositing the capping layer over the bottom surface of the structure. The methods described herein reduce the amount of unwanted metal oxides and residue, which improves adhesion of deposited capping layers.

Abstract: Embodiments of the present disclosure are related to methods of preventing aluminum diffusion in a metal gate stack (e.g., high-? metal gate (HKMG) stacks and nMOS FET metal gate stacks). Some embodiments relate to a barrier layer for preventing aluminum diffusion into high-? metal oxide layers. The barrier layer described herein is configured to reduce threshold voltage (Vt) shift and reduce leakage in the metal gate stacks. Additional embodiments relate to methods of forming a metal gate stack having the barrier layer described herein. The barrier layer may include one or more of amorphous silicon (a-Si), titanium silicon nitride (TiSiN), tantalum nitride (TaN), or titanium tantalum nitride (TiTaN).

Abstract: A somatosensory generation system featuring with thermal effects, includes a somatosensory effect controller used to access and process audio signals or control signals of actions or events of games, movies, AR/VR or application software from media players, game consoles, personal computers, AR/VR devices, and transmit them to at least a somatosensory effect conversion device and a plurality of somatosensory transducers are staggered distribution on the carrier to react the simulated waveform and heating information in corresponding to the portions of torso and limbs of the human body. This somatosensory generation system enhances immersive presence of entertainment dramatically and make users like to enter live action scenes through both haptic feedback and thermal effect applied on user's body.

Abstract: A capacitor structure for a power semiconductor device includes a semiconductor substrate, an isolation insulating layer having a ring-shape and including an outer periphery and an inner periphery defining an opening region, a first electrode disposed on the isolation insulating layer, a dielectric layer disposed on the first electrode, and a second electrode disposed on the dielectric layer.

Abstract: Substrate support, substrate support assemblies and process chambers comprising same are described. The substrate support has a thermally conductive body with a top surface, a bottom surface and an outer edge, and a plurality of long edge purge channel outlet opening at the outer edge of the thermally conductive body. The substrate support is configured to support a substrate to be processed on a top surface of the substrate support. The top surface of the thermally conductive body may have a ceramic coating. Each of the plurality of purge channel outlet is in fluid communication with a long edge purge channel. The long edge purge channel is coated with a long edge purge channel coating. A substrate support assembly includes the substrate support and the support post coupled to the substrate support. The processing chamber include a chamber body and the substrate support within the chamber body.