Patents by Inventor Chou Lin

Chou Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190323671
    Abstract: An optical lighting device includes an optical element having a light incident surface and a light emitting surface, wherein at least one first anamorphic asphere is deployed on either of the light incident surface or the light emitting surface. A first light source being square deployed on one side of the optical element and opposite to the light incident surface. The light source projects into the light incident surface, refracts by the first anamorphic asphere, transmits out of the light emitting surface and forms a predetermined light distribution area with a cut-off line on the upper fringe. Therefore, the optical lighting device has the advantage of simplified structure and high lighting efficiency.
    Type: Application
    Filed: April 18, 2019
    Publication date: October 24, 2019
    Inventor: Po-Chou LIN
  • Patent number: 10452565
    Abstract: A secure electronic device is disclosed. The secure electronic device includes a first core processing unit, a secure boot Read-Only Memory, a first non-volatile memory, a first volatile memory and a first communication interface. A new framework based on the secure electronic device with built-in security is able to safeguard intellectual property for the developers and further improves the security of the secure electronic device. Thus, more developers can launch their programs or services without being stolen or tampered by an unauthorized party.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: October 22, 2019
    Assignee: SUNASIC TECHNOLOGIES, INC.
    Inventors: Chi Chou Lin, Hao-Jyh Liu, Zheng Ping He
  • Publication number: 20190311097
    Abstract: A biometric security device for digital key storing is disclosed. The biometric security device includes a biometric information fetching module and a processing module. The processing module has a nonvolatile storage unit and a processing unit. The nonvolatile storage unit includes a secure storage unit and a general storage unit. The biometric security device with a secure electronic key designed for storing secret data utilizes both TrustZoneā„¢ technology (or similar technology) and biometric authentication. Thus, it can provide the flexibility for multiple users or applications to use the biometric security device or any equipment the biometric security device mounted in without compromising the safeguard of the data stored therein.
    Type: Application
    Filed: April 9, 2018
    Publication date: October 10, 2019
    Inventors: Chi Chou LIN, Zheng Ping HE
  • Patent number: 10430052
    Abstract: The disclosure is related to a method and a system for processing composited images. The method is operated in a computer. A software-enabled user interface is provided for a user to create a composited image using a touch screen. In the beginning, in response to the user's manipulation, at least two images are retrieved from a database. A background image and a foreground image are selected from the images. The user interface allows the user using a gesture over the background image displayed on the touch screen for generating a series of touch signals covering a specific area. The touch signals render a mask image. The mask is applied to the foreground image. The mask image of the background image covers the foreground image so as to create a new foreground image. The composited image is created when the new foreground image is composited with the background image.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: October 1, 2019
    Assignee: FRAMY INC.
    Inventors: Yu-Hsien Li, Wen-Shiang Lin, Chen-Chou Lin
  • Patent number: 10385876
    Abstract: A vibration-proofed fan frame includes a housing and a base surrounded by the housing. A hollow tube is arranged on the base and has the rotary connection with an impeller of the heat dissipation fan. The base includes a disc and a plurality of ribs extending outwards from periphery of the disc. The fan frame further includes a buffer member within the structural interconnections between the disc and the housing. The buffer member includes first elements. The first elements are embedded in the disc. A heat dissipation fan having the fan frame described is also presented.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: August 20, 2019
    Assignee: CHAMP TECH OPTICAL (FOSHAN) CORPORATION
    Inventors: Hsien-Chou Lin, Xiao-Guang Ma, Yung-Ping Lin, Chien-Nan Cheng, Zheng Luo
  • Publication number: 20190220419
    Abstract: A secure electronic device is disclosed. The secure electronic device includes a first core processing unit, a secure boot Read-Only Memory, a first non-volatile memory, a first volatile memory and a first communication interface. A new framework based on the secure electronic device with built-in security is able to safeguard intellectual property for the developers and further improves the security of the secure electronic device. Thus, more developers can launch their programs or services without being stolen or tampered by an unauthorized party.
    Type: Application
    Filed: January 12, 2018
    Publication date: July 18, 2019
    Inventors: Chi Chou LIN, Hao-Jyh LIU, Zheng Ping HE
  • Patent number: 10352557
    Abstract: A burner includes a base and a combustion tray, wherein the base has an inlet pipe and two horn-shaped tubes. The horn-shaped tubes are connected to opposite sides of the inlet pipe, wherein each of the horn-shaped tubes respectively has a first section. A length of the first sections is no less than an inner diameter of the inlet pipe at where the horn-shaped tubes are connected to. The combustion tray is engaged with the base, and communicates with the horn-shaped tubes. Whereby, gas and air could be fully mixed while flowing through each of the first sections. The symmetrical horn-shaped tubes could direct the airflow to the combustion tray, where the airflow could be outputted from flame vents of the combustion tray, whereby to generate more even flame, and to enhance the heating efficiency.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: July 16, 2019
    Assignee: GRAND MATE CO., LTD.
    Inventors: Chung-Chin Huang, Chin-Ying Huang, Hsin-Ming Huang, Hsing-Hsiung Huang, Yen-Jen Yeh, Wei-Long Chen, Kuan-Chou Lin, Tang-Yuan Luo
  • Patent number: 10344968
    Abstract: A gas mixer includes a flow splitter and a base having an inlet portion and a mixing portion. The inlet portion has an air inlet, an air chamber, an at least one gas inlet, and an opening, communicating with each other. The air chamber has two opposite walls, which are inclined, and a distance therebetween gradually decreases from the air inlet to the opening. The gas inlet is located on one of the walls. The mixing portion has a mixing chamber communicating with the opening and a burner, respectively. The flow splitter is provided in the air chamber and located between the gas inlet and the air inlet. The flow splitter has at least one through hole facing one of the walls. Therefore, air and gas could be effectively premixed and outputted to the burner, whereby to accurately control the air-fuel ratio to enhance the combustion efficiency of the burner.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: July 9, 2019
    Assignee: GRAND MATE CO., LTD.
    Inventors: Chung-Chin Huang, Chin-Ying Huang, Hsin-Ming Huang, Hsing-Hsiung Huang, Yen-Jen Yeh, Wei-Long Chen, Kuan-Chou Lin, Tang-Yuan Luo
  • Patent number: 10346665
    Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units forming an array, each capacitive sensing unit for transforming a distance between a portion of a surface of an approaching finger and a top surface thereof into an output electric potential, wherein a value of the output electric potential is changed by a driving signal applied to the sensing unit; at least one sample-and-hold circuit for capturing and retaining different output electric potentials; at least one signal conditioning circuit, each comprising at least one differential amplifier for amplifying a difference between two electric potentials retained by the sample-and-hold circuit; and a driving source, for providing the driving signal to the capacitive sensing units.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: July 9, 2019
    Assignee: SUNASIC TECHNOLOGIES LIMITED
    Inventors: Chi Chou Lin, Zheng Ping He
  • Publication number: 20190165167
    Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.
    Type: Application
    Filed: October 29, 2018
    Publication date: May 30, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Chou LIN, Yi-Cheng CHIU, Karthick MURUKESAN, Yi-Min CHEN, Shiuan-Jeng LIN, Wen-Chih CHIANG, Chen-Chien CHANG, Chih-Yuan CHAN, Kuo-Ming WU, Chun-Lin TSAI
  • Publication number: 20190164350
    Abstract: A three-dimensional modeling method and a three-dimensional modeling system are provided.
    Type: Application
    Filed: December 27, 2017
    Publication date: May 30, 2019
    Inventors: Po-Fu Yen, Zhong-Yi Haung, Shang-Yi Lin, Kang-Chou Lin, Tung-Fa Liou, Yung-Cheng Cheng
  • Publication number: 20190157102
    Abstract: Methods and apparatus for reducing and eliminating defects in tungsten film are disclosed herein. In the present disclosure, reducing or eliminating oxidation of a first surface of a tungsten film having a predetermined first thickness disposed upon a substrate and within a plurality of trenches is disclosed. The plurality of trenches include a predetermined depth, and a width of less than 20 nanometers. The predetermined first thickness of the tungsten film is substantially uniform throughout the plurality of trenches such that the predetermined first thickness of the tungsten film does not substantially change to a second thickness when the first surface is contacted with air or oxygen.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 23, 2019
    Inventors: GUOQIANG JIAN, WEI TANG, CHI-CHOU LIN, PAUL F. MA, KAI WU, VIKASH BANTHIA, MEI CHANG, JIA YE, WENYU ZHANG, JING ZHOU
  • Patent number: 10297661
    Abstract: The present disclosure relates to a high voltage resistor device that is able to receive high voltages using a small footprint, and an associated method of fabrication. In some embodiments, the high voltage resistor device has a substrate including a first region with a first doping type, and a drift region arranged within the substrate over the first region and having a second doping type. A body region having the first doping type laterally contacts the drift region. A drain region having the second doping type is arranged within the drift region, and an isolation structure is over the substrate between the drain region and the body region. A resistor structure is over the isolation structure and has a high-voltage terminal coupled to the drain region and a low-voltage terminal coupled to a gate structure over the isolation structure.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: May 21, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Cheng Chiu, Wen-Chih Chiang, Chun Lin Tsai, Kuo-Ming Wu, Shiuan-Jeng Lin, Yi-Min Chen, Hung-Chou Lin, Karthick Murukesan
  • Publication number: 20190131296
    Abstract: Various embodiments of the present application are directed towards an integrated circuit (IC) in which a bootstrap metal-oxide-semiconductor (MOS) device is integrated with a high voltage metal-oxide-semiconductor (HVMOS) device and a high voltage junction termination (HVJT) device. In some embodiments, a drift well is in the semiconductor substrate. The drift well has a first doping type and has a ring-shaped top layout. A first switching device is on the drift well. A second switching device is on the semiconductor substrate, at an indent in a sidewall the drift well. A peripheral well is in the semiconductor substrate and has a second doping type opposite the first doping type. The peripheral well surrounds the drift well, the first switching device, and the second switching device, and further separates the second switching device from the drift well and the first switching device.
    Type: Application
    Filed: September 12, 2018
    Publication date: May 2, 2019
    Inventors: Karthick Murukesan, Wen-Chih Chiang, Chiu-Hua Chung, Chun Lin Tsai, Kuo-Ming Wu, Shiuan-Jeng Lin, Tien Sheng Lin, Yi-Min Chen, Hung-Chou Lin, Yi-Cheng Chiu
  • Patent number: 10270615
    Abstract: A method of providing operating options of an electric appliance is applied in a wireless system, which includes a portable device, an electric appliance, and a relay apparatus. The portable device and the relay apparatus are connected to each other within either a near-end network or a far-end network. The electric appliance communicates with the relay apparatus, and has a plurality of operating options which can be selected to operate the electric appliance. If the portable device and the relay apparatus are connected within the near-end network, all of the operating options are displayed on the portable device for selection; if it's within the far-end network, a part of the operating options are disabled on the portable device for selection.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: April 23, 2019
    Assignee: GRAND MATE CO., LTD.
    Inventors: Chung-Chin Huang, Chin-Ying Huang, Hsin-Ming Huang, Hsing-Hsiung Huang, Yen-Jen Yeh, Kuan-Chou Lin, Yu-Chin Tsai
  • Publication number: 20190109189
    Abstract: The present disclosure, in some embodiments, relates to a high voltage resistor device. The device includes a buried well region disposed within a substrate and having a first doping type. A drift region is disposed within the substrate and contacts the buried well region. The drift region has the first doping type. A body region is disposed within the substrate and has a second doping type. The body region laterally contacts the drift region and vertically contacts the buried well region. An isolation structure is over the drift region and a resistor structure is over the isolation structure.
    Type: Application
    Filed: November 26, 2018
    Publication date: April 11, 2019
    Inventors: Yi-Cheng Chiu, Wen-Chih Chiang, Chun Lin Tsai, Kuo-Ming Wu, Shiuan-Jeng Lin, Yi-Min Chen, Hung-Chou Lin, Karthick Murukesan
  • Publication number: 20190096988
    Abstract: Various embodiments of the present application are directed towards an integrated circuit (IC) in which a high voltage metal-oxide-semiconductor (HVMOS) device is integrated with a high voltage junction termination (HVJT) device. In some embodiments, a first drift well and a second drift well are in a substrate. The first and second drift wells border in a ring-shaped pattern and have a first doping type. A peripheral well is in the substrate and has a second doping type opposite the first doping type. The peripheral well surrounds and separates the first and second drift wells. A body well is in the substrate and has the second doping type. Further, the body well overlies the first drift well and is spaced from the peripheral well by the first drift well. A gate electrode overlies a junction between the first drift well and the body well.
    Type: Application
    Filed: April 27, 2018
    Publication date: March 28, 2019
    Inventors: Karthick Murukesan, Wen-Chih Chiang, Chun Lin Tsai, Ker-Hsiao Huo, Kuo-Ming Wu, Po-Chih Chen, Ru-Yi Su, Shiuan-Jeng Lin, Yi-Min Chen, Hung-Chou Lin, Yi-Cheng Chiu
  • Publication number: 20190078681
    Abstract: A lubricatable ball screw device includes a ball screw shaft, a ball nut slidably sleeved on the ball screw shaft and having oil guide holes, a linear bearing unit mounted between the ball screw shaft and the ball nut, a bearing ring rotatably sleeved on the ball nut and having an oil supplying hole, a positioning portion disposed between the bearing ring and the ball nut, and an oil passage corresponding to the oil supplying hole. The oil supplying hole, the oil passage, an oil storage space of the positioning portion and any one of the oil guide holes cooperatively form a continuous oil path.
    Type: Application
    Filed: September 8, 2017
    Publication date: March 14, 2019
    Inventors: WEI-CHOU LIN, CHENG-MING SU, CHENG-LUNG WANG, PO-JUNG HUANG
  • Patent number: 10216974
    Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. In order to generate a noise-reduced image of a fingerprint, the capacitive image sensor has an array of capacitive sensing units which each has a protective layer; a sensing electrode; a voltage follower; a comparative capacitor; and a bias voltage supply circuit. The comparative capacitor, a portion of the bias voltage supply circuit, and the voltage follower are formed in an isolated well which is configured in such a way that current is able to be prevented from flowing across an interface in the isolated well and surrounding structures. The driving source is connected to a bulk node of the isolated well such that well potential of the isolated well equals to the output electric potential of a driving source.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: February 26, 2019
    Assignee: SUNASIC TECHNOLOGIES LIMITED
    Inventors: Chi Chou Lin, Zheng Ping He
  • Publication number: 20190057863
    Abstract: Methods and apparatus for forming a semiconductor structure, including depositing a doping stack having a first surface atop a high-k dielectric layer, wherein the doping stack includes at least one first metal layer having a first surface, at least one second metal layer comprising a first aluminum dopant and a first surface, wherein the second metal layer is atop the first surface of the first metal layer, and at least one third metal layer atop the first surface of the second metal layer; depositing an anneal layer atop the first surface of the doping stack; annealing the structure to diffuse at least the first aluminum dopant into the high-k dielectric layer; removing the anneal layer; and depositing at least one work function layer atop the first surface of the doping stack.
    Type: Application
    Filed: August 17, 2018
    Publication date: February 21, 2019
    Inventors: YIXIONG YANG, PAUL F. MA, WEI V. TANG, WENYU ZHANG, SHIH CHUNG CHEN, CHEN HAN LIN, CHI-CHOU LIN, YI XU, YU LEI, NAOMI YOSHIDA, LIN DONG, SIDDARTH KRISHNAN