Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes forming a first image sensor element within a first substrate and a second image sensor element within a second substrate. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths and the second image sensor element is configured to generate electrical signals from electromagnetic radiation within a second range of wavelengths. A plurality of deposition processes are performed to form a band-pass filter over the second substrate. The band-pass filter has a plurality of alternating layers of a first material having a first refractive index and a second material having a second refractive index that is less than the first refractive index. The first substrate is bonded to the band-pass filter.

Abstract: A semiconductor device and method of manufacture are presented in which a first pad and a second pad are formed adjacent to each other. A first set of dummy pads is manufactured between the first pad and the second pad and bonding pads are formed in electrical connection to the first pad and the second pad.

Abstract: An imaging lens assembly, having an optical axis, includes an imaging lens set and a lens holding member. The lens holding member accommodates the imaging lens set for aligning the imaging lens set with the optical axis. The lens holding member includes a plurality of light-blocking structures, which are disposed on an object side of the imaging lens set and surround the optical axis for forming a light passing hole. Each of the light-blocking structures is a straight-line shape and has two end points and one central point, and the central point is closer to the optical axis than each of the two end points thereto. A maximum radius of the light passing hole is defined by a position near each of the two end points, and a minimum radius thereof is defined by a position near the central point.

Abstract: Provided are methods of treating, mitigating, or preventing or delaying the growth, proliferation, recurrence or metastasis of, a Trop-2 expressing cancer in a subject by administering an effective amount of: (a) an agent that inhibits binding between CD47 and SIRP? (e.g., magrolimab); and (b) an anti-Trop-2 antibody drug conjugate (ADC) (e.g., sacituzumab govitecan) to the subject.

Abstract: A flow diverter including a self-expanding tubular member having a plurality of expandable cells, each of the expandable cells having interconnected struts and bridges. The tubular member has a constrained configuration having a first outer diameter of at least 1.0 mm sized for delivery using a flow diverter delivery system and an expanded configuration having a second outer diameter larger than the first outer diameter. The tubular member has a proximal end zone, a distal end zone, and a middle zone located between the proximal end zone and the distal end zone. At least the middle zone of the tubular member is laser-cut to have a material coverage of at least 25% when the tubular member is in the expanded configuration. Related devices, systems, and methods of treating disease, particularly intracranial and cerebral aneurysms by deploying implantable expandable devices, are provided.

Abstract: A memory device includes a first memory cell having a first polysilicon line associated with a first read word line and intersecting a first active region and a second active region, and a second polysilicon line and a first CPODE associated with a first program word line, the second polysilicon line intersecting the first active region and the first CPODE intersecting the second active region. The memory device also includes a second memory cell adjacent to the first memory cell, the second memory cell having a third polysilicon line associated with a second read word line and intersecting the first active region and the second active region, and a fourth polysilicon line and a second CPODE associated with a second program word line, the fourth polysilicon line intersecting the second active region and the second CPODE intersecting the first active region to form a cross-arrangement of CPODE.

Abstract: An apparatus including a policy acquisition circuit, a parameter acquisition circuit, and a parameter storage circuit. The policy acquisition circuit interprets a vehicle policy data value having at least one requested vehicle property. The parameter acquisition circuit interprets vehicle parameter values from providing end points each on at least one network zone of a vehicle. The parameter storage circuit selectively stores a portion of the vehicle parameter values. A first portion of the stored portion of the vehicle parameter values is stored on a storage end point distinct from an associated one of the providing end points for the at least a first portion of the stored vehicle parameter values. The parameter storage circuit also determines a reserved memory amount by determining an amount of data to be collected to support the at least a portion of the vehicle parameter values.

Abstract: An interlayer film 10 for laminated glass comprises a first resin layer 11, a second resin layer 12, and a plastic layer 13 disposed between the first and second resin layers 11 and 12, wherein: the first resin layer 11 comprises a thermoplastic resin, and has a thickness of 900 ?m or less, and a magnesium element content of less than 25 ppm; the second resin layer 12 comprises a thermoplastic resin, and has a total content of magnesium element and potassium element of 25 ppm or more; and the interlayer film for laminated glass satisfies requirements to have a mean break height (MBH) of 5 m or more in a falling ball test conducted in accordance with JIS R 3212: 2015 for two glass sheets each having a thickness of 2.5 mm laminated via the interlayer film 10 for laminated glass, in both cases with a water content of the interlayer film for laminated glass of 0.4% and 2.0%.

Abstract: A laser device includes a first waveguiding layer, an active layer, a second waveguiding layer, a contact layer, a first insulating layer, a plurality of hole fillings, a first electrode, and a second electrode. The first waveguiding layer, the active layer, the second waveguiding layer, and the contact layer are stacked in sequence to form an epitaxy structure. The epitaxy structure has a first platform, the first platform has multiple holes to form a photonic crystal structure. The first insulating layer is over an upper surface and a sidewall surface of the first platform, wherein the first insulating layer has a first aperture corresponding to the photonic crystal structure. The hole fillings are respectively filled in the holes. The first electrode is over the photonic crystal structure. The second electrode is electrically connected to the first waveguiding layer.

Abstract: Methods of treating intracranial atherosclerotic disease carotid atherosclerosis, and intracranial and cerebral aneurysms by deploying implantable expandable devices. A catheter system is advanced through a base sheath towards an intracranial vessel having an atherosclerotic lesion. A tapered end region of an inner catheter is positioned distal to a distal end of an outer catheter, at least a portion of the tapered end region of the inner catheter crosses the lesion. The outer catheter is advanced over the inner catheter across the lesion. The inner catheter is withdrawn while the outer catheter is maintained in place. A stent delivery system is advanced through the catheter lumen. The outer catheter is withdrawn to unsleeve the stent and the stent delivery system maintained in place. The stent is deployed against the lesion. Related devices, systems, and methods are provided.

Abstract: A motor controller includes a motor drive unit configured to drive and control a motor, an electrical discharge control unit configured to perform control in which regenerative power from the motor is consumed by a regenerative power discharge resistor, and a housing formed to accommodate the motor drive unit and the electrical discharge control unit, wherein at least a part of the housing is configured as the regenerative power discharge resistor.

Abstract: Graphic code processing includes displaying a graphic code scanning interface that is used for previewing at least one frame of acquired scanning image. In response to n graphic codes being included in the at least one frame of scanning image, recognition is performed on the n graphic codes to obtain n contact accounts. A service processing interaction region is displayed that includes contact controls corresponding to the n contact accounts. The service processing interaction region is configured to provide a service corresponding to at least one contact account in the n contact accounts. The n contact accounts can be obtained by scanning codes in batches to add friends and transmit files.

Abstract: A solid state disk, a data transmitting method and an intermediary controller thereof are provided. The solid state disk includes at least two flash memories, a SSD controller and an intermediary controller. The intermediary controller is connected between the flash memories and the SSD controller. The intermediary controller includes at least two flash interfaces, a customized interface and a data buffering unit. The flash interfaces are connected to the flash memories. The customized interface is connected to the SSD controller. The intermediary controller has a first clock domain and a second clock domain. The first clock domain is used for transmitting data from the flash memories to the data buffering unit. The second clock domain is used for transmitting data from the data buffering unit to the SSD controller. A frequency of the second clock domain is higher than a frequency of the first clock domain.

Abstract: One aspect of the present invention is to provide the device and methods for performing an assay that uses the multiplexing of sample thicknesses on the same plate. The sample thickness multiplexing can offer many information that are unavailable in using a single sample thickness.

Abstract: A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate. The chip is mounted on the chip mounting area, a space exists between a first bump and a second bump of the chip, and there are no additional bumps between the first and second bumps. A first inner lead, a second inner lead, a first dummy lead and a second dummy lead of the circuit layer are located on the chip mounting area. The first and second inner leads are electrically connected to the first and second bumps respectively. The first dummy lead is connected to the first inner lead and adjacent to the first bump, and the second dummy lead is connected to the second inner lead and adjacent to the second bump.

Abstract: A semiconductor structure and a method for forming a semiconductor structure are provided. The semiconductor structure includes a substrate; a doped region within the substrate; a pair of source/drain regions extending along a first direction on opposite sides of the doped region; a gate electrode disposed in the doped region, wherein the gate electrode has a plurality of first segments extending in parallel along the first direction; and a protection structure over the substrate and at least partially overlaps the gate electrode.

Abstract: A method for forming a high electron mobility transistor (HEMT) includes forming a buffer layer on a transparent substrate. The method further includes forming a barrier layer on the buffer layer. A channel region is formed in the buffer layer adjacent to the interface between the buffer layer and the barrier layer. The method further includes forming a dielectric layer on the barrier layer. The method further includes forming source/drain electrodes through the dielectric layer and the barrier layer and disposed on the buffer layer. The method further includes forming a shielding layer conformally covering the dielectric layer and the source/drain electrodes. The method further includes performing a thermal process on the source/drain electrodes.

Abstract: A distributed system of home device controllers can control a set of home devices. A home device controller of the system can determine a set of configurations for a set of home devices being repeatedly configured by a user. The controller can automatically display a selectable feature indicating a suggested scene corresponding to the set of configurations for the set of home devices. The system can receive one or more inputs to select the suggested scene, and based at least in part on the one or more inputs, associate the suggest scene with a set of triggers. In response to detecting the set of triggers, the controller can automatically transmit a set of commands that correspond to the suggested scene to the set of home devices to execute the suggested scene.

Abstract: A calibration method for a phased array of antennas, wherein the phased array of antennas comprises N antenna elements, the N antenna elements are decomposed into G sub-arrays, each of the G sub-arrays comprises M antenna elements, and the calibration method comprises: (a) inputting a set of digital control codes to RF devices in order to produce field signals corresponding to an operation order r to the G sub-arrays' radiations; (b) measuring the observation field signals of the G sub-arrays corresponding to the operation order r in a fixed position to produce a DFT relationship with respect to the RF devices' operations; and (c) repeating operations (a) to (b) corresponding to the operation order r from 1 to G for generating error-calibrating signals corresponding to the signals of the G sub-arrays.

Abstract: A compound control circuit comprises an input end, a light-load signal processing circuit, a slow response circuit and a fast response circuit. The compound control circuit is mainly used as an additional circuit of a work control chip, so that although the work control chip only has a single overcurrent protection level, a compound function control of fast and slow speed, high and low level current protection and light-load signal stabilization can be generated through the compound control circuit, so as to meet the complex application environment and compatible requirements of the current power supply.