Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230193016
    Abstract: A benzoxazine resin, including a compound of the following Formula 1-1: where R1, R2, and R3 are as defined herein.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 22, 2023
    Inventors: Shih-Hao LIAO, Min-Yuan YANG, Ya-Yen CHOU, Jheng-Hong CIOU, Cheng-Chung CHEN
  • Publication number: 20230197617
    Abstract: A connecting structure includes a substrate, a first conductive feature, a second conductive feature, a third conductive feature over the first conductive feature, and a fourth conductive feature over the second conductive feature. The substrate includes a first region and a second region. The first conductive feature is disposed in the first region and has a first width. The second conductive feature is disposed in the second region and has a second width greater than the first width of the first conductive feature. The third conductive feature includes a first anchor portion surrounded by the first conductive feature. The fourth conductive feature includes a second anchor portion surrounded by the second conductive feature. A depth difference ratio between a depth of the first anchor portion and a depth of the second anchor portion is less than approximately 10%.
    Type: Application
    Filed: February 15, 2023
    Publication date: June 22, 2023
    Inventors: U-TING CHIU, YU-SHIH WANG, CHUN-CHENG CHOU, YU-FANG HUANG, CHUN-NENG LIN, MING-HSI YEH
  • Publication number: 20230192878
    Abstract: The present disclosure describes single agent and combination therapies and uses for the treatment of cancer and/or cancer-associated diseases. The single agent and combinations therapies include a BCMA antibody.
    Type: Application
    Filed: May 13, 2021
    Publication date: June 22, 2023
    Applicant: PFIZER INC.
    Inventors: Nathalie Annie BARDY BOUXIN, Eloisa Virginia BARRY, John Andrew BLAKE-HASKINS, Geoffrey Wing-Lynn CHAN, Jeffrey CHOU, Mohamed A ELMELIEGY, Heike Iris KRUPKA, Kai Hsin LIAO, Erik Rene VANDENDRIES, Andrea VIQUEIRA, Paul Stephen WISSEL, Anne YVER
  • Publication number: 20230195175
    Abstract: A foldable electronic apparatus with an adjusting bracket includes a first body having a rail and steps disposed along the rail, a second body pivotally connected to the first body to pivot and be unfolded and folded relative thereto, a first supporting member having first and second ends opposite to each other, and a second supporting member having third end and fourth ends opposite to each other. The first end is pivotally connected to the first body. The second end is pivotally connected to the second supporting member and located between the third and fourth ends. The third end is movably coupled to the rail. The first and second supporting members and the second body form a linkage mechanism, so the first and second supporting members pivot relative to the first body. The steps limit the third end to generate a unique moving path on the rail.
    Type: Application
    Filed: May 25, 2022
    Publication date: June 22, 2023
    Applicant: Acer Incorporated
    Inventors: Hui-Ping Sun, Chun-Hung Wen, Yen-Chou Chueh, Chun-Hsien Chen
  • Publication number: 20230194531
    Abstract: The present disclosure relates to the field of biotechnologies. Specifically disclosed are an interferon signaling pathway-related gene panel and an in vitro diagnostic product thereof, and the use of the same in assessing the recurrence risk of breast cancer and/or providing guidance for breast cancer treatment with interferon.
    Type: Application
    Filed: March 3, 2021
    Publication date: June 22, 2023
    Inventors: Tong Zhou, Jeff Weiqing Chou, Zhiyuan Hu, Linlin Ma, Junhuan Lu
  • Publication number: 20230190832
    Abstract: A strain of Lactobacillus paracasei for promoting hair growth, a hair product having same, and a use thereof are disclosed. The strain of Lactobacillus paracasei is Lactobacillus paracasei GMNL-653, which was deposited at the China Center for Type Culture Collection in Wuhan, China on Apr. 25, 2016 under an accession number CCTCC NO. M 2016226.
    Type: Application
    Filed: April 8, 2022
    Publication date: June 22, 2023
    Applicant: GENMONT BIOTECH INC.
    Inventors: Wan-hua Tsai, Chia-hsuan Chou, Tsuei yin Huang, Ying-ju Chiang, Ching-gong Lin
  • Publication number: 20230189821
    Abstract: A pesticidal mixture of an oil and an aliphatic acid is provided. In mixture, the aliphatic acid and oil are each effective to reduce the mixture's melting point (or viscosity transition point) to below the oil's and acid's melting points (or viscosity transition points). The mixture can be eutectic, such that the melting point of the mixture is less than both the oil melting point and the acid melting point. The oil can be a fatty acid ester, such as a wax ester. The aliphatic acid can be a fatty acid. Pesticidal mixtures comprising various natural pesticidal oils are disclosed, including neem oil, palm oil, coconut oil, and karanja oil.
    Type: Application
    Filed: May 6, 2021
    Publication date: June 22, 2023
    Inventors: Hangsheng LI, Doug Ta Hsung CHOU, Annett ROZEK
  • Publication number: 20230195991
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Application
    Filed: February 7, 2023
    Publication date: June 22, 2023
    Inventors: Pin-Dai SUE, Po-Hsiang HUANG, Fong-Yuan CHANG, Chi-Yu LU, Sheng-Hsiung CHEN, Chin-Chou LIU, Lee-Chung LU, Yen-Hung LIN, Li-Chun TIEN, Yi-Kan CHENG
  • Publication number: 20230199422
    Abstract: An audio system is proposed, dynamically playing optimized audio signals based on user position. A sensor circuits dynamically senses a target space to generate field context information. First speaker and second speaker are arranged for audio playback. A host device recognizes a user from the field context information, determines the user position corresponding to the target space, and adaptively assigns the user position as a target listening spot. A sensor circuit contains a camera capturing an ambient image out of the target space. A recognizer circuit analyzes the ambient image to obtain from the target space, the location, size and acoustic attribute information of an ambient object, allowing the control circuit to accordingly perform an object-based compensation operation on the target listening spot to generate optimized first channel audio signal and second channel audio signal.
    Type: Application
    Filed: November 23, 2022
    Publication date: June 22, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventor: Kai-Hsiang CHOU
  • Publication number: 20230198562
    Abstract: A DAC-based transmit driver architecture with improved bandwidth and techniques for driving data using such an architecture. One example transmit driver circuit generally includes an output node and a plurality of digital-to-analog converter (DAC) slices. Each DAC slice has an output coupled to the output node of the transmit driver circuit and includes a bias transistor having a drain coupled to the output of the DAC slice and a multiplexer having a plurality of inputs and an output coupled to a source of the bias transistor.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 22, 2023
    Inventors: Chi Fung POON, Chuen-Huei CHOU, Weerachai NEERANARTVONG, Kevin ZHENG
  • Publication number: 20230197820
    Abstract: The present disclosure provide a method that includes receiving a substrate having a semiconductor surface of a first semiconductor material; forming an APT feature in the substrate; performing a prebaking process to the substrate with a first temperature T1; epitaxially growing an undoped semiconductor layer of the first semiconductor layer and a first thickness t1 on the substrate at a second temperature T2; epitaxially growing a semiconductor layer stack over the undoped semiconductor layer at a third temperature T3 less than T2, wherein the semiconductor layer stack includes first semiconductor layers and second semiconductor layers stacked vertically in an alternating configuration; patterning the semiconductor substrate, and the semiconductor layer stack to form a trench, thereby defining an active region being adjacent the trench; forming an isolation feature in the trench; selectively removing the second semiconductor layers; and forming a gate structure wrapping around each of the first semiconductor
    Type: Application
    Filed: June 7, 2022
    Publication date: June 22, 2023
    Inventors: Min Jiao, Ji-Yin Tsai, Da-Wen Lin, Hung-Ju Chou
  • Publication number: 20230197863
    Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.
    Type: Application
    Filed: February 16, 2023
    Publication date: June 22, 2023
    Inventors: FU-CHOU LIU, JUI-HUNG HSU, YU-CHIANG PENG, CHIEN-CHEN LEE, YA-HAN CHANG, LI-CHUN HUNG
  • Publication number: 20230197751
    Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 22, 2023
    Inventors: Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee
  • Publication number: 20230200254
    Abstract: A semiconductor structure includes an Nth metal layer, a diffusion barrier layer over the Nth metal layer, a first deposition of bottom electrode material over the diffusion barrier layer, a second deposition of bottom electrode material over the first deposition of bottom electrode material, a magnetic tunneling junction (MTJ) layer over the second deposition of bottom electrode material, a top electrode over the MTJ layer; and an (N+1)th metal layer over the top electrode; wherein the diffusion barrier layer and the first deposition of bottom electrode material are laterally in contact with a dielectric layer, the first deposition of bottom electrode material spacing the diffusion barrier layer and the second deposition of bottom electrode material apart, and N is an integer greater than or equal to 1. An associated electrode structure and method are also disclosed.
    Type: Application
    Filed: February 13, 2023
    Publication date: June 22, 2023
    Inventors: CHUNG-YEN CHOU, FU-TING SUNG, YAO-WEN CHANG, SHIH-CHANG LIU
  • Publication number: 20230196555
    Abstract: An auxiliary screening system and an auxiliary screening method for a hip joint of a baby are provided. The auxiliary screening method includes: collecting plural images of the hip joint; performing an image analysis operation on each of the images of the hip joint to extract plural image features of each of the images of the hip joint and determining whether each of the images of the hip joint is a standard image according to the image features of each of the images of the hip joint; and when at least one of the images of the hip joint is determined as the standard image, plural angle parameters are calculated and the at least one of the images of the hip joint that is determined as the standard image is outputted, in which the angle parameters include values of an angle ? and an angle ?.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 22, 2023
    Inventors: Po-Chih SHEN, Bing-Feng HUANG, Jin-Yuan SYUE, Hsiang-Hsiang CHOU
  • Publication number: 20230194825
    Abstract: An imaging lens assembly module has an optical axis, and includes an optical element set, a light blocking element assembling surface, and a light absorbing layer. The optical element set includes an optical lens element and a light blocking sheet. The optical lens element is a plastic lens element, and includes an optical effective portion and an outer peripheral portion. The light blocking sheet is disposed on the outer peripheral portion, and spaced apart from the outer peripheral portion. The light blocking sheet includes an object-side surface, an image-side surface and an inner opening surface. The inner opening surface surrounds a through hole of the light blocking sheet. The light blocking sheet is disposed on the light blocking element assembling surface. The light absorbing layer is disposed on the image-side surface and for fixing the light blocking sheet on the light blocking element assembling surface.
    Type: Application
    Filed: February 22, 2023
    Publication date: June 22, 2023
    Inventors: Jyun-Jia CHENG, Ming-Ta CHOU, Ming-Shun CHANG
  • Publication number: 20230197532
    Abstract: Aspects of the disclosure provide methods for determining wafer flatness and for fabricating a semiconductor device. The method includes storing a first wafer expansion of a first wafer that is collected along a first direction parallel to a working surface of the first wafer during a lithography process. The lithography process is for patterning structures on the working surface of the first wafer. Before a fabrication step with a wafer flatness requirement, a wafer flatness of the first wafer is determined based on the first wafer expansion collected during the lithography process using a flatness prediction model that is configured to predict the wafer flatness. In an example, a layer is deposited on a back side of the first wafer with a thickness that is based on the determined wafer flatness of the first wafer.
    Type: Application
    Filed: July 28, 2022
    Publication date: June 22, 2023
    Applicant: Yangtze Memory Technologies Co., Ltd.
    Inventors: Xin LEI, Ying CHOU, HaoJie SONG, Kun BAO, Fan WANG, Guoxiu JIN
  • Publication number: 20230193027
    Abstract: A resin, including a compound having the following Formula 1-1: wherein n ranges from 1 to 5, and R1, R2, R3 and R4 are as defined herein.
    Type: Application
    Filed: December 5, 2022
    Publication date: June 22, 2023
    Inventors: Shih-Hao LIAO, Min-Yuan YANG, Ya-Yen CHOU, Jheng-Hong CIOU, Cheng-Chung CHEN
  • Publication number: 20230195247
    Abstract: A pointing stick assembly includes: a head having a top surface configured to interface with a finger; a shaft connected to the head, wherein the shaft configured to be moved downward based on a finger pressing down on the head and to be tilted based on a finger tilting the head; a first sensor layer comprising a receiver electrode and a transmitter electrode; a second sensor layer comprising a transmitter electrode; and a third sensor layer comprising a plurality of receiver electrodes. The first sensor layer is configured for detection of presence of a finger based on a change in capacitance between the receiver electrode and the transmitter electrode of the first sensor layer caused by the presence of the finger on the top surface of the head.
    Type: Application
    Filed: February 15, 2023
    Publication date: June 22, 2023
    Inventors: Wei-Lung Lee, Chih-Chien Chou, Lin-Hsiang Hsieh
  • Patent number: 11682652
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming an integrated chip. The method comprises forming a plurality of semiconductor devices over a central region of a semiconductor wafer. The semiconductor wafer comprises a peripheral region laterally surrounding the central region and a circumferential edge disposed within the peripheral region. The semiconductor wafer comprises a notch disposed along the circumferential edge. Forming a stack of inter-level dielectric (ILD) layers over the semiconductor devices and laterally within the central region. Forming a bonding support structure over the peripheral region such that the bonding support structure comprises a bonding structure notch disposed along a circumferential edge of the bonding support structure. Forming the bonding support structure includes disposing the semiconductor wafer over a lower plasma exclusion zone (PEZ) ring that comprises a PEZ ring notch disposed along a circumferential edge of the lower PEZ ring.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Chan Li, Cheng-Hsien Chou, Sheng-Chau Chen, Cheng-Yuan Tsai