Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230147426
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a lattice layer, a third nitride-based semiconductor layer, a first source electrode and a second electrode, and a gate electrode. The second nitride-based semiconductor layer is disposed over the first nitride-based semiconductor layer. The lattice layer is disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type. The lattice layer comprises a plurality of first III-V layers and second III-V layers alternatively stacked. Each of the first III-V layers has a high resistivity region and a current aperture enclosed by the high resistivity region. The high resistivity region comprises more metal oxides than the current aperture. At least two of the current apertures have different dimensions such that interfaces formed between the high resistivity regions and the current apertures misalign with each other. The gate electrode aligns with the current aperture.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 11, 2023
    Inventors: Yi-Lun CHOU, Shuang GAO, Chuangang LI
  • Publication number: 20230141521
    Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.
    Type: Application
    Filed: January 2, 2023
    Publication date: May 11, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yu LIN, Chi-Yu Chou, Hsien-Ming Lee, Huai-Tei Yang, Chun-Chieh Wang, Yueh-Ching Pai, Chi-Jen Yang, Tsung-Ta Tang, Yi-Ting Wang
  • Publication number: 20230143018
    Abstract: An optical lens assembly includes a lens barrel and an optical lens group. The lens barrel includes a light entering hole, which is configured for allowing a light to enter the lens barrel. The lens barrel accommodates the optical lens group, and an optical axis passes through the optical lens group. The optical lens group includes a plurality of lens elements and at least one light blocking sheet. The light blocking sheet is an opaque sheet-shaped element and surrounds the optical axis to form a light passing hole. The light blocking sheet includes an object-side surface and an image-side surface, and the object-side surface is located more adjacent to the light entering hole than the image-side surface thereto. A first film layer is disposed on the object-side surface.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 11, 2023
    Inventors: Ssu-Hsin LIU, Chen-Wei FAN, Ming-Ta CHOU, Chien-Pang CHANG, Wen-Yu TSAI
  • Publication number: 20230142853
    Abstract: Disclosed are semiconductor devices having an interconnection pattern that includes a plurality of parallel conductors including a first conductor aligned with a first axis and a first dummy pattern aligned with a second axis on a first side of the first axis and offset from the first axis by an axis offset distance LAO in which the first dummy pattern includes N dummy conductors having a first dummy conductor length LDC with the dummy conductors being separated by a dummy conductor-to-dummy conductor spacing EED.
    Type: Application
    Filed: January 11, 2023
    Publication date: May 11, 2023
    Inventors: Wei-Yi HU, Chih-Ming CHAO, Jung-Chou TSAI
  • Publication number: 20230147857
    Abstract: A control method is disclosed to prevent false triggering of over-current protection. A power converter comprises high-side and low-side switches connected in series between an input power line and a ground line, for driving a resonant circuit to resonate. The power converter includes a detector detecting the resonant circuit to provide a detection signal representing a magnitude of resonance in the resonant circuit. A duty cycle of one of the high-side and low-side switches is detected, and a threshold is determined in response to the duty cycle. An over-current protection is triggered based on the threshold and the detection signal. When the over-current protection is triggered, at least one of the high-side and low-side switches stops providing power to the resonant circuit, and the resonance subsides.
    Type: Application
    Filed: June 15, 2022
    Publication date: May 11, 2023
    Inventors: Yao-Tsung CHEN, Kuan-Hsien CHOU
  • Publication number: 20230146923
    Abstract: Provided herein are methods and compositions for inhibiting p97, for the treatment of a cancer in a subject, or a symptom thereof. Upon treatment, the cancer, or a symptom thereof is reduced in the subject. Additionally, methods for measuring sensitivity of a subject to p97 inhibition, methods of assessing a pharmaceutical agent for p97 inhibition activity, and methods of assessing the effect of a pharmaceutical agent for p97 inhibition activity in a subject are provided herein.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 11, 2023
    Inventors: Tsui-Fen Chou, Shan Li, Feng Wang, Nadia Houerbi
  • Publication number: 20230141237
    Abstract: Various embodiments herein provide techniques for management data analytics (MDA) for a wireless cellular network. The MDAS producer receives the raw data, classifies and analyses the raw data to generate the analytics output. The MDA process may be supported by machine learning techniques, and performed by a MDA service producer and assisted by a MDA service consumer. For example, the MDA service producer may receive training data from the MDA service consumer, and train a machine learning model based on the training data. The MDA service producer may apply the trained machine learning model to the raw data that are associated with network functions (e.g., self-organizing network (SON) functions) to generate output data that indicates a conflict between the network functions and a recommended action to address the conflict. Other embodiments may be described and claimed.
    Type: Application
    Filed: May 13, 2021
    Publication date: May 11, 2023
    Inventors: Yizhi Yao, Joey Chou
  • Publication number: 20230144190
    Abstract: A surface-treated copper foil includes a bulk copper foil and a first surface treatment layer. The first surface treatment layer is disposed on a first surface of the bulk copper foil and includes a roughening layer, where the outermost surface of the first surface treatment layer is a treating surface of the surface-treated copper foil. The material volume (Vm) of the treating surface is 0.06 to 1.45 ?m3/?m2, and the five-point peak height (S5p) of the treating surface is 0.15 to 2.00 ?m.
    Type: Application
    Filed: December 23, 2021
    Publication date: May 11, 2023
    Applicant: CHANG CHUN PETROCHEMICAL CO., LTD.
    Inventors: Jian-Ming Huang, Yao-Sheng Lai, Jui-Chang Chou
  • Publication number: 20230144834
    Abstract: Modified G6PC (glucose-6-phosphatase, catalytic subunit) nucleic acids and glucose-6-phosphatase-? (G6Pase-?) enzymes with increased phosphohydrolase activity are described. Also described are vectors, such as adeno-associated virus (AAV) vectors, and recombinant AAV expressing modified G6Pase-?. The disclosed AAV vectors and rAAV can be used for gene therapy applications in the treatment of glycogen storage disease, particularly glycogen storage disease type Ia (GSD-Ia), and complications thereof.
    Type: Application
    Filed: November 23, 2022
    Publication date: May 11, 2023
    Applicant: The U.S.A., as represented by the Secretary, Department of Health and Human Services
    Inventor: Janice J. Chou
  • Publication number: 20230144369
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a lattice layer, a third nitride-based semiconductor layer, a first source electrode and a second electrode, and a gate electrode. The second nitride-based semiconductor layer is disposed over the first nitride-based semiconductor layer. The lattice layer is disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type. The lattice layer comprises a plurality of first III-V layers and a plurality of second III-V layers alternatively stacked. Each of the first III-V layers has a high resistivity region and a current aperture enclosed by the high resistivity region. The high resistivity region comprises more metal oxides than the current aperture. Interfaces formed between the high resistivity regions and the current apertures among the first III-V layers align with each other. The gate electrode aligns with the current aperture.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 11, 2023
    Inventors: Yi-Lun CHOU, Shuang GAO, Chuangang LI
  • Publication number: 20230142176
    Abstract: Disclosed herein is an anti-biofouling copolymer including a first structural unit represented by formula (I) and a second structural unit represented by formula (II), wherein each of the substituents is given the definition as set forth in the Specification and Claims. Also disclosed herein is a method for preparing an anti-biofouling copolymer which includes subjecting a first compound represented by formula (a) to polymerization reaction with a second compound represented by formula (b), wherein each of the substituents is given the definition as set forth in the Specification and Claims.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 11, 2023
    Inventors: Ying-Nien CHOU, Ming-Zu OU, Yu-Chan WU, Po-Ching LEE
  • Publication number: 20230145177
    Abstract: A federated learning method and a federated learning system based on mediation process are provided. The federated learning method includes: dividing a plurality of client devices into a plurality of mediator groups, and generate a plurality of mediator modules; configuring a server device to broadcast initial model weight data to the plurality of mediator modules; configuring the plurality of mediator modules to execute a sequential training process for the plurality of mediator groups to train a target model and generate trained model weight data; configuring the server device to execute a weighted federated averaging algorithm to generate global model weight data; and configuring the server device to set the target model with the global model weight data to generate a global target model.
    Type: Application
    Filed: November 25, 2021
    Publication date: May 11, 2023
    Inventors: PING-FENG WANG, CHIUN-SHENG HSU, JERRY CHI-YUAN CHOU
  • Publication number: 20230141117
    Abstract: The present application relates to a preparation method for leads of semiconductor structure and semiconductor structure. The preparation method comprises: providing a substrate covered with a conductive layer, the substrate having a first region and a second region being connected with the first region at side surfaces; sequentially forming, on the conductive layer, a second dielectric layer, a first dielectric layer and a mask layer which are superposed one upon the other; etching the second dielectric layer for the first time; removing the mask layer in the first region; etching the second dielectric layer for the second time, forming, respectively in the first region and the second region, a first window and a second window; and etching the exposed conductive layer, forming leads comprising wide lines in the first region and narrow lines in the second region.
    Type: Application
    Filed: March 15, 2021
    Publication date: May 11, 2023
    Inventor: Chung Yen Chou
  • Publication number: 20230147936
    Abstract: Multi-RET actuators include a plurality of shafts that have respective axially-drivable members mounted thereon. Each of axially-drivable member is mechanically linked to a respective one of a plurality of phase shifters. The multi-RET actuator further includes a motor having a drive shaft and a gear system that is configured to selectively couple the motor to the respective shafts. The gear system is configured so that rotation of the drive shaft in a first direction creates a mechanical linkage between the motor and a first of the shafts, and rotation of the drive shaft in a second direction that is opposite the first direction rotates the first of the shafts.
    Type: Application
    Filed: January 3, 2023
    Publication date: May 11, 2023
    Inventors: Steven SCHMUTZLER, Amit KAISTHA, Chih Lin Lin CHOU, Paul EVEREST, Richard ENGLISH
  • Publication number: 20230145872
    Abstract: The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.
    Type: Application
    Filed: December 14, 2022
    Publication date: May 11, 2023
    Inventors: Pei-Hsun Wang, Chih-Chao Chou, Shih-Cheng Chen, Jung-Hung Chang, Jui-Chien Huang, Chun-Hsiung Lin, Chih-Hao Wang
  • Publication number: 20230141631
    Abstract: An aluminum battery separator applied between a positive electrode and a negative electrode of an aluminum battery includes a polymer material layer. An electrolyte is included between the positive electrode and the negative electrode of the aluminum battery. The polymer material layer includes one or more polymer materials, and the aluminum battery separator does not include a glass fiber material.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 11, 2023
    Applicant: APh ePower Co., Ltd.
    Inventors: Jui-Hsuan Wu, Li-Hsien Chou, Chun-Chieh Yang
  • Publication number: 20230147966
    Abstract: A computer-implemented method includes receiving, by a computing system, a first image of an optical target from a camera. The first image is associated with a first position of the camera. The method also includes receiving, by the computing system, a second image of the optical target, Wherein the second image is associated with a second position of the camera. The method also includes determining an estimated displacement between the first position of the camera and the second position of the camera based on the first image and the second image. The method further includes determining a focal length based on the estimated displacement and a measured displacement of the camera between the first position and the second position.
    Type: Application
    Filed: January 11, 2023
    Publication date: May 11, 2023
    Inventors: Yongjun Wang, Daniel Chou, Nigel Rodrigues
  • Publication number: 20230143127
    Abstract: Aspects of the present disclosure provide a method for regulating an integration current of a sensing amplifier. The sensing amplifier includes a first input transistor and a second input transistor, wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node. The method includes pulling a current from or sourcing the current to the source node, measuring the integration current, comparing the measured integration current with a reference signal, and adjusting the current pulled from or sourced to the source node based on the comparison.
    Type: Application
    Filed: November 8, 2021
    Publication date: May 11, 2023
    Inventors: Todd Morgan RASMUS, Shih-Wei CHOU
  • Publication number: 20230141062
    Abstract: A switching power supply module and a memory storage device are disclosed. The switching power supply module includes a first voltage regulation circuit, a second voltage regulation circuit, a switch circuit and a control circuit. The first voltage regulation circuit is configured to regulate an original power as a first power. The second voltage regulation circuit is configured to regulate the original power as a second power. The control circuit is configured to control the switch circuit to conduct a first power supply path under a first status to provide the first power to the first power supply target. The control circuit is further configured to control the switch circuit to conduct a second power supply path under a second status to provide the second power to the second power supply target.
    Type: Application
    Filed: December 3, 2021
    Publication date: May 11, 2023
    Applicant: PHISON ELECTRONICS CORP.
    Inventor: Shu-Han Chou
  • Patent number: 11645734
    Abstract: A circuitry for image demosaicing and contrast enhancement and an image-processing method thereof are provided. The circuitry includes a storage device that is used to temporarily store an image and is jointly used by circuits that perform color restoration and brightness reconstruction. The circuitry includes a color restoration circuit for performing image interpolation and a global mapping circuit that performs mapping to obtain brightness of an image according to restored red, green and blue information of every pixel. Further, an edge texture feature decision circuit is provided to obtain each pixel's directionality for color restoration. A brightness estimation circuit utilizes green information of the pixels as the brightness for an area. After that, a color image with the color restoration and brightness reconstruction is outputted.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: May 9, 2023
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yang-Ting Chou, Tsung-Hsuan Li, Shih-Tse Chen