Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240283493
    Abstract: Various solutions for tiered channel information feedback with respect to user equipment and network apparatus in mobile communications are described. An apparatus may determine a first tier channel state information (CSI) based on a first reference signal resource measurement. The apparatus may report the first tier CSI to a network node. The apparatus may determine a second tier CSI based on the first tier CSI and based on a second reference signal resource measurement. The apparatus may report the second tier CSI to the network node. The second tier CSI may be different from the first tier CSI.
    Type: Application
    Filed: February 14, 2024
    Publication date: August 22, 2024
    Inventors: Chia-Hao Yu, Tzu-Han Chou, Jiann-Ching Guey, Chin-Kuo Jao, Parisa Cheraghi, Chun-Chia Tsai
  • Publication number: 20240279044
    Abstract: A fluid material dispensing apparatus capable of conducting an automatic self-cleaning operation includes: guiding a cleaning solution to flow into a fluid diverter; activate a pump to push residual fluid material in a material transmission pipe forward, so that the residual fluid material is discharged through an outlet connector; and utilizing operation of the pump to form a negative pressure in a detergent transmission pipe, so that the cleaning solution in the fluid diverter is sucked into a fluid connector through the detergent transmission pipe, and then flows into the material transmission pipe through the fluid connector.
    Type: Application
    Filed: April 16, 2024
    Publication date: August 22, 2024
    Applicant: Botrista, Inc.
    Inventors: Yu-Min LEE, Wu-Chou KUO
  • Patent number: 12069851
    Abstract: A transistor, a memory and a method of forming the same are disclosed. The transistor includes a gate dielectric layer (200) having an upper portion (200b) and a lower portion (200a). The upper portion (200b) is multi-layer structure having an increased thickness without changing a thickness of the lower portion (200a). In this way, gate-induced drain current leakage of the transistor can be mitigated at uncompromised performance thereof. Additionally, the upper portion (200b) designed as multi-layer structure having an increased thickness can facilitate flexible adjustment in parameters of the upper portion (200b). The memory device includes dielectric material layers (DL), which are formed in respective word line trenches and each have an upper portion and a lower portion. In addition, in both trench isolation structures (STI) and active areas (AA), the upper portion of the dielectric material layers (DL) has a thickness greater than a thickness of the lower portion.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 20, 2024
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chung-Yen Chou, Chih-Yuan Chen, Qinfu Zhang, Chao-Wei Lin, Chia-Yi Chu, Jen-Chieh Cheng, Jen-Kuo Wu, Huixian Lai
  • Patent number: 12066434
    Abstract: The present invention provides, among other things, QMAX card based assays in different forms for various analytes, offering simpler, fast, more sensitive assaying.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: August 20, 2024
    Assignee: Essenlix Corporation
    Inventors: Stephen Y. Chou, Wei Ding, Yufan Zhang, Ji Qi
  • Patent number: 12067674
    Abstract: A device may include an electronic display to display an image frame based on blended image data and image processing circuitry to generate the blended image data by combining first image data and second image data via a blend operation. The blend operation may include receiving graphics alpha data indicative of a transparency factor to be applied to the first image data to generate a first layer of the blend operation. The blend operation may also include overlaying the first layer onto a second layer that is based on the second image data. Overlaying the first layer onto the second layer may include adding first pixels values of the first image data that include negative pixel values and are augmented by the transparency factor to second pixel values of the second image data to generate blended pixel values of the blended image data.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: August 20, 2024
    Assignee: Apple Inc.
    Inventors: Yun Gong, Jim C Chou, Guy Cote
  • Patent number: 12068575
    Abstract: A laser device includes a substrate, a first waveguiding layer, an active layer, a second waveguiding layer, a contact layer, an insulating layer, a light-transmissive conducting layer, a first electrode, and a second electrode. The first waveguiding layer, the active layer, the second waveguiding layer, and the contact layer form an epitaxy structure having a first platform and a second platform. The first platform has multiple holes to form a photonic crystal structure. The insulating layer is over an upper surface and a sidewall surface of the first platform, and over an upper surface of the second platform. The sidewall surface passes through the contact layer, the second waveguiding layer, and the active layer. The light-transmissive conducting layer connects to the photonic crystal structure through an aperture of the insulating layer. The first electrode has an opening corresponding to the aperture. The second electrode is under the substrate.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: August 20, 2024
    Assignee: PHOSERTEK CORPORATION
    Inventors: Yu-Chen Chen, Chien-Hung Lin, Bo-Tsun Chou, Chih-Yuan Weng, Kuo-Jui Lin
  • Patent number: 12068711
    Abstract: Methods, apparatuses and systems provide technology for a high frequency alternating-current (HFAC) distribution network for a vehicle that includes a plurality of HFAC zones coupled to a direct-current (DC) power source, the plurality of HFAC zones disbursed within the vehicle, where each HFAC zone includes a HFAC resonant inverter to convert DC power to HFAC power and a HFAC bus coupled to the HFAC resonant inverter, the HFAC bus to distribute the HFAC power to one or more loads. The technology includes a CLCL resonant tank circuit having two capacitors and two inductors, a push-pull circuit coupled to the CLCL resonant tank circuit, the push-pull circuit including a pair of switches, and a transformer to couple the inverter to the HFAC bus.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: August 20, 2024
    Assignees: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC., THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Yanghe Liu, Qunfang Wu, Mengqi Wang, Weiyang Zhou, Chungchih Chou, Hiroshi Ukegawa
  • Patent number: 12066682
    Abstract: An imaging lens system includes a plastic lens element. The plastic lens element includes an optical effective portion and an outer ring portion. The optical axis passes through the optical effective portion. The outer ring portion surrounds the optical effective portion and includes an annular groove structure, a conical surface, a flat abutting portion and a full-circle connecting portion. The annular groove structure is tapered off. Each of the conical surface and the flat abutting portion is located closer to the optical effective portion than the annular groove structure. The flat abutting portion is in physical contact with an optical element. The full-circle connecting portion is connected to the annular groove structure and located farther away from the optical effective portion than the annular groove structure. The annular groove structure has an annular bottom end surface extending in a direction substantially perpendicular to the optical axis.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: August 20, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Ming-Shun Chang, Heng Yi Su, Ming-Ta Chou
  • Patent number: 12067267
    Abstract: A system includes a semiconductor device configured to store data and a controller communicatively coupled to the semiconductor device. The semiconductor device and the controller are configured to; in response to determining that particular data stored in the semiconductor device satisfies a reliability condition, obtain first readout data by reading the particular data at a first read voltage, and obtain second readout data by reading the particular data at a second read voltage. The second read voltage is different from the first read voltage. The semiconductor device and the controller are configured to compare the first readout data and the second readout data and obtain a comparison result; and, based on the comparison result, determine whether to perform an error correction process on the particular data.
    Type: Grant
    Filed: December 16, 2022
    Date of Patent: August 20, 2024
    Assignee: Macronix International Co., Ltd.
    Inventors: Shih-Chou Juan, Wei-Yan Jang
  • Patent number: 12066691
    Abstract: A lens driving module is configured to provide an imaging lens system with auto-focus functionality. The imaging lens system is disposed between a preloading element and a driving base of the lens driving module. The preloading element includes an injection molded part and a ferromagnetic part partially embedded in the injection molded part. A rollable element is disposed in each of mounting structures of the injection molded part and in contact with a displaceable lens carrier of the imaging lens system. The ferromagnetic part and a magnet disposed on the displaceable lens carrier together generate a magnetic attraction force, such that the displaceable lens carrier exerts a preloading force on the rollable element. The driving base includes a driving coil and an electrical wiring pattern. The driving coil corresponds to the magnet for generating a driving force to drive the displaceable lens carrier to move along the optical axis.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: August 20, 2024
    Assignee: LARGAN DIGITAL CO., LTD.
    Inventors: Hao Jan Chen, Yu Chen Lai, Ming-Ta Chou, Te-Sheng Tseng
  • Patent number: 12066601
    Abstract: An imaging lens element assembly includes a dual molded lens element. The dual molded lens element includes a transparent portion, a light absorbing portion and a step structure. The transparent portion, in order from a center to a peripheral region, includes an optical effective area and a transparent peripheral area, wherein an optical axis of the imaging lens element assembly passes through the optical effective area, and the transparent peripheral area surrounds the optical effective area. The light absorbing portion surrounds the optical effective area and is disposed on an object side of the transparent peripheral area and includes an object-end surface and an outer inclined surface. The object-end surface faces towards an object side of the light absorbing portion, and the outer inclined surface extends from the object-end surface to an image side of the light absorbing portion and is gradually far away from the optical axis.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: August 20, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Lin-An Chang, Ming-Ta Chou, Cheng-Feng Lin, Ming-Shun Chang
  • Patent number: 12068385
    Abstract: In some implementations, fluorine is oxidized after dry etching an oxide layer above a source/drain contact and before cleaning. Accordingly, less hydrofluoric acid is formed during cleaning, which reduces unexpected wet etching of the source/drain contact. This allows for forming a recess in the source/drain contact with a depth to width ratio in a range from approximately 1.0 to approximately 1.4 and prevents damage to a layer of silicide below the source/drain that can be caused by excessive hydrofluoric acid. Additionally, or alternatively, the recess is formed using multiple wet etch processes, and any residual fluorine is oxidized between the wet etch processes. Accordingly, each wet etching process may be shorter and less corrosive, which allows for greater control over dimensions of the recess. Additionally, less hydrofluoric acid may be formed during cleaning processes between the wet etch processes, which reduces the etching of the source/drain contact between processes.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: August 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: U-Ting Chiu, Chun-Cheng Chou, Chi-Shin Wang, Chun-Neng Lin, Ming-Hsi Yeh
  • Patent number: 12067398
    Abstract: Techniques are disclosed relating to load value prediction. In some embodiments, a processor includes learning table circuitry that is shared for both address and value prediction. Loads may be trained for value prediction when they are eligible for both value and address prediction. Entries in the learning table may be promoted to an address prediction table or a load value prediction table for prediction, e.g., when they reach a threshold confidence level in the training table. In some embodiments, the learning table stores a hash of a predicted load value and control circuitry uses a probing load to retrieve the actual predicted load value for the value prediction table.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: August 20, 2024
    Assignee: Apple Inc.
    Inventors: Yuan C. Chou, Debasish Chandra, Mridul Agarwal, Haoyan Jia
  • Patent number: 12064754
    Abstract: A titanium catalyst and a synthesizing method of polyester resins are provided in the present disclosure. The titanium catalyst has a chemical structure represented by Formula (I), Formula (II) or Formula (III). The symbols shown in the Formula (I), the Formula (II) or the Formula (III) are defined in the description. The synthesizing method of polyester resins includes providing the titanium catalyst, performing a feeding step, performing a heating and pressurizing step and performing a heating and vacuuming step. The titanium catalyst and a heat stabilizer are added into an autoclave before the feeding step or before the heating and vacuuming step.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: August 20, 2024
    Assignees: NATIONAL TSING HUA UNIVERSITY, CHANG CHUN PLASTICS CO., LTD., CHANG CHUN PETROCHEMICAL CO., LTD., DAIREN CHEMICAL CORP.
    Inventors: Yi-Chou Tsai, John Di Yi Ou, Chuan-Sheng Huang, Yung-Sheng Lin
  • Patent number: 12064771
    Abstract: The disclosure provides a device and method for rapidly changing temperatures of a sample. An example of the device include: a first plate; a second plate; and a heating/cooling layer disposed on either the first or second plate. The first plate and the second plate face each other and are configured to receive a fluid sample sandwiched therebetween. The method includes depositing the fluid sample on one or both of the two plates, pressing the plates to form a thin layer of the sample, and changing and/or maintaining the temperature of the sample. The device or method can be used in, for example, PCR.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: August 20, 2024
    Assignee: Essenlix Corporation
    Inventors: Stephen Y. Chou, Wei Ding, Hua Tan
  • Publication number: 20240274569
    Abstract: An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.
    Type: Application
    Filed: March 26, 2024
    Publication date: August 15, 2024
    Inventors: Bo-Hsun Pan, Hung-Yu Chou, Chung-Hao Lin, Yuh-Harng Chien
  • Publication number: 20240274636
    Abstract: A pixel sensor array of an image sensor device described herein may include a deep trench isolation (DTI) structure that includes a plurality of DTI portions that extend into a substrate of the image sensor device. Two or more subsets of the plurality of DTI portions may extend around photodiodes of a pixel sensor of the pixel sensor array, and may extend into the substrate to different depths. The different depths enable the photocurrents generated by the photodiodes to be binned and used to generate unified photocurrent. In particular, the different depths enable photons to intermix in the photodiodes, which enables quadradic phase detection (QPD) binning for increased PDAF performance. The increased PDAF performance may include increased autofocus speed, increased high dynamic range, increased quantum efficiency (QE), and/or increased full well conversion (FWC), among other examples.
    Type: Application
    Filed: February 15, 2023
    Publication date: August 15, 2024
    Inventors: Ming-Hsien YANG, Chun-Hao CHOU, Kuo-Cheng LEE, Chien Nan TU, Chun-Wei CHIA, Tse-Yu TU, Ya-Min HUNG, Cheng-Hao CHIU, Chun-Liang LU
  • Publication number: 20240271144
    Abstract: The present invention relates to RNAi agents, e.g., dsRNA agents, targeting the Sodium-glucose cotransporter-2 (SGLT2) gene. The invention also relates to methods of using such RNAi agents to inhibit expression of a SGLT2 gene and to methods of treating or preventing a SGLT2-associated disease, such as gout or diabetes, in a subject.
    Type: Application
    Filed: November 14, 2023
    Publication date: August 15, 2024
    Inventors: Ho-Chou Tu, Aimee M. Deaton, Jeffrey Zuber, Patrick Haslett, Kevin Fitzgerald
  • Publication number: 20240274601
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a first fin structure over a base region of a semiconductor substrate. A first plurality of semiconductor channel structures stacked vertically with one another over the base region of the semiconductor substrate. A first width of the first fin structure is different from a second width of the first plurality of semiconductor channel structures. A gate structure extends from the first fin structure to the first plurality of semiconductor channel structures.
    Type: Application
    Filed: April 2, 2024
    Publication date: August 15, 2024
    Inventors: Chih-Chao Chou, Chih-Hao Wang, Shi Ning Ju, Kuo-Cheng Chiang, Wen-Ting Lan
  • Publication number: 20240275423
    Abstract: A method for controlling the operation of a dual Bluetooth architecture of a single IC includes: after establishing a first link of a first Bluetooth circuit, performing a first group of steps; and after establishing a second link of a second Bluetooth circuit, performing a second group of steps. The first group of steps includes: determining whether the second link uses a modulation technique; when the second link uses the modulation technique, disabling the first Bluetooth circuit from using it; and when the second link does not use the modulation technique, enabling the first Bluetooth circuit to use it. The second group of steps includes: determining whether the first link uses the modulation technique; when the first link uses the modulation technique, disabling the second Bluetooth circuit from using it; and when the first link does not use the modulation technique, enabling the second Bluetooth circuit to use it.
    Type: Application
    Filed: August 11, 2023
    Publication date: August 15, 2024
    Inventors: YOU-RUNG CHOU, CHING-HER HUANG, HSIN-YU CHANG