Abstract: A core-shell particle includes a core and a shell that is wrapped around the core. The core includes aluminum nitride. The shell includes aluminum and a dopant, and the dopant is yttrium, calcium, magnesium, lanthanum, niobium, titanium, copper, or a combination thereof. The aluminum and the dopant in the shell have a weight ratio of 90:10 to 99.9:0.1. The core-shell particle can be sintered to form a ceramic bulk.

Abstract: Techniques for accessing 32 general purpose registers, suppressing flags, and/or using a new data destination for an instance of a single instruction are described. An example of a single instruction to at least include a prefix and an opcode to indicate execution circuitry is to do perform a particular operation, wherein the prefix comprises at least two bytes and a second of the two bytes of the prefix is to provide most significant bits for at least register identifier.

Abstract: An inductor structure is provided, in which a coil-shaped inductor body and a magnetically permeable alloy layer located in the coil are embedded in an insulator, so as to improve the electrical characteristics of the inductor via the design of the magnetically permeable alloy layer. Therefore, the inductor structure of the present disclosure can meet the required requirements without using a mixture of conventional magnetically permeable elements and conventional magnetic powders.

Abstract: A package carrier board includes a first circuit build-up structure, a patterned magnetic conductive metal layer, a plurality of first conductive pillar, a second insulating layer, and a second circuit build-up structure. The patterned magnetic conductive metal layer is disposed above the first circuit build-up structure, and the cross-sectional pattern of the patterned magnetic conductive metal layer is L-shaped and/or U-shaped. The first conductive pillars are disposed on the first circuit build-up structure and located outside of the patterned magnetic conductive metal layer. The second insulating layer covers the patterned magnetic conductive metal layer and the first conductive pillars. The second circuit build-up structure is disposed on the second insulating layer. The first circuit build-up structure, the first conductive pillars, the second insulating layer, and the second circuit build-up structure are combined to form an inductive circuit structure.

Abstract: A processing method for selecting a multimedia image based on a ranking performed by an electronic device includes reading an executable code, identifying multiple multimedia images by using artificial intelligence, and performing rating and sorting processing on the multiple multimedia images. The method includes the steps of target detection, interaction analysis, position assessment, facial confirmation, and ranking. The method obtains a total grading score for each multimedia image by summing according to a target confirmation grading score, an interaction grading score, a position grading score, and a facial confirmation grading score, and selects a user-desired multimedia image according to a ranking of the total grading score. An electronic device for selecting a multimedia image based on a ranking and a terminal device communicatively connected thereto, and a non-transitory computer-readable recording medium are also provided.

Abstract: Embodiments of this disclosure provide a user input device, such as a gaming controller, for providing input to the information handling system while executing the applications. The user input device may include a three-dimensional lighting structure, which bends across many faces or surfaces of the user input device while providing a uniform light emission. The lighting structure may be used to convey an instruction to a user, such as a direction to turn the device, convey information to the user, such as flashing to indicate a notification, and/or used to convey application feedback, such as flashing or changing lights based on events occurring in the application.

Abstract: A photo-detecting device includes a first semiconductor layer, a second semiconductor layer located on the first semiconductor layer, a light-absorbing layer located between the first semiconductor layer and the second semiconductor layer, an insulating layer located on the second semiconductor layer, and an electrode structure located on the insulating layer. The second semiconductor layer includes a first region having a first conductivity-type and a second region having a second conductivity-type different from the first conductivity-type. The first region is surrounded by the second region, and includes a geometric center and an interface between the first region and the second region. The insulating layer covers the first region and the second region. The electrode structure includes an outer sidewall located on the second region. In a top view, the interface is located between the geometric center and the outer sidewall.

Abstract: A humanized anti-neurotensin receptor 1 (NTSR1) antibody or an antigen-binding fragment thereof. Also, a method for treating, prophylactic treating and/or preventing diseases and/or disorders caused by or related to NTSR1 activity and/or signaling, and a method or kit for detecting NTSR1 in a sample.

Abstract: An input device may receive, from an information handling system, a first instruction to adjust a tension on a damping medium of a linear magnetic ram of the input device. The input device may adjust the tension on the damping medium based on the first instruction.

Abstract: Techniques for conditional move operations using a single instruction are described. An example instruction at least includes a prefix, one or more fields to identify a first source operand location, one or more fields to identify a destination operand location, and an opcode to indicate execution circuitry is to conditionally move data from the identified first source operand to the identified destination operand based at least in part on evaluation of a condition code, wherein a payload of the prefix is to provide most significant bits to identify at least one of the first and second source operand locations.

Abstract: Techniques for push or pop operations using a single instruction are described. An example instruction at least include a prefix, one or more fields to identify a first source operand location, one or more fields to identify a second source operand location, and an opcode to indicate execution circuitry is to do push data from the identified first source operand and the identified second source operand onto a stack, wherein a payload of the prefix to provide most significant bits to identify at least one of the first and second source operand locations.

Abstract: A method for managing public land mobile network (PLMN) selection of a user equipment (UE) includes: receiving system information broadcasted from a first PLMN on which the UE currently camps, wherein the system information is indicative of a disaster condition of the first PLMN; in response to receiving the system information, performing a network aliveness validation operation while the UE still camps on the first PLMN; and managing the PLMN selection of the UE according to a result of the network aliveness validation operation.

Abstract: Embodiments of a new and innovative button construct include a curved button, a flexible printed circuit, and a frame. The curved button has a first, exterior side configured to be contacted by a user, and a second, interior side opposite the first, exterior side. The flexible printed circuit includes a first portion and a second portion. The first portion includes at least one touch sensor. The first portion and the second portion are folded relative to one another such that the frame is disposed between the second portion and at least the portion of the first portion including the touch sensor(s). The touch sensor(s) of the first portion is disposed between the second, interior side of the curved button and the frame.

Abstract: Some embodiments of this disclosure include apparatuses and methods for identifying performance measurements for registration and handovers for user equipment (UE) and wireless network nodes. A service producer system may register a first wireless communication connection with a first UE using one or more access and mobility management functions (AMFs). The service producer system may monitor registration measurements corresponding to this registration, perform a handover for the first UE using the one or more AMFs, and monitor mobility measurements corresponding to the handover. The service producer system may select a node for a second wireless communication connection corresponding to a second UE based on the registration measurements and mobility measurements and transmit an indication of the selected node to the second UE.

Abstract: A layout design methodology is provided for a device that includes two or more identical structures. Each device can have a first die, a second die stacked over the first die and a third die stacked over the second die. The second die can include a first through-silicon via (TSV) and a first circuit, and the third die can include a second TSV and a second circuit. The first TSV and the second TSV can be linearly coextensive. The first and second circuit can each be a logic circuit having a comparator and counter used to generate die identifiers. The counters of respective device die can be connected in series between the dice. Each die can be manufactured using the same masks but retain unique logical identifiers. A given die in a stack of dice can thereby be addressed by a single path in a same die layout.

Abstract: A User Equipment (UE) and a method performed by the UE for multi-connectivity are provided. The method includes receiving, from a Master Cell Group (MCG), a first Radio Resource Control (RRC) message comprising at least one Secondary Cell Group (SCG) Data Radio Bearer (DRB) configuration; starting a first timer upon receiving the first RRC message; and stopping the first timer when one of a plurality of conditions is satisfied, wherein the plurality of conditions include: transmitting an RRC reestablishment request message to the MCG; transmitting an SCG Failure Information message to the MCG before the first timer expires; and successfully adding an SCG based on the at least one SCG DRB configuration.

Abstract: An electronic device having a peripheral area is provided. The electronic device includes a substrate; and a first conductive line disposed on the substrate in the peripheral area and including a first section and a second section electrically connected to the first section. An overlapping region is defined as a region that the first section overlaps the second section in a top view of the electronic device. The first section has a first minimum width inside the overlapping region and a second minimum width outside the overlapping region. The second section has a third minimum width outside the overlapping region. The first minimum width is greater than the second minimum width and greater than the third minimum width.

Abstract: The invention describes a system for testing antenna-in-package (AiP) modules and a method for using the same. Firstly, AiP modules respectively receive RF signals from a testing transmitting antenna. Then, at least one of the power and the phase of each of the RF signals is adjusted to generate modulated RF amplified signals as recognition tags with difference. The RF amplified signals are received from each control integrated circuit (IC) and the power of the modulated RF amplified signals is summed to generate a net mixed test signal. Finally, the test signal is received and RF properties corresponding to at least one of the power and the phase of each of the RF amplified signals as recognition tags are obtained. The method can simultaneously test a plurality of AiP modules to shorten the test time.

Abstract: A method for forming a semiconductor structure is provided. The method includes depositing a hard mask layer over a substrate. The method further includes depositing a silver precursor layer over the hard mask layer. The method further includes exposing portions of the silver precursor layer to a radiation, the radiation causing a reduction of silver ions in the irradiated portions of the silver precursor layer. The method further includes removing non-irradiated portions of the silver precursor layer, resulting in a plurality of silver seed structures.

Abstract: A memory device includes RRAM memory cells configured to form a zero-transistor and one-resistor (0T1R) array structure in which access transistors of the RRAM memory cells are bypassed or removed. Alternatively, the access transistors of the RRAM memory cells may be arranged in a parallel structure to reduce associated IR drop and thus enable reduced write voltage operation.