Patents by Inventor Chou

Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • On-demand shared data caching method, computer program, and computer readable medium applicable for distributed deep learning computing
    Patent number: 12026096
    Abstract: Disclosed are an on-demand shared data caching method, a computer program, and a computer readable medium applicable for distributed deep learning computing. The method includes a step of dynamically building a distributed shared memory cache space, in which a distributed shared memory deployment and data file access management module is added to a deep learning framework to build the distributed shared memory cache space by a memory set of a multiple of computing nodes of a cluster computer; and a distributed deep learning computing step, in which the computing node overrides a Dataset API of the deep learning framework to execute the distributed deep learning computing. When reading a data file, if the data file exists in the distributed shared memory cache space, then it will be accessed directly, or else it will be obtained from an original specified directory location and stored in the distributed shared memory cache space.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: July 2, 2024
    Assignee: National Applied Research Laboratories
    Inventors: Yu-Bin Fang, Shuen-Tai Wang, Chau-Yi Chou
  • Micro electro mechanical system sound wave transducer
    Patent number: 12028668
    Abstract: A sound wave transducer is provided. The sound wave transducer includes a first board, a spacer layer and a second board over the first board and the spacer layer. The first board includes a carrier, a first substrate layer and a first metal layer. The carrier has a first opening formed in a central region. The first substrate layer is disposed on the carrier and over the first opening. The first metal layer is disposed on the first substrate layer. The spacer layer is disposed on the first board and surrounds the central region. The second board includes a second substrate layer, a second metal layer disposed on the spacer layer, and a plurality of second openings penetrating through the second substrate layer and the second metal layer.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: July 2, 2024
    Assignee: GLASS ACOUSTIC INNOVATIONS TECHNOLOGY CO., LTD.
    Inventors: Hsiao-Yi Lin, Kwun Kit Chan, Yi Feng Wei, Yao-Sheng Chou
  • Stacked image warp operations systems and methods
    Patent number: 12026858
    Abstract: An electronic device may include an electronic display to display an image based on compensated image data in a panel space. The electronic device may also include image processing circuitry to generate the compensated image data. Further, generating the compensated image data may include determining a first inverse mapping of a pixel grid from the panel space to a rendering space and determining a forward mapping of the pixel grid from the rendering space to the panel space based on the first inverse mapping. The forward mapping may include corrections for multiple different warp operations stacked in a single warp operation. Additionally, the image processing circuitry may apply the forward mapping to input image data to generate the compensated image data.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: July 2, 2024
    Assignee: Apple Inc.
    Inventors: Jim C. Chou, Jian Zhou
  • Semiconductor structure and method of fabricating the same
    Patent number: 12027413
    Abstract: A semiconductor structure includes a ceramic substrate, a first bonding layer, a second bonding layer, a cavity, and a semiconductor layer. The ceramic substrate includes holes on its surface. The first bonding layer is disposed on the surface of the ceramic substrate, and the second bonding layer is bonded to the first bonding layer. The cavity is disposed above the hole and enclosed by the first bonding layer and the second bonding layer. The semiconductor layer extends over the cavity and is disposed along the surface of the second bonding layer.
    Type: Grant
    Filed: August 22, 2021
    Date of Patent: July 2, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Yang Du, Yung-Fong Lin, Tsung-Hsiang Lin, Yu-Chieh Chou, Cheng-Tao Chou, Yi-Chun Lu, Chun-Hsu Chen
  • Semiconductor integrated circuit
    Patent number: 12027424
    Abstract: A semiconductor integrated circuit (IC) including a first fin structure having a first aqueous soluble channel layer. The semiconductor IC includes a first gate structure over the first aqueous soluble channel layer, wherein the first gate structure includes a first oxide film directly contacting the first aqueous soluble channel layer, and the first oxide film includes a first material. The semiconductor IC includes a first spacer along the first gate structure, wherein a bottom surface of the first spacer is above an interface between the first oxide layer and the first aqueous soluble channel layer. The semiconductor IC includes a second fin structure having a second aqueous soluble channel layer. The semiconductor IC includes a second gate structure over the second aqueous channel layer, wherein the second gate structure includes a second oxide film directly contacting the second aqueous soluble channel layer, the second oxide film includes a second material.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: July 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Sheng Chuang, You-Hua Chou, Yusuke Oniki
  • Method for promoting hair growth
    Patent number: 12023361
    Abstract: A method for promoting hair growth is disclosed. The method comprises a step of administering Lactobacillus paracasei GMNL-653 to a subject who needs to increase hair volume at a dose of 1.25×108 to 5×108 cells/ml/day, and the Lactobacillus paracasei GMNL-653 was deposited at the China Center for Type Culture Collection located at Wuhan University, Wuhan 430072 P.R. China on Apr. 25, 2016 under an accession number CCTCC NO. M 2016226.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: July 2, 2024
    Assignee: GENMONT BIOTECH INC.
    Inventors: Wan-hua Tsai, Chia-hsuan Chou, Tsuei yin Huang, Ying-ju Chiang, Ching-gong Lin
  • Gas purge device and gas purging method
    Patent number: 12027399
    Abstract: The present disclosure provides a gas purge device and a gas purge method for purging a wafer container to clean wafers. The gas purge device includes a first nozzle and a gas gate. The first nozzle is coupled to a front-opening unified pod (FOUP) through a first port of the FOUP. The gas gate is coupled to the first nozzle via a first pipe. The gas gate includes a first mass flow controller (MFC), a second MFC, and a first switch unit. The first MFC is configured to control a first flow of a first gas. The second MFC is configured to control a second flow of a second gas. The first switch unit is coupled to the first MFC and the second MFC, and is configured to provide the first gas to the first nozzle through the first pipe or receive the second gas from the first nozzle through the first pipe according to a process configuration.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: July 2, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Meng-Liang Wei, Sun-Fu Chou
  • DISPLAY DEVICE
    Publication number: 20240213254
    Abstract: The invention provides a display device, comprising: a first substrate having a peripheral region and a display region, a plurality of pixel units disposed in the display region; a second metal layer electrically connected to the plurality of pixel units; a first planarization layer including a plurality of bump pad groups and a plurality of opening regions; a third metal layer having a position corresponding to the plurality of opening regions; a second substrate; a light shielding layer, a first color resist layer and a second planarization layer disposed on the second substrate; a second color resist layer; wherein in the display region, the second color resist layer is adjacent to the first color resist layer, and in the peripheral region, the second color resist layer and the first color resist layer are stacked, and a position of the second color resist layer corresponds to the plurality of opening regions.
    Type: Application
    Filed: May 25, 2020
    Publication date: June 27, 2024
    Inventors: PANG-HO JAI, HUNG-CHE CHENG, WEN-CHIEH CHOU
  • ANTI-HUMAN PD-L1 ANTIBODIES AND THEIR USES
    Publication number: 20240209095
    Abstract: The present disclosure relates to an anti-PD-L1 antibody or an antigen-binding fragment thereof, comprising: a heavy chain variable region sequence comprising the three CDRs with the sequences of SEQ ID NOs: 2 to 4, or 6 to 8; and a light chain variable region sequence comprising the three CDRs with the sequences of SEQ ID NOs: 10 to 12, or 14 to 16. The present disclosure also relates to a pharmaceutical composition and a method for detecting expression of PD-L1 in a sample.
    Type: Application
    Filed: November 29, 2023
    Publication date: June 27, 2024
    Applicant: DEVELOPMENT CENTER FOR BIOTECHNOLOGY
    Inventors: SHU-PING YEH, CHENG-CHOU YU, YU-HSUN LO, JIN-YU WANG, MEI-CHI CHAN, CHAO-YANG HUANG, SZU-LIANG LAI
  • SEMICONDUCTOR DEVICE
    Publication number: 20240213161
    Abstract: A semiconductor device including a substrate, a low-k dielectric layer, a cap layer, and a conductive layer is provided. The low-k dielectric layer is disposed over the substrate. The cap layer is disposed on the low-k dielectric layer, wherein a carbon atom content of the cap layer is greater than a carbon atom content of the low-k dielectric layer. The conductive layer is disposed in the cap layer and the low-k dielectric layer.
    Type: Application
    Filed: February 5, 2024
    Publication date: June 27, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Cheng Chou, Chung-Chi Ko, Tze-Liang Lee, Ming-Tsung Lee
  • TISSUE TREATMENT SYSTEM
    Publication number: 20240206797
    Abstract: A cardiac information dynamic display system comprises one or more electrodes and a cardiac information console. The one or more electrodes record sets of electric potential data representing cardiac activity at a plurality of time intervals. The cardiac information console includes a signal processor and a user interface module. The signal processor calculates sets of cardiac activity data at the plurality of time intervals using the recorded sets of electric potential data. The cardiac activity data is associated with surface locations of one or more cardiac chambers. The user interface module displays information related to the cardiac activity data. The information is presented relative to a graphical representation of surfaces of the one or more cardiac chambers.
    Type: Application
    Filed: July 27, 2022
    Publication date: June 27, 2024
    Inventors: Derrick Chou, Timothy Corvi, Alex Asconeguy, Wilson William Good, R. Maxwell Flaherty, J. Christopher Flaherty, Joshua Krachman, Steven Yon, Jaume Coll-Font
  • OPTICAL LENS AND ELECTRONIC DEVICE
    Publication number: 20240210593
    Abstract: An optical lens includes a composite lens. The composite lens includes an optical portion and an extending portion. An optical axis passes through the optical portion, and the optical portion includes a first optical surface, a second optical surface and a connecting surface. A light passes through the first optical surface to enter the optical portion. The second optical surface is corresponding to the first optical surface, and the light passes through the second optical surface to exit the optical portion. The connecting surface is connected to the first optical surface and the second optical surface. The extending portion surrounds and covers the connecting surface, and the extending portion supports and fixes the optical portion. The optical portion is made of glass material, the extending portion is made of plastic material, and the extending portion includes gate traces axially and symmetrically disposed on the extending portion.
    Type: Application
    Filed: December 26, 2023
    Publication date: June 27, 2024
    Inventors: Pei-Chi CHANG, Chen-Wei FAN, Ming-Ta CHOU
  • SYSTEMS AND METHODS FOR TRAINING A MACHINE-LEARNING ALGORITHM AND APPLICATION OF A MACHINE-LEARNING MODEL FOR DENOISING IMAGES
    Publication number: 20240212109
    Abstract: A system for training a machine-learning algorithm for denoising images is configured to receive training data. The training data includes multiple image sets obtained from one or more series of consecutive images. Each image set includes a plurality of images obtained from a same series of consecutive images. The plurality of images of each image set includes an initial image, a middle image and a last image. The system is further configured to adjust weights of the machine-learning algorithm to obtain a trained machine-learning model, based on an output image of the machine-learning algorithm and a target image. The output image is obtained by using the initial image and the last image as input images. The target image is obtained from the middle image by applying a random shift to the middle image. The system is further configured to provide the trained machine-learning model.
    Type: Application
    Filed: December 21, 2023
    Publication date: June 27, 2024
    Inventors: Hideki SASAKI, Chi-Chou HUANG, Shih-Jong James LEE
  • SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT AND METHODS OF MANUFACTURING THE SAME
    Publication number: 20240213246
    Abstract: A semiconductor device includes a gate layer, a channel material layer, a first dielectric layer and source/drain terminals. The gate layer is disposed over a substrate. The channel material layer is disposed over the gate layer, where a material of the channel material layer includes a first low dimensional material. The first dielectric layer is between the gate layer and the channel material layer. The source/drain terminals are in contact with the channel material layer, where the channel material layer is at least partially disposed between the source/drain terminals and over the gate layer, and the gate layer is disposed between the substrate and the source/drain terminals.
    Type: Application
    Filed: March 6, 2024
    Publication date: June 27, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Tse Hung, Ang-Sheng Chou, Hung-Li Chiang, Tzu-Chiang Chen, Chao-Ching Cheng
  • CARBON DIOXIDE ADSORBENT
    Publication number: 20240207814
    Abstract: Disclosed is a modified carbonaceous material, which includes hexagonal carbon networks in a layered stacking structure and acidic functional groups bonded to the hexagonal carbon networks and mainly existing at edges of the layered carbonaceous structure. Accordingly, the close proximity of acid moiety at the edges can resemble the center of hydrolysis enzymes, resulting in enhancement of hydrolytic efficiency. Additionally, the acid-functionalized carbonaceous material can also be applied in the capture and storage of carbon dioxide due to its unexpectedly higher capacity for CO2 molecular.
    Type: Application
    Filed: January 30, 2024
    Publication date: June 27, 2024
    Inventors: Jia-Hui WANG, Hao-Ju CHOU, Po-Wen CHUNG
  • Stretchable Display
    Publication number: 20240210995
    Abstract: A display may have a stretchable portion with hermetically sealed rigid pixel islands. A flexible interconnect region may be interposed between the hermetically sealed rigid pixel islands. The hermetically sealed rigid pixel islands may include organic light-emitting diode (OLED) pixels. A conductive cutting structure may have an undercut that causes a discontinuity in a conductive OLED layer to mitigate lateral leakage. The conductive cutting structure may also be electrically connected to a cathode for the OLED pixels and provide a cathode voltage to the cathode. First and second inorganic passivation layers may be formed over the OLED pixels. Multiple discrete portions of an organic inkjet printed layer may be interposed between the first and second inorganic passivation layers.
    Type: Application
    Filed: October 10, 2023
    Publication date: June 27, 2024
    Inventors: Prashant Mandlik, Bhadrinarayana Lalgudi Visweswaran, Mahendra Chhabra, Chia-Hao Chang, Shiyi Liu, Siddharth Harikrishna Mohan, Zhen Zhang, Han-Chieh Chang, Yi Qiao, Yue Cui, Tyler R Kakuda, Michael Vosgueritchian, Sudirukkuge T. Jinasundera, Warren S Rieutort-Louis, Tsung-Ting Tsai, Jae Won Choi, Jiun-Jye Chang, Jean-Pierre S Guillou, Rui Liu, Po-Chun Yeh, Chieh Hung Yang, Ankit Mahajan, Takahide Ishii, Pei-Ling Lin, Pei Yin, Gwanwoo Park, Markus Einzinger, Martijn Kuik, Abhijeet S Bagal, Kyounghwan Kim, Jonathan H Beck, Chiang-Jen Hsiao, Chih-Hao Kung, Chih-Lei Chen, Chih-Yu Chung, Chuan-Jung Lin, Jung Yen Huang, Kuan-Chi Chen, Shinya Ono, Wei Jung Hsieh, Wei-Chieh Lin, Yi-Pu Chen, Yuan Ming Chiang, An-Di Sheu, Chi-Wei Chou, Chin-Fu Lee, Ko-Wei Chen, Kuan-Yi Lee, Weixin Li, Shin-Hung Yeh, Shyuan Yang, Themistoklis Afentakis, Asli Sirman, Baolin Tian, Han Liu
  • METHOD FOR PREPARING SEMICONDUCTOR LAYER
    Publication number: 20240213021
    Abstract: A method for preparing a semiconductor layer comprises the following steps: providing a mica substrate; depositing a plurality of semiconductor films on the mica substrate to form a semiconductor substrate; and cooling the semiconductor substrate at a cooling rate to separate the plurality of semiconductor films from the mica substrate to obtain a semiconductor layer, wherein the cooling rate ranges from 10° C./min to 50° C./min. Herein, the plurality of semiconductor films comprise a first semiconductor film and a second semiconductor film, the first semiconductor film is formed at a first temperature, the second semiconductor film is formed at a second temperature, the first temperature is lower than the second temperature, and the first semiconductor film is disposed between the mica substrate and the second semiconductor film.
    Type: Application
    Filed: February 14, 2023
    Publication date: June 27, 2024
    Inventors: Yi-Chia CHOU, Chang-Hsun HUANG
  • INTEGRATING A DOCUMENT SIGNATURE SYSTEM WITH AN ACCOUNT MANAGEMENT SYSTEM
    Publication number: 20240211638
    Abstract: The present disclosure relates to systems, non-transitory computer-readable media, and methods for integrating a document signature system with an account management system. In particular, in one or more embodiments, the disclosed systems activate a digital document template for integration with the account management system, receive interaction data by a client device with a digital document, and send the interaction data or the digital document to the account management system.
    Type: Application
    Filed: December 23, 2022
    Publication date: June 27, 2024
    Inventors: Esther Chou, Angela Field, Hameez Farrell, Jennifer Young, Mackenzie Cyr, Mara Saltzman, Martin Todorov, Sulav Regmi, Timothy Finnerty, Vishaka Varma Vimal, David Tang
  • Quartz Crystal Resonator and Manufacturing Method
    Publication number: 20240213954
    Abstract: A quartz crystal resonator including a quartz crystal obtained from a quartz bar is provided. The quartz bar has a light axis, an electrical axis along a length of the quartz bar, and a mechanical axis that are perpendicular to one another. The quartz crystal has a major face cut from the quartz bar along a cutting plane. The cutting plane has a first angle of about 35° to about 36° with the light axis and has a second angle with the electric axis. The first angle is obtained by rotation about the electric axis, and the second angle is obtained by rotation about the light axis, such that the quartz crystal has a vibration frequency deviation inflection point in a range from about 30° C. to about 45° C. Methods for making the quartz crystal are also provided.
    Type: Application
    Filed: June 12, 2023
    Publication date: June 27, 2024
    Inventors: Ta-Jen Chou, Po-Yang Su, Yi-Sheng Chiang
  • Sensor device combined with digital assistant
    Patent number: D1033240
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: July 2, 2024
    Assignee: AMBIT MICROSYSTEMS (SHANGHAI) LTD.
    Inventor: Yu-Ying Chou