Patents by Inventor Chris Hills

Chris Hills has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060110936
    Abstract: Methods for forming dielectric layers, and structures and devices resulting from such methods, and systems that incorporate the devices are provided. The invention provides an aluminum oxide/silicon oxide laminate film formed by sequentially exposing a substrate to an organoaluminum catalyst to form a monolayer over the surface, remote plasmas of oxygen and nitrogen to convert the organoaluminum layer to a porous aluminum oxide layer, and a silanol precursor to form a thick layer of silicon dioxide over the porous oxide layer. The process provides an increased rate of deposition of the silicon dioxide, with each cycle producing a thick layer of silicon dioxide of about 120 ? over the layer of porous aluminum oxide.
    Type: Application
    Filed: December 29, 2005
    Publication date: May 25, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Chris Hill, Garo Derderian
  • Publication number: 20060046518
    Abstract: Methods for forming dielectric layers, and structures and devices resulting from such methods, and systems that incorporate the devices are provided. The invention provides an aluminum oxide/silicon oxide laminate film formed by sequentially exposing a substrate to an organoaluminum catalyst to form a monolayer over the surface, remote plasmas of oxygen and nitrogen to convert the organoaluminum layer to a porous aluminum oxide layer, and a silanol precursor to form a thick layer of silicon dioxide over the porous oxide layer. The process provides an increased rate of deposition of the silicon dioxide, with each cycle producing a thick layer of silicon dioxide of about 120 ? over the layer of porous aluminum oxide.
    Type: Application
    Filed: August 31, 2004
    Publication date: March 2, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Chris Hill, Garo Derderian
  • Publication number: 20060046419
    Abstract: Double-sided container capacitors are formed using sacrificial layers. A sacrificial layer is formed within a recess in a structural layer. A lower electrode is formed within the recess. The sacrificial layer is removed to create a space to allow access to the sides of the structural layer. The structural layer is removed, creating an isolated lower electrode. The lower electrode can be covered with a capacitor dielectric and upper electrode to form a double-sided container capacitor.
    Type: Application
    Filed: December 22, 2004
    Publication date: March 2, 2006
    Inventors: Gurtej Sandhu, Kevin Shea, Chris Hill, Kevin Torek
  • Publication number: 20060038293
    Abstract: An inter-metal dielectric (IMD) fill process includes depositing an insulating nanolaminate barrier layer. The nanolaminate is preferably an oxide liner formed by using an alternating layer deposition process. The layer is highly conformal and is an excellent diffusion barrier. Gaps between metal lines are filled using high density plasma chemical vapor deposition with a reactive species gas. The barrier layer protects the metal lines from shorts between neighboring layers. The resulting structure has substantially uneroded metal lines and an insulating IMD fill.
    Type: Application
    Filed: August 23, 2004
    Publication date: February 23, 2006
    Inventors: Neal Rueger, Chris Hill, Zailong Bian, John Smythe
  • Publication number: 20060035471
    Abstract: A substrate is positioned within a deposition chamber. At least two gaseous precursors are fed to the chamber which collectively comprise silicon, an oxidizer comprising oxygen and dopant which become part of the deposited doped silicon dioxide. The feeding is over at least two different time periods and under conditions effective to deposit a doped silicon dioxide layer on the substrate. The time periods and conditions are characterized by some period of time when one of said gaseous precursors comprising said dopant is flowed to the chamber in the substantial absence of flowing any of said oxidizer precursor. In one implementation, the time periods and conditions are effective to at least initially deposit a greater quantity of doped silicon dioxide within at least some gaps on the substrate as compared to any doped silicon dioxide deposited atop substrate structure which define said gaps.
    Type: Application
    Filed: August 16, 2005
    Publication date: February 16, 2006
    Inventors: Chris Hill, Weimin Li, Gurtej Sandhu
  • Publication number: 20060024973
    Abstract: A chemical vapor deposition method includes providing a semiconductor substrate within a chemical vapor deposition chamber. At least one liquid deposition precursor is vaporized with a vaporizer to form a flowing vaporized precursor stream. The flowing vaporized precursor stream is initially bypassed from entering the chamber for a first period of time while the substrate is in the deposition chamber. After the first period of time, the flowing vaporized precursor stream is directed to flow into the chamber with the substrate therein under conditions effective to chemical vapor deposit a layer over the substrate. A method of etching a contact opening over a node location on a semiconductor substrate is disclosed.
    Type: Application
    Filed: September 28, 2005
    Publication date: February 2, 2006
    Inventors: Mark Jost, Chris Hill
  • Publication number: 20060008972
    Abstract: This invention includes methods of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry, and to methods of forming trench isolation in the fabrication of integrated circuitry. In one implementation, a method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry includes flowing an aluminum containing organic precursor to a chamber containing a semiconductor substrate effective to deposit an aluminum comprising layer over the substrate. An alkoxysilanol is flowed to the substrate comprising the aluminum comprising layer within the chamber effective to deposit a silicon dioxide comprising layer over the substrate.
    Type: Application
    Filed: August 31, 2005
    Publication date: January 12, 2006
    Inventors: Garo Derderian, Chris Hill
  • Publication number: 20050266676
    Abstract: A multiple dielectric device and its method of manufacture overlaying a semiconductor material, comprising a substrate, an opening relative to the substrate, the opening having an aspect ratio greater than about two, a first dielectric layer in the opening, wherein a portion of the opening not filled with the first dielectric layer has an aspect ratio of not greater than about two, and a second dielectric layer over said first dielectric layer. The deposition rates of the first and second dielectric layers may be achieved through changes in process settings, such as temperature, reactor chamber pressure, dopant concentration, flow rate, and a spacing between the shower head and the assembly. The dielectric layer of present invention provides a first layer dielectric having a low deposition rate as a first step, and an efficiently formed second dielectric layer as a second completing step.
    Type: Application
    Filed: May 19, 2005
    Publication date: December 1, 2005
    Inventor: Chris Hill
  • Patent number: 6919855
    Abstract: A sub-reflector for a dish reflector antenna with a waveguide supported sub-reflector. The sub-reflector formed from a dielectric block, concentric about a longitudinal axis. The dielectric block having a first diameter waveguide junction portion adapted for coupling to an end of the waveguide and a sub-reflector surface coated with an RF reflective material having a periphery with a second diameter larger than the first diameter. A leading cone surface extends from the waveguide junction portion to the second diameter at an angle. The sub-reflector surface and the leading cone surface having a plurality of non-periodic perturbations concentric about the longitudinal axis.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: July 19, 2005
    Assignee: Andrew Corporation
    Inventor: Chris Hills
  • Publication number: 20050062663
    Abstract: A sub-reflector for a dish reflector antenna with a waveguide supported sub-reflector. The sub-reflector formed from a dielectric block, concentric about a longitudinal axis. The dielectric block having a first diameter waveguide junction portion adapted for coupling to an end of the waveguide and a sub-reflector surface coated with an RF reflective material having a periphery with a second diameter larger than the first diameter. A leading cone surface extends from the waveguide junction portion to the second diameter at an angle. The sub-reflector surface and the leading cone surface having a plurality of non-periodic perturbations concentric about the longitudinal axis.
    Type: Application
    Filed: September 18, 2003
    Publication date: March 24, 2005
    Applicant: ANDREW CORPORATION
    Inventor: Chris Hills
  • Patent number: 6373170
    Abstract: A piezoelectric motor has a head to movably engage a separate member, and one or more piezoelectric blocks coupled to the head, and displacing the head and separate member by selectively expand and contract in response to an applied electric field. An electrode extends between the head and the piezoelectric block. One or more apertures are formed in the electrode to create a space between the head and the at least one piezoelectric block to receive an adhesive to join the head and the piezoelectric block. A joint is formed between the piezoelectric block and head which has a first rigid zone to displace as the piezoelectric block expands, and a second compliant zone to comply. The electrode extends only through a portion of the joint, or the rigid zone, and the adhesive extends through at least another portion of the joint, or the compliant zone.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: April 16, 2002
    Assignee: EDO Electro-Ceramic Products
    Inventor: Chris Hills
  • Patent number: 6306766
    Abstract: A method of forming a crystalline phase material includes, a) providing a stress inducing material within or operatively adjacent a crystalline material of a first crystalline phase; and b) annealing the crystalline material of the first crystalline phase under conditions effective to transform it to a second crystalline phase. The stress inducing material preferably induces compressive stress within the first crystalline phase during the anneal to the second crystalline phase to lower the required activation energy to produce a more dense second crystalline phase. Example compressive stress inducing layers include SiO2 and Si3N4, while example stress inducing materials for providing into layers are Ge, W and Co. Where the compressive stress inducing material is provided on the same side of a wafer over which the crystalline phase material is provided, it is provided to have a thermal coefficient of expansion which is less than the first phase crystalline material.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: October 23, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Chris Hill, Sujit Sharan
  • Patent number: 6090708
    Abstract: A method of forming a crystalline phase material includes providing a stress inducing material on a substrate and, after providing the stress inducing material on the substrate, depositing a crystalline phase material over the substrate in a substantially continuous manner and changing deposition temperature at least once during the depositing, and forming the second crystalline phase of the crystalline phase material. In accordance another aspect, a method is performed by providing a stress inducing material on a substrate and, after providing the stress inducing material on the substrate, forming a crystalline phase material over the substrate in at least two discrete crystalline phase material depositions, a later of the depositions being conducted at a different temperature from an earlier of the depositions and forming the second crystalline phase of the crystalline phase material.
    Type: Grant
    Filed: February 23, 1998
    Date of Patent: July 18, 2000
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Chris Hill, Sujit Sharan