Abstract: A method for detaching a layer from a wafer. A weakened zone is created in the wafer to define the layer to be detached and a remainder portion of the wafer, such that the weakened zone includes a main region and a localized super-weakened region that is more weakened than the main region. Detachment of the layer from the remainder portion of the wafer is initiated at the super-weakened region such that the detachment properties to the main region to detach the layer from the remainder portion.

Abstract: A composite structure in accordance with the invention includes front faces of first and second substrates that are molecularly bonded to each other, wherein the dimensions of the second substrate outline are larger than the first substrate outline. The front faces are molecularly bonded such that the outline of the first front face is disposed at least partially within the outline of the second front face. A peripheral ring extends around the first front face and facing the first substrate, in which bonding between the front faces is weak or absent, and has a maximum width of less than about 0.5 mm.

Abstract: This invention provides methods for predictively revealing, in bulk silicon substrates, latent crystalline defects in bulk silicon substrates that become apparent only after subsequent processing, e.g., after processing during which multiple layers are split and lifted from the bulk substrates. Preferred predictive methods include a revealing heat treatment of bulk substrates conducted in a non-reducing atmosphere at a temperature in the range from approximately 500° C. to 1300° C. If desired, a further revealing heat treatment or defect enlargement step can be performed to enlarge defects revealed by the first revealing heat treatment.

Abstract: A composite structure that includes front faces of the first and second substrates that are molecularly bonded to each other. The dimensions of the second substrate outline are larger than the first substrate outline, and a peripheral side of the second substrate substantially borders the second front face and is oriented generally perpendicularly with respect thereto. The front faces are molecularly bonded such that the outline of the first front face is disposed at least partially within the outline of the second front face. A peripheral ring extending around the first front face and facing the first substrate, in which bonding between the front faces is weak or absent, has a maximum width of less than about 0.5 mm.

Abstract: A process for detaching two layers of material according to a weakened zone defined between the layers. This process includes the thermal annealing of a structure that incorporates the layers, with the annealing bringing the temperature from a starting temperature to a final annealing temperature while evolving according to a first phase up to a transition temperature, then according to a second phase during which the rise in temperature per unit of time is greater than that of the first phase. The invention also concerns an application for using this process in a particular semiconductor fabrication technique.

Abstract: A method for producing thin layers of a semiconductor material from a donor wafer, which comprises in succession forming a first weakened region in a donor wafer below a first face and at a depth corresponding substantially to the thickness of a first thin layer to be transferred, detaching the first thin layer having upper and lower boundaries defined by the first face and the first weakened region, forming a second weakened region in the donor wafer after detachment of the first thin layer and without conducting an intermediate recycling step, with the second weakened region formed below a second face of the donor wafer and at a depth corresponding substantially to the thickness of a second thin layer to be transferred, and detaching the second thin layer having upper and lower boundaries defined by the second face and the second weakened region. Resultant semiconductor-on-insulator structures are also included.

Abstract: A method for transferring a first substrate to a second substrate. First and second front faces of first and second substrates, respectively, are molecularly bonded to each other to provide a composite structure. The first front face has a first outline, the second front face has a second outline, and a peripheral side of the second substrate substantially borders the second front face and is oriented generally perpendicularly with respect thereto. The second outline has dimensions larger than the first outline, such that during bonding at least a portion of the first outline is disposed within the second outline for minimizing the size of a peripheral region about the first front face within an overlapping area at which the front faces overlap, in which peripheral region the bonding between the faces is weak or absent. A useful layer from a donor substrate, the useful layer comprising one of the first or second substrate adjacent the bonded face thereof.

Abstract: Processes for forming semiconductor structure comprising a transfer layer transferred from a donor substrate are provided in which the resulting structure has improved quality with respect to defects and resulting structures therefrom. For example, a semiconductor on insulator (“SeOI”) structure can be formed using a donor substrate, a support substrate and an insulating layer. The donor substrate may be formed using CZ pulling of semiconductor material at a rate that results in the existence of vacancy clusters. An insulating layer for the SeOI structure can be formed by depositing an oxide layer on the donor or support substrate. An insulating layer can also be formed by thermal oxidizing the support substrate. An SeOI structure can be formed by combining the donor substrate, the support substrate, and the insulating layer there between, and detaching the combination including a thin layer of the donor substrate using a zone of weakness that was formed in the donor substrate.

Abstract: This invention provides methods for predictively revealing, in bulk silicon substrates, latent crystalline defects in bulk silicon substrates that become apparent only after subsequent processing, e.g., after processing during which multiple layers are split and lifted from the bulk substrates. Preferred predictive methods include a revealing heat treatment of bulk substrates conducted in a non-reducing atmosphere at a temperature in the range from approximately 500° C. to 1300° C. If desired, a further revealing heat treatment or defect enlargement step can be performed to enlarge defects revealed by the first revealing heat treatment.

Abstract: A process for transferring a thin film includes forming a layer of inclusions to create traps for gaseous compounds. The inclusions can be in the form of one or more implanted regions that function as confinement layers configured to trap implanted species. Further, the inclusions can be in the form of one or more layers deposited by a chemical vapor deposition, epitaxial growth, ion sputtering, or a stressed region or layer formed by any of the aforementioned processes. The inclusions can also be a region formed by heat treatment of an initial support or by heat treatment of a layer formed by any of the aforementioned processes, or by etching cavities in a layer. In a subsequent step, gaseous compounds are introduced into the layer of inclusions to form micro-cavities that form a fracture plane along which the thin film can be separated from a remainder of the substrate.

Abstract: A method for bonding semiconductor structures together is described. The technique includes providing a bonding surface on each of two semiconductor structures, brushing a bonding surface of at least one of the structures to remove contaminants and to activate hydroxyl groups on the bonding surface to enhance hydrophilicity and to facilitate molecular bonding of the structures, and joining the bonding surfaces together by molecular bonding to form a composite structure.

Abstract: A process for transferring a thin film includes forming a layer of inclusions to create traps for gaseous compounds. The inclusions can be in the form of one or more implanted regions that function as confinement layers configured to trap implanted species. Further, the inclusions can be in the form of one or more layers deposited by a chemical vapor deposition, epitaxial growth, ion sputtering, or a stressed region or layer formed by any of the aforementioned processes. The inclusions can also be a region formed by heat treatment of an initial support or by heat treatment of a layer formed by any of the aforementioned processes, or by etching cavities in a layer. In a subsequent step, gaseous compounds are introduced into the layer of inclusions to form micro-cavities that form a fracture plane along which the thin film can be separated from a remainder of the substrate.

Abstract: A method for minimizing defects when transferring a useful layer from a donor wafer to a receptor wafer is described. The method includes providing a donor wafer having a surface below which a zone of weakness is present to define a useful layer to be transferred, molecularly bonding at a bonding interface the surface of the useful layer of the donor wafer to a surface of the receptor wafer to form a structure, heating the structure at a first temperature that is substantially higher than ambient temperature for a first time period sufficient to liberate water molecules from the bonding interface, with the heating being insufficient to cause detachment of the useful layer at the zone of weakness, and detaching the useful layer from the donor wafer.

Abstract: A preventive treatment method for a multilayer semiconductor wafer is described. The semiconductor wafer includes a supporting substrate, at least one intermediate layer and a surface layer in which an intermediate layer has an exposed lateral edge and the wafer is to be subjected to a subsequent treatment. The method includes encapsulating the exposed lateral edge of the intermediate layer with a portion of the surface layer to prevent attack on the peripheral edge during the subsequent treatment.

Abstract: The invention provides methods for applying high temperature treatments to semiconductor wafers that limit surface tearing-off defects and surface particle contamination. In preferred embodiments, the high temperature treatments begin at boat-in temperatures of less than about 550° C. and include a first temperature ramp-up to the HT treatment temperatures at rates of 6° C./min or less. These methods are advantageously applied to semiconductor wafers comprising layers of different thermal properties, and in particular to semiconductor wafers comprising silicon-on-insulator structures.

Abstract: A method for preparing an oxidized surface of a first wafer for bonding with a second wafer. The method includes treating the oxidized surface with a solution of NH4OH/H2O2 at treatment parameters sufficient to etch about 10 ? to about 120 ? from the wafer surface, followed by treating the etched surface with hydrochloric acid species at a temperature below about 50° C. for a duration of less than about 10 minutes to remove isolated particles from the oxidized surface. This method cleans the wafer surface without increasing roughness or creating rough patches thereon, and thus provides a cleaned surface capable of providing an increased bonding energy between the first and second wafers when those surfaces are bonded together. This cleaning process is advantageously used in a thin layer removal process to fabricate a semiconductor on insulator structure.

Abstract: A method for minimizing or avoiding contamination of a receiving handle wafer during transfer of a thin layer from a donor wafer. This method includes one step of providing a donor wafer and a receiving handle wafer, each having a first surface prepared for bonding and a second surface, with the donor layer including a zone of weakness that defines a thin layer of donor wafer material to be transferred to the receiving handle wafer. Next, at least one of the first surfaces is treated to provide increased bonding energy when the first surfaces are bonded together; the surfaces are then bonded together to form an intermediate multilayer structure; and the thin layer is transferred to the receiving handle wafer to form a final multilayer structure by detachment at the zone of weakness and removal of remaining material of the donor wafer.

Abstract: The present invention relates to a method of manufacturing a semiconductor wafer that includes providing a substrate of a single crystalline first material that has an unfinished or rough surface, and epitaxially growing at least one layer of a second material directly on the unfinished or rough surface of the first material. The second material has a lattice that is different from that of the first material and the epitaxial growing of the second material is advantageously performed before a final surface finishing step on the unfinished or rough surface of the substrate to increase bonding between the materials.

Abstract: A method for minimizing slip line faults on a surface of a semiconductor wafer that has been obtained using a transfer technique. The method includes heating the semiconductor wafer from an ambient temperature to a first higher temperature and pausing the heating at the first higher temperature for a time sufficient to stabilize the wafer. Then the wafer is heated further from the first higher temperature to a target higher temperature during a predetermined time interval. The further heating during an initial portion of the time interval is conducted at a relatively low heating rate and the heating during a final portion of the time interval is conducted at a relatively higher heating rate to thus minimize slip line faults in the surface of the wafer.

Abstract: A method for producing a high quality useful layer of semiconductor material on a substrate. The method includes implanting at least two different atomic species into a face of a donor substrate to a controlled mean implantation depth to form a weakened zone therein and to define a useful layer. The implanting step is conducted to minimize low-frequency roughness at the weakened zone. Next, the method includes bonding a support substrate to the face of the donor substrate, and detaching the useful layer from the donor substrate along the weakened zone. A structure is thus formed that includes the useful layer on the support substrate with the useful layer presenting a surface for further processing. The technique also includes thermally treating the structure to minimize high-frequency roughness of the surface of the useful layer. The result is a surface having sufficient smoothness so that chemical mechanical polishing (CMP) is not needed.