Abstract: A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

Abstract: A method and apparatus, the method comprising: transferring a layer of two dimensional material from a liquid surface onto a layer of woven electronic fabric; wherein the woven electronic fabric comprises a plurality of conductive strands and a plurality of non conductive strands such that the layer of two dimensional material and woven electronic fabric form a sensor.

Abstract: A hybrid currency banknote includes a banknote having visible markings. One or more light-controlling elements and a controller are embedded in or on the banknote. The controller is electrically connected to the one or more light-controlling elements to control the one or more light-controlling elements. A power input connection is electrically connected to the controller, or one or more light-controlling elements, or both. A power source can be connected to the power input connection, for example a piezoelectric or photovoltaic power source. In response to applied power, the controller causes the one or more light-controlling elements to emit light. A value can be stored in a memory in the controller and displayed by the light-controlling elements. The value can be assigned or varied by a hybrid currency teller machine.

Abstract: A semiconductor chip for measuring a magnetic field. The semiconductor chip comprises a magnetic sensing element, and an electronic circuit. The magnetic sensing element is mounted on the electronic circuit. The magnetic sensing element is electrically connected with the electronic circuit. The electronic circuit is produced in a first technology and/or first material and the magnetic sensing element is produced in a second technology and/or second material different from the first technology/material.

Abstract: A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.

Abstract: In certain embodiments, a method of making a semiconductor structure suitable for transfer printing (e.g., micro-transfer printing) includes providing a support substrate and disposing and processing one or more semiconductor layers on the support substrate to make a completed semiconductor device. A patterned release layer and, optionally, a capping layer are disposed on or over the completed semiconductor device and the patterned release layer or capping layer, if present, are bonded to a handle substrate with a bonding layer. The support substrate is removed to expose the completed semiconductor device and, in some embodiments, a portion of the patterned release layer. In some embodiments, an entry path is formed to expose a portion of the patterned release layer. In some embodiments, the release layer is etched and the completed semiconductor devices transfer printed (e.g., micro-transfer printed) from the handle substrate to a destination substrate.

Abstract: A single metal layer device, such as a display or sensor, comprises a substrate and a patterned metal layer. The patterned metal layer forms a two-dimensional array of spatially separated column line segments that each extend only partially across the display substrate in a column direction and forms a one-dimensional array of row lines extending across the display substrate in a row direction different from the column direction. The row lines and column line segments are electrically separate in the patterned metal layer. Spatially separated electrical jumpers are disposed on the display substrate and electrically connect pairs of column line segments adjacent in the column direction. Each electrical jumper has an independent jumper substrate independent of and separate from the display substrate. In certain embodiments, spatially separated light-emitting pixel circuits are disposed on a display substrate and are electrically connected to at least one row line and one column line.

Abstract: At least one application may include instructions comprising application instructions and a plurality of separate pipeline definition instructions. The application instructions may be within a virtual container including at least one program that is generically executable in a plurality of different continuous integration and delivery (CI/CD) environments. Each of the plurality of separate pipeline definition instructions may be configured for each of the plurality of different CI/CD environments such that each pipeline definition may operate only in the CI/CD environment for which it is created. Each pipeline definition may be configured to cause the CI/CD environment for which it is created to execute the at least one program.

Abstract: At least one application may include instructions comprising application instructions and a plurality of separate pipeline definition instructions. The application instructions may be within a virtual container including at least one program that is generically executable in a plurality of different continuous integration and delivery (CI/CD) environments. Each of the plurality of separate pipeline definition instructions may be configured for each of the plurality of different CI/CD environments such that each pipeline definition may operate only in the CI/CD environment for which it is created. Each pipeline definition may be configured to cause the CI/CD environment for which it is created to execute the at least one program.

Abstract: Methods of forming integrated circuit devices include forming a sacrificial layer on a handling substrate and forming a semiconductor active layer on the sacrificial layer. The semiconductor active layer and the sacrificial layer may be selectively etched in sequence to define an semiconductor-on-insulator (SOI) substrate, which includes a first portion of the semiconductor active layer. A multi-layer electrical interconnect network may be formed on the SOI substrate. This multi-layer electrical interconnect network may be encapsulated by an inorganic capping layer that contacts an upper surface of the first portion of the semiconductor active layer. The capping layer and the first portion of the semiconductor active layer may be selectively etched to thereby expose the sacrificial layer.

Abstract: The present invention provides structures and methods that enable the construction of micro-LED chiplets formed on a sapphire substrate that can be micro-transfer printed. Such printed structures enable low-cost, high-performance arrays of electrically connected micro-LEDs useful, for example, in display systems. Furthermore, in an embodiment, the electrical contacts for printed LEDs are electrically interconnected in a single set of process steps. In certain embodiments, formation of the printable micro devices begins while the semiconductor structure remains on a substrate. After partially forming the printable micro devices, a handle substrate is attached to the system opposite the substrate such that the system is secured to the handle substrate. The substrate may then be removed and formation of the semiconductor structures is completed. Upon completion, the printable micro devices may be micro transfer printed to a destination substrate.

Abstract: In certain embodiments, a method of making a semiconductor structure suitable for transfer printing (e.g., micro-transfer printing) includes providing a support substrate and disposing and processing one or more semiconductor layers on the support substrate to make a completed semiconductor device. A patterned release layer and, optionally, a capping layer are disposed on or over the completed semiconductor device and the patterned release layer or capping layer, if present, are bonded to a handle substrate with a bonding layer. The support substrate is removed to expose the completed semiconductor device and, in some embodiments, a portion of the patterned release layer. In some embodiments, an entry path is formed to expose a portion of the patterned release layer. In some embodiments, the release layer is etched and the completed semiconductor devices transfer printed (e.g., micro-transfer printed) from the handle substrate to a destination substrate.

Abstract: A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

Abstract: A method for producing a plurality of semiconductor components and a semiconductor component are disclosed. In an embodiment the component includes a light transmissive carrier, a semiconductor body disposed on the light transmissive carrier, the semiconductor body including a first semiconductor layer, a second semiconductor layer and an active region being arranged between the first semiconductor layer and the second semiconductor layer, wherein the semiconductor body includes a first patterned main surface facing the light transmissive carrier and a second main surface facing away from the carrier and a contact structure including a first contact area and a second contact area arranged on the second main surface, wherein the second contact area is electrically connected to the second semiconductor layer, and wherein the contact structure comprises a via extending from the second main surface throughout the second semiconductor layer and the active region into the first semiconductor layer.

Abstract: A single metal layer device, such as a display or sensor, comprises a substrate and a patterned metal layer. The patterned metal layer forms a two-dimensional array of spatially separated column line segments that each extend only partially across the display substrate in a column direction and forms a one-dimensional array of row lines extending across the display substrate in a row direction different from the column direction. The row lines and column line segments are electrically separate in the patterned metal layer. Spatially separated electrical jumpers are disposed on the display substrate and electrically connect pairs of column line segments adjacent in the column direction. Each electrical jumper has an independent jumper substrate independent of and separate from the display substrate. In certain embodiments, spatially separated light-emitting pixel circuits are disposed on a display substrate and are electrically connected to at least one row line and one column line.

Abstract: A method of making a micro-transfer printed system includes providing a source wafer having a plurality of micro-transfer printable source devices arranged at a source spatial density; providing an intermediate wafer having a plurality of micro-transfer printable intermediate supports arranged at an intermediate spatial density less than or equal to the source spatial density; providing a destination substrate; micro-transfer printing the source devices from the source wafer to the intermediate supports of the intermediate wafer with a source stamp having a plurality of posts at a source transfer density to make an intermediate device on each intermediate support; and micro-transfer printing the intermediate devices from the intermediate wafer to the destination substrate at a destination spatial density less than the source spatial density with an intermediate stamp having a plurality of posts at an intermediate transfer density less than the source transfer density.

Abstract: A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.

Abstract: The present invention provides structures and methods that enable the construction of micro-LED chiplets formed on a sapphire substrate that can be micro-transfer printed. Such printed structures enable low-cost, high-performance arrays of electrically connected micro-LEDs useful, for example, in display systems. Furthermore, in an embodiment, the electrical contacts for printed LEDs are electrically interconnected in a single set of process steps. In certain embodiments, formation of the printable micro devices begins while the semiconductor structure remains on a substrate. After partially forming the printable micro devices, a handle substrate is attached to the system opposite the substrate such that the system is secured to the handle substrate. The substrate may then be removed and formation of the semiconductor structures is completed. Upon completion, the printable micro devices may be micro transfer printed to a destination substrate.

Abstract: In certain embodiments, a method of making a semiconductor structure suitable for transfer printing (e.g., micro-transfer printing) includes providing a support substrate and disposing and processing one or more semiconductor layers on the support substrate to make a completed semiconductor device. A patterned release layer and, optionally, a capping layer are disposed on or over the completed semiconductor device and the patterned release layer or capping layer, if present, are bonded to a handle substrate with a bonding layer. The support substrate is removed to expose the completed semiconductor device and, in some embodiments, a portion of the patterned release layer. In some embodiments, an entry path is formed to expose a portion of the patterned release layer. In some embodiments, the release layer is etched and the completed semiconductor devices transfer printed (e.g., micro-transfer printed) from the handle substrate to a destination substrate.