Abstract: Methods and apparatus for ATM segmentation and reassembly (SAR) which provide efficient transfer of ATM cell data between an ATM network and a set top box or other processing system. Reassembly operations are performed using a receive ring which stores an array of pointers. Each of the pointers specifies the address of a cell buffer suitable for storing a received ATM cell. Received ATM cells are first filtered to determine if the cells should be accepted. When a given cell is accepted, a pointer retrieved from the receive ring is used to determine the address of a cell buffer in which that cell will be stored. Host CPU software directing the operation of the SAR device periodically services the receive ring to prevent overflow. The host CPU software services the receive ring by sequentially stepping through the ring entries and linking the pointer for each stored cell into a chain of pointers maintained for the VCI on which that stored cell was received.

Abstract: A method and apparatus for prescaling graphics data for use in a graphics overlay operating mode of a set top box processing system. RGB pixel data for a given pixel are first converted to luminance and chrominance data for that pixel. The luminance and chrominance data are then prescaled by a blending value associated with the given pixel. An interpolation operation is performed on the luminance and chrominance data as well as on the blending value for the given pixel using corresponding luminance and chrominance data and blending values for at least one other pixel in the stream. This interpolation may include operations such as horizontal filtering and may also include chroma filtering to convert the luminance and chrominance data into a 4:2:2 chrominance format compatible with MPEG-2 video. The interpolation operation produces interpolated luminance and chrominance data and an interpolated blending value for the given pixel.

Abstract: A method and apparatus for dynamic alteration of a color look-up table (CLUT) pallet identifier in response to one or more key codes placed in an input data stream. An input data stream including a sequence of input data blocks is converted into a stream suitable for addressing a look-up table. The look-up table may be a 256.times.16 table which requires an 8-bit address to identify a particular table entry. The invention allows such a table to be addressed using 4-bit data blocks in the input data stream. For each received 4-bit data block in the input data stream, a determination is made as to whether that block corresponds to a predetermined key value. If a given input block does not correspond to the predetermined key value, the 4-bit input block is combined with a previously-stored 4-bit pallet identifier to generate an 8-bit address into the look-up table. The pallet identifier specifies one of 16 different 16-entry pallets within the 256.times.16 look-up table.

Abstract: A method and apparatus for single-buffered display capture which eliminates a "tearing" problem inherent in certain conventional video display techniques. A video signal including a sequence of frames each having an even field and an odd field is applied to a video capture circuit. First and second sets of lines each representing a different subset of all the lines in a given even or odd field are captured in the video capture circuit and displayed by a video display circuit. The video capture circuit captures the first set of lines in an even field of the video signal during a time period in which the video display circuit displays the second set of lines in the even field. The video capture circuit also captures the second set of lines in an odd field of the video signal during a time period in which the video display circuit displays the first set of lines in the odd field.

Abstract: A method and apparatus for differential video data encoding which utilizes a reduced number of bits per pixel to encode chroma and luma components of a video data stream. A 4-bit absolute code is determined for a given 8-bit luma or chroma component in the data stream. The determined absolute code is indicative of a particular one of a plurality of ranges into which the given component falls. The given component is encoded using the determined absolute code if the absolute code produces a lower encoding error than a 4-bit delta code which encodes the component as a difference relative to a previously-encoded component. If the delta code produces a lower encoding error than the determined absolute code, the given component is encoded using the delta code. In a situation in which the given component is the first component of its type on a line of video, an absolute code may be used regardless of whether or not the absolute code produces a higher encoding error than the delta code.

Abstract: A method and apparatus for use in a set top box processing system to permit simultaneous utilization of two system clocks in applications in which certain processing system elements utilize one system clock operating at a non-integer multiple of another system clock used by other processing system elements. A synchronous phase detector is used to generate a clock enable signal suitable for use in a pipeline structure to facilitate data transfer between the different elements of the processing system. The clock enable signal includes phase information extracted from the first and second clock signals, and is suitable for use in driving one or more multiplexers in a pipeline structure or other state-based logic device to thereby allow data transfer between an element of the processing system operating at the first clock rate and an element operating at the second clock rate.

Abstract: A sports ball having an inflated or inflatable core (1), an outer covering (12, 13) enclosing the core (11), and a transparent cover layer (14) of transparent film applied to the outer surface of the core covering (12, 13), in which decorative markings (15) are provided at the interface between the internal face of the transparent cover (14) and the outer surface of the outer core covering (12, 13), preferably by application of the markings to the internal face of the transparent cover layer prior to lamination of the various layers of the core covering together. The outer covering on the core (11) may comprise more than one layer (12, 13), and may comprise conventional hand-sewn panels, or may comprise a covering of the non-hand-sewn type. The invention also relates to a method of manufacture of the sports ball.

Abstract: A computer architecture that can rapidly perform a variety of repetitive mathematical operations on multimedia data sets comprises a data processing engine having n data processing devices, each of which includes shift registers and multiplexers for organizing input data into bit slices such that each of the n data processing devices can receive one bit of information from n data samples. Look-up operations are performed in a table memory of each of the n data processing devices on a bit slice, the table memory containing all possible combinations of a constant function. The results of the look-ups are shifted and accumulated to simultaneously generate multiple outputs of a convolution of an input function with the constant function. A data path provides information transfer between each of the n data processing devices.