Abstract: A method and apparatus for forming magnetic media substrates is provided. A patterned resist layer is formed on a substrate having a magnetically susceptible layer. A conformal protective layer is formed over the patterned resist layer to prevent degradation of the pattern during subsequent processing. The substrate is subjected to an energy treatment wherein energetic species penetrate portions of the patterned resist and conformal protective layer according to the pattern formed in the patterned resist, impacting the magnetically susceptible layer and modifying a magnetic property thereof. The patterned resist and conformal protective layers are then removed, leaving a magnetic substrate having a pattern of magnetic properties with a topography that is substantially unchanged.

Abstract: A method for doubling the frequency of a lithographic process using a photo-resist template mask is described. A device layer having a photo-resist layer formed thereon is first provided. The photo-resist layer is patterned to form a photo-resist template mask. A spacer-forming material layer is deposited over the photo-resist template mask. The spacer-forming material layer is etched to form a spacer mask and to expose the photo-resist template mask. The photo-resist template mask is then removed and an image of the spacer mask is finally transferred to the device layer.

Abstract: A plasma enhanced physical vapor deposition process deposits an amorphous carbon layer on an ion-implanted wafer for use in dynamic surface annealing of the wafer with an intense line beam of a laser wavelength. The deposition process is carried out at a wafer temperature below the dopant clustering threshold temperature, and includes introducing the wafer into a chamber having a carbon-containing target overlying the wafer, and furnishing a carrier gas into the chamber. The process further includes generating a wafer bias voltage and applying target source power to the carbon-containing target sufficient to produce ion bombardment of the carbon-containing target. The wafer bias voltage is set to a level at which the amorphous carbon layer that is deposited has a desired extinction coefficient at the laser wavelength.

Abstract: The present invention provides semiconductor device formed by an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.

Abstract: Embodiments of the present invention pertain to methods of forming patterned features on a substrate having a reduced pitch in two dimensions as compared to what is possible using standard photolithography processing techniques using a single high-resolution photomask. A spacer layer is formed over a two-dimensional square grid of cores with a thickness chosen to leave a dimple at the center of four cores on the corners of a square. The spacer layer is etched back to reveal the substrate at the centers of the square. Removing the core material results in double the pattern density of the lithographically defined grid of cores. The regions of exposed substrate may be filled again with core material and the process repeated to quadruple the pattern density.

Abstract: A plasma enhanced physical vapor deposition process deposits an amorphous carbon layer on an ion-implanted wafer for use in dynamic surface annealing of the wafer with an intense line beam of a laser wavelength. The deposition process is carried out at a wafer temperature below the dopant clustering threshold temperature, and includes introducing the wafer into a chamber having a carbon-containing target overlying the wafer, and furnishing a carrier gas into the chamber. The process further includes generating a wafer bias voltage and applying target source power to the carbon-containing target sufficient to produce ion bombardment of the carbon-containing target. The wafer bias voltage is set to a level at which the amorphous carbon layer that is deposited has a desired extinction coefficient at the laser wavelength.

Abstract: Methods are disclosed for activating dopants in a doped semiconductor substrate. A carbon precursor is flowed into a substrate processing chamber within which the doped semiconductor substrate is disposed. A plasma is formed from the carbon precursor in the substrate processing chamber. A carbon film is deposited over the substrate with the plasma. A temperature of the substrate is maintained while depositing the carbon film less than 500° C. The deposited carbon film is exposed to electromagnetic radiation for a period less than 10 ms, and has an extinction coefficient greater than 0.3 at a wavelength comprised by the electromagnetic radiation.

Abstract: A plasma enhanced physical vapor deposition process deposits an amorphous carbon layer on an ion-implanted wafer for use in dynamic surface annealing of the wafer with an intense line beam of a laser wavelength. The deposition process is carried out at a wafer temperature below the dopant clustering threshold temperature, and includes introducing the wafer into a chamber having a carbon-containing target overlying the wafer, and furnishing a carrier gas into the chamber. The process further includes generating a wafer bias voltage and applying target source power to the carbon-containing target sufficient to produce ion bombardment of the carbon-containing target. The wafer bias voltage is set to a level at which the amorphous carbon layer that is deposited has a desired extinction coefficient at the laser wavelength.

Abstract: An anti-reflective hard mask layer left on a radiation-blocking layer during fabrication of a reticle provides functionality when the reticle is used in a semiconductor device manufacturing process.

Abstract: Embodiments of the present invention pertain to methods of forming patterned features on a substrate having a reduced pitch in two dimensions as compared to what is possible using standard photolithography processing techniques using a single high-resolution photomask. A spacer layer is formed over a two-dimensional square grid of cores with a thickness chosen to leave a dimple at the center of four cores on the corners of a square. The spacer layer is etched back to reveal the substrate at the centers of the square. Removing the core material results in double the pattern density of the lithographically defined grid of cores. The regions of exposed substrate may be filled again with core material and the process repeated to quadruple the pattern density.

Abstract: Embodiments of the present invention pertain to methods of forming patterned features on a substrate having an increased density (i.e. reduced pitch) as compared to what is possible using standard photolithography processing techniques using a single high-resolution photomask while also allowing both the width of the patterned features and spacing (trench width) between the patterned features to vary within an integrated circuit.

Abstract: Embodiments of the present invention pertain to methods of forming patterned features on a substrate having an increased density (i.e. reduced pitch) as compared to what is possible using standard photolithography processing techniques using a single high-resolution photomask while also allowing both the width of the patterned features and spacing (trench width) between the patterned features to vary within an integrated circuit.

Abstract: A method is provided for processing a substrate surface by delivering a first gas mixture comprising a first organosilicon compound, a first oxidizing gas, and one or more hydrocarbon compounds into a chamber at deposition conditions sufficient to deposit a first low dielectric constant film on the substrate surface. A second gas mixture having a second organosilicon compound and a second oxidizing gas is delivered into the chamber at deposition conditions sufficient to deposit a second low dielectric constant film on the first low dielectric constant film. The flow rate of the second oxidizing gas into the chamber is increased, and the flow rate of the second organosilicon compound into the chamber is decreased to deposit an oxide rich cap on the second low dielectric constant film.

Abstract: A variety of techniques may be employed alone or in combination to reduce the incidence of defects arising in dielectric stack structures formed by chemical vapor deposition (CVD). Incidence of a first defect type attributable to reaction between an unreacted species of a prior CVD step and reactants of a subsequent CVD step, is reduced by exposing a freshly-deposited dielectric layer to a plasma before any additional layers are deposited. Incidence of a second defect type attributable to the presence of incompletely vaporized CVD liquid precursor material, is reduced by exposing the freshly-deposited dielectric layer to a plasma, and/or by continuing the flow of carrier gas through an injection valve for a period beyond the conclusion of the CVD step.

Abstract: A method is provided for processing a substrate surface by delivering a first gas mixture comprising a first organosilicon compound, a first oxidizing gas, and one or more hydrocarbon compounds into a chamber at deposition conditions sufficient to deposit a first low dielectric constant film on the substrate surface. A second gas mixture having a second organosilicon compound and a second oxidizing gas is delivered into the chamber at deposition conditions sufficient to deposit a second low dielectric constant film on the first low dielectric constant film. The flow rate of the second oxidizing gas into the chamber is increased, and the flow rate of the second organosilicon compound into the chamber is decreased to deposit an oxide rich cap on the second low dielectric constant film.

Abstract: A plasma enhanced physical vapor deposition process deposits an amorphous carbon layer on an ion-implanted wafer for use in dynamic surface annealing of the wafer with an intense line beam of a laser wavelength. The deposition process is carried out at a wafer temperature below the dopant clustering threshold temperature, and includes introducing the wafer into a chamber and furnishing a hydrocarbon process gas into the chamber, preferably propylene (C3H6) or toluene (C7H8) or acetylene (C2H2) or a mixture of acetylene and methane (C2H4). The process further includes inductively coupling RF plasma source power into the chamber while and applying RF plasma bias power to the wafer. The wafer bias voltage is set to a level at which the amorphous carbon layer that is deposited has a desired stress (compressive or tensile). We have discovered that at a wafer temperature less than or equal to 475 degrees C.

Abstract: A gate hard mask is deposited on a gate structure using low pressure chemical vapor deposition (LPCVD). By doing so, the wet etch removal ratio (WERR) of the gate hard mask relative to the underlying polysilicon gate layer is increased when compared to prior art hard masks. The LPCVD gate hard mask will not only etch faster than prior art hard masks, but it will also reduce undercutting of the gate oxide. To provide additional control of the wet etch rate, the LPCVD hard mask can be annealed. The annealing can be tailored to achieve the desired etching rate.

Abstract: A method for doubling the frequency of a lithographic process using a photo-resist template mask is described. A device layer having a photo-resist layer formed thereon is first provided. The photo-resist layer is patterned to form a photo-resist template mask. A spacer-forming material layer is deposited over the photo-resist template mask. The spacer-forming material layer is etched to form a spacer mask and to expose the photo-resist template mask. The photo-resist template mask is then removed and an image of the spacer mask is finally transferred to the device layer.

Abstract: A method is provided for processing a substrate including removing amorphous carbon material disposed on a low k dielectric material with minimal or reduced defect formation and minimal dielectric constant change of the low k dielectric material. In one aspect, the invention provides a method for processing a substrate including depositing at least one dielectric layer on a substrate surface, wherein the dielectric layer comprises silicon, oxygen, and carbon and has a dielectric constant of about 3 or less, forming amorphous carbon material on the at least one dielectric layer, and removing the one or more amorphous carbon layers by exposing the one or more amorphous carbon layers to a plasma of a hydrogen-containing gas.

Abstract: The present invention provides semiconductor device formed by an in situ plasma reducing process to reduce oxides or other contaminants, using a compound of nitrogen and hydrogen, typically ammonia, at relatively low temperatures prior to depositing a subsequent layer thereon. The adhesion characteristics of the layers are improved and oxygen presence is reduced compared to the typical physical sputter cleaning process of an oxide layer. This process may be particularly useful for the complex requirements of a dual damascene structure, especially with copper applications.