Patents by Inventor Christopher J. Petti

Christopher J. Petti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10388646
    Abstract: A surge protection device contains a first electrode, a second electrode electrically connected to electrical ground, and a field-induced switching component electrically contacting the first electrode and the second electrode. The field-induced switching component can include a correlated-electron material or a volatile conductive bridge.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: August 20, 2019
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Derek Stewart, Daniel Bedau, Michael Grobis, Christopher J. Petti
  • Patent number: 10381409
    Abstract: Alternating stacks of insulating strips and sacrificial material strips are formed over a substrate. A laterally alternating sequence of pillar cavities and pillar structures can be formed within each of the line trenches. A phase change memory cell including a discrete metal portion, a phase change memory material portion, and a selector material portion is formed at each level of the sacrificial material strips at a periphery of each of the pillar cavities. Vertical bit lines are formed in the two-dimensional array of pillar cavities. Remaining portions of the sacrificial material strips are replaced with electrically conductive word line strips. Pathways for providing an isotropic etchant for the sacrificial material strips and a reactant for a conductive material of the electrically conductive word line strips may be provided by a backside trench, or by removing the pillar structures to provide backside openings.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: August 13, 2019
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Fei Zhou, Raghuveer S. Makala, Christopher J. Petti, Rahul Sharangpani, Adarsh Rajashekhar, Seung-Yeul Yang
  • Patent number: 10381559
    Abstract: Alternating stacks of insulating strips and sacrificial material strips are formed over a substrate. A laterally alternating sequence of pillar cavities and pillar structures can be formed within each of the line trenches. A phase change memory cell including a discrete metal portion, a phase change memory material portion, and a selector material portion is formed at each level of the sacrificial material strips at a periphery of each of the pillar cavities. Vertical bit lines are formed in the two-dimensional array of pillar cavities. Remaining portions of the sacrificial material strips are replaced with electrically conductive word line strips. Pathways for providing an isotropic etchant for the sacrificial material strips and a reactant for a conductive material of the electrically conductive word line strips may be provided by a backside trench, or by removing the pillar structures to provide backside openings.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: August 13, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Fei Zhou, Raghuveer S. Makala, Christopher J. Petti, Rahul Sharangpani, Adarsh Rajashekhar, Seung-Yeul Yang
  • Patent number: 10374014
    Abstract: A non-volatile memory uses phase change memory (PCM) cells in a three dimensional vertical cross-point structure, in which multiple layers of word lines run in a horizontal direction and bit lines run in a vertical direction. The memory cells are located in a recessed region of the word lines and are separated from the bit line by an ovonic threshold switch. A surfactant lining of the word line recess in which the phase change memory material is placed improves stability of the resistance state of the memory cells, allowing for improved multi-state operation.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: August 6, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Federico Nardi, Christopher J Petti, Gerrit Jan Hemink
  • Patent number: 10374013
    Abstract: A method is provided that includes forming a bit line above a substrate; forming a word line above the substrate, and forming a non-volatile memory cell between the bit line and the word line. The non-volatile memory cell includes a non-volatile memory material coupled in series with an isolation element. The isolation element includes a first electrode, a second electrode, and a semiconductor layer and a barrier layer disposed between the first electrode and the second electrode.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: August 6, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Abhijit Bandyopadhyay, Christopher J. Petti, Natalie Nguyen, Brian Le
  • Publication number: 20190237470
    Abstract: A memory cell is provided that includes a vertical transistor having a gate oxide that includes a ferroelectric material.
    Type: Application
    Filed: January 31, 2018
    Publication date: August 1, 2019
    Applicant: SanDisk Technologies LLC
    Inventors: Teruyuki Mine, Christopher J. Petti
  • Patent number: 10319437
    Abstract: Technology is described for identifying non-volatile memory cells having data that should be refreshed. The technology could be used to identify which groups of memory cells that store cold data should have a data refresh. In one aspect, a non-volatile storage device has at least one monitor memory cell associated with a group of data memory cells. The non-volatile storage device may use different programming techniques to program the data and monitor memory cells. In one aspect, the programming technique used for the monitor memory cell is less stable with respect to state than the technique used to program the associated data memory cells. The state of the monitor memory cell may change in a predictable manner, such that the state of the monitor cell may be sensed periodically to determine whether the associated data memory cells should be refreshed.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: June 11, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Juan Saenz, Christopher J Petti
  • Patent number: 10283562
    Abstract: A non-volatile storage apparatus is proposed that includes a plurality of serially connected non-volatile reversible resistance-switching memory cells, a plurality of word lines such that each of the memory cells is connected to a different word line, a bit line connected to a first end of the serially connected memory cells and a switch connected to a second end of the serially connected memory cells. In one embodiment, the memory cells include a reversible resistance-switching structure comprising a first material, a second material and a reversible resistance-switching interface between the first material and the second material, a channel, and means for switching current between current flowing through the channel and current flowing through the reversible resistance-switching interface in order to program and read the reversible resistance-switching interface. A process for manufacturing the memory is also disclosed.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: May 7, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Luiz M. Franca-Neto, Mac D. Apodaca, Christopher J. Petti
  • Publication number: 20190115072
    Abstract: A non-volatile memory uses phase change memory (PCM) cells in a three dimensional vertical cross-point structure, in which multiple layers of word lines run in a horizontal direction and bit lines run in a vertical direction. The memory cells are located in a recessed region of the word lines and are separated from the bit line by an ovonic threshold switch. A surfactant lining of the word line recess in which the phase change memory material is placed improves stability of the resistance state of the memory cells, allowing for improved multi-state operation.
    Type: Application
    Filed: January 12, 2018
    Publication date: April 18, 2019
    Applicant: SanDisk Technologies LLC
    Inventors: Federico Nardi, Christopher J. Petti, Gerrit Jan Hemink
  • Publication number: 20190115071
    Abstract: A non-volatile memory uses phase change memory (PCM) cells in a three dimensional vertical cross-point structure, in which multiple layers of word lines run in a horizontal direction and bit lines run in a vertical direction. The memory cells are located in a recessed region of the word lines and are separated from the bit line by an ovonic threshold switch. A surfactant lining of the word line recess in which the phase change memory material is placed improves stability of the resistance state of the memory cells, allowing for improved multi-state operation.
    Type: Application
    Filed: January 12, 2018
    Publication date: April 18, 2019
    Applicant: SanDisk Technologies LLC
    Inventors: Federico Nardi, Christopher J. Petti, Gerrit Jan Hemink
  • Publication number: 20190115391
    Abstract: A non-volatile memory uses phase change memory (PCM) cells in a three dimensional vertical cross-point structure, in which multiple layers of word lines run in a horizontal direction and bit lines run in a vertical direction. The memory cells are located in a recessed region of the word lines and are separated from the bit line by an ovonic threshold switch. A surfactant lining of the word line recess in which the phase change memory material is placed improves stability of the resistance state of the memory cells, allowing for improved multi-state operation.
    Type: Application
    Filed: January 12, 2018
    Publication date: April 18, 2019
    Applicant: SanDisk Technologies LLC
    Inventors: Federico Nardi, Christopher J. Petti, Gerrit Jan Hemink
  • Patent number: 10262730
    Abstract: A non-volatile memory uses phase change memory (PCM) cells in a three dimensional vertical cross-point structure, in which multiple layers of word lines run in a horizontal direction and bit lines run in a vertical direction. The memory cells are located in a recessed region of the word lines and are separated from the bit line by an ovonic threshold switch. A surfactant lining of the word line recess in which the phase change memory material is placed improves stability of the resistance state of the memory cells, allowing for improved multi-state operation.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: April 16, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Federico Nardi, Christopher J Petti, Gerrit Jan Hemink
  • Patent number: 10249682
    Abstract: A non-volatile storage apparatus is proposed that includes a plurality of serially connected non-volatile reversible resistance-switching memory cells, a plurality of word lines such that each of the memory cells is connected to a different word line, a bit line connected to a first end of the serially connected memory cells and a switch connected to a second end of the serially connected memory cells. In one embodiment, the memory cells include a reversible resistance-switching structure comprising a first material, a second material and a reversible resistance-switching interface between the first material and the second material, a channel, and means for switching current between current flowing through the channel and current flowing through the reversible resistance-switching interface in order to program and read the reversible resistance-switching interface. A process for manufacturing the memory is also disclosed.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: April 2, 2019
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Luiz M. Franca-Neto, Mac D. Apodaca, Christopher J. Petti
  • Publication number: 20190088315
    Abstract: Technology is described for identifying non-volatile memory cells having data that should be refreshed. The technology could be used to identify which groups of memory cells that store cold data should have a data refresh. In one aspect, a non-volatile storage device has at least one monitor memory cell associated with a group of data memory cells. The non-volatile storage device may use different programming techniques to program the data and monitor memory cells. In one aspect, the programming technique used for the monitor memory cell is less stable with respect to state than the technique used to program the associated data memory cells. The state of the monitor memory cell may change in a predictable manner, such that the state of the monitor cell may be sensed periodically to determine whether the associated data memory cells should be refreshed.
    Type: Application
    Filed: September 20, 2017
    Publication date: March 21, 2019
    Applicant: SanDisk Technologies LLC
    Inventors: Juan Saenz, Christopher J. Petti
  • Publication number: 20190067370
    Abstract: A non-volatile storage apparatus is proposed that includes a plurality of serially connected non-volatile reversible resistance-switching memory cells, a plurality of word lines such that each of the memory cells is connected to a different word line, a bit line connected to a first end of the serially connected memory cells and a switch connected to a second end of the serially connected memory cells. In one embodiment, the memory cells include a reversible resistance-switching structure comprising a first material, a second material and a reversible resistance-switching interface between the first material and the second material, a channel, and means for switching current between current flowing through the channel and current flowing through the reversible resistance-switching interface in order to program and read the reversible resistance-switching interface. A process for manufacturing the memory is also disclosed.
    Type: Application
    Filed: August 23, 2017
    Publication date: February 28, 2019
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Luiz M. Franca-Neto, Mac D. Apodaca, Christopher J. Petti
  • Publication number: 20190067369
    Abstract: A non-volatile storage apparatus is proposed that includes a plurality of serially connected non-volatile reversible resistance-switching memory cells, a plurality of word lines such that each of the memory cells is connected to a different word line, a bit line connected to a first end of the serially connected memory cells and a switch connected to a second end of the serially connected memory cells. In one embodiment, the memory cells include a reversible resistance-switching structure comprising a first material, a second material and a reversible resistance-switching interface between the first material and the second material, a channel, and means for switching current between current flowing through the channel and current flowing through the reversible resistance-switching interface in order to program and read the reversible resistance-switching interface. A process for manufacturing the memory is also disclosed.
    Type: Application
    Filed: August 23, 2017
    Publication date: February 28, 2019
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Luiz M. Franca-Neto, Mac D. Apodaca, Christopher J. Petti
  • Publication number: 20190067374
    Abstract: A non-volatile storage apparatus is proposed that includes a plurality of serially connected non-volatile reversible resistance-switching memory cells, a plurality of word lines such that each of the memory cells is connected to a different word line, a bit line connected to a first end of the serially connected memory cells and a switch connected to a second end of the serially connected memory cells. In one embodiment, the memory cells include a reversible resistance-switching structure comprising a first material, a second material and a reversible resistance-switching interface between the first material and the second material, a channel, and means for switching current between current flowing through the channel and current flowing through the reversible resistance-switching interface in order to program and read the reversible resistance-switching interface. A process for manufacturing the memory is also disclosed.
    Type: Application
    Filed: August 23, 2017
    Publication date: February 28, 2019
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Luiz M. Franca-Neto, Mac D. Apodaca, Christopher J. Petti
  • Patent number: 10217795
    Abstract: A non-volatile storage apparatus is proposed that includes a plurality of serially connected non-volatile reversible resistance-switching memory cells, a plurality of word lines such that each of the memory cells is connected to a different word line, a bit line connected to a first end of the serially connected memory cells and a switch connected to a second end of the serially connected memory cells. In one embodiment, the memory cells include a reversible resistance-switching structure comprising a first material, a second material and a reversible resistance-switching interface between the first material and the second material, a channel, and means for switching current between current flowing through the channel and current flowing through the reversible resistance-switching interface in order to program and read the reversible resistance-switching interface. A process for manufacturing the memory is also disclosed.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: February 26, 2019
    Assignee: SanDisk Technologies LLC
    Inventors: Luiz M. Franca-Neto, Mac D. Apodaca, Christopher J. Petti
  • Publication number: 20180286918
    Abstract: A method is provided that includes forming a bit line above a substrate; forming a word line above the substrate, and forming a non-volatile memory cell between the bit line and the word line. The non-volatile memory cell includes a non-volatile memory material coupled in series with an isolation element. The isolation element includes a first electrode, a second electrode, and a semiconductor layer and a barrier layer disposed between the first electrode and the second electrode.
    Type: Application
    Filed: March 30, 2017
    Publication date: October 4, 2018
    Applicant: SANDISK TECHNOLOGIES LLC
    Inventors: Abhijit Bandyopadhyay, Christopher J. Petti, Natalie Nguyen, Brian Le
  • Patent number: 10038092
    Abstract: A non-volatile memory cell stores 1.5 bits of data in three polarization states. The memory cell may have two ferroelectric layers and three electrodes. The energy bands of the ferroelectric layers are adjusted by providing two of the electrodes with different work functions. The difference in the work functions may be significant, such as at least 0.4-0.6 V or more. Two of the electrodes may have equal or similar work functions. For example, the work functions may be equal within a tolerance of +/?0.1 V. The memory cell can be arranged in various configurations including a FeFET (ferroelectric field effect transistor) and a FeRAM (ferroelectric random access memory). A set of memory cells can be arranged in a string such as a NAND string.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: July 31, 2018
    Assignee: SanDisk Technologies LLC
    Inventors: Yangyin Chen, Christopher J Petti