Abstract: A rate ½, d=1 channel code encodes a Gray code servo track address into channel data recorded on a magnetic disk; a d=1 Viterbi sequence detector detects the recorded servo track address upon read back; a cost effective d=1 decoder decodes the recorded servo track address into its Gray code representation; and a 1/1+D filter decodes the Gray code track address into its binary representation. The channel encoding scheme increases the data density of the storage system due to the d=1 constraint and use of the Viterbi sequence detector. Further, the implementation advantageously uses the Viterbi sequence detector already provided in a read channel for detecting user data, and the cost and complexity of the decoder is reduced by encoding/decoding the Gray code track address in sections of five bits.

Abstract: Using a Berlekamp-Massey process operating with unique recursion rules, a fast correction subsystem performs, for each t-byte codeword having m-bit symbols, a series of error locator iterations, followed by a series of error evaluator iterations, followed by a series of correction iterations to generate and use an error pattern for correcting a codeword. The fast correction subsystem includes three sets of registers and various multipliers distributed over t+1 component slices. In accordance with the recursion rules and multiplier implementations, only three types of registers (120, 130, 140) are required per slice and all operations are preferably performed in m/2 or less clocks. A first set of registers (“&sgr; registers”) ultimately contains quantities which include coefficients of an error locator polynomial for the codeword. A second set of registers (“&tgr; registers”) are utilized, e.g.

Abstract: A sampled amplitude read channel incorporated within a magnetic disk storage system for reading data recorded tracks on a magnetic medium, where the data comprises user data sectors recorded at varying data rates across a plurality of predefined zones and embedded servo data sectors recorded at the same data rate across the zones. The read channel comprises a timing recovery component for synchronous sampling of a read signal from a magnetic read head positioned over the magnetic medium, a gain control component for adjusting the amplitude of the read signal, and a DC offset component for canceling a DC offset in the read signal. These components are dynamically configured to operate according to whether the read channel is processing user data or embedded servo data.

Abstract: A cost-effective high-throughput enumerative encoder is disclosed for encoding m-bit input datawords in an input data stream into n-bit output codewords in an encoded output data stream for use in a communication channel. The enumerative encoder comprises an input buffer for storing a plurality of bits in the input data stream, and a plurality of segmented compare tables for encoding the bits stored in the input buffer into the encoded output data stream, wherein each segmented compare table represents a segment of a full compare table of an enumerative trellis. A cost-effective high-throughput enumerative decoder is also disclosed for decoding n-bit input codewords in a received data stream into m-bit output datawords in a decoded data stream for use in a communication channel.

Abstract: A sampled amplitude read channel is disclosed for reading a data sector recorded on a disk storage medium by detecting an estimated data sequence from a sequence of read signal sample values generated by sampling an analog read signal emanating from a read head positioned over the disk storage medium, the data sector comprising a user data segment and an embedded field comprising a known data segment. A sampling device samples the analog read signal to generate the read signal sample values and a trellis sequence detector detects a preliminary sequence from the read signal sample values. A post processor detects and corrects errors in the preliminary sequence using a syndrome generator responsive to the preliminary sequence representing the user data segment. The syndrome generator generates an error syndrome according to a predetermined error detection code. A boundary error compensator compensates for a boundary error event spanning the user data segment and the known data segment.

Abstract: In a disk storage system for digital computers (e.g., optical or magnetic disk drives) a sampled amplitude read channel is disclosed comprising a convolutional code channel encoder for encoding check bits into channel data recorded to a disk storage medium, a trellis sequence detector for detecting a preliminary sequence from read signal sample values generated during read back, a convolutional code syndrome generator for generating an error syndrome from the preliminary sequence, and a post processor for evaluating the error syndrome to detect and correct errors made by the trellis sequence detector. The post processor remodulates the preliminary sequence output by the trellis sequence detector into a sequence of estimated sample values which are subtracted from the actual read signal sample values to form a sequence of sample errors.

Abstract: A sampled amplitude read channel is disclosed for writing data to and reading data from a disk storage medium. A first channel encoder encodes a first j-k bits of a j-bit data block to generate first encoded data, and an ECC encoder encodes the first encoded data and a remaining k-bits of the data block to generate ECC redundancy symbols comprising a plurality of bits. A second channel encoder encodes the remaining k-bits of the data block and the ECC redundancy symbols to generate second encoded data. The first encoded data and the second encoded data are then output as channel data written to the disk storage medium.

Abstract: A rotating storage medium has an index mark-indicating sequence recorded thereon, the index mark-indicating sequence comprised of bits distributed over plural servo wedges. The index mark-indicating sequence is comprised of at least one bit in each of a specified number of plural servo wedges per track, the specified number forming a subset of the servo wedges of the rotating storage medium. The specified number (subset) of plural servo wedges per track preferably is comprised of the servo wedge which contains the index mark a predetermined number (m−1) of consecutive servo wedges. The subset of plural servo wedges may be positioned to precede and include the servo wedge which physically contains the index mark, or may be offset therefrom. Both the synchronization marks of the plural servo wedges and the index mark-indicating sequence are preferably fault tolerant.

Abstract: An error correction code (ECC) processor which minimizes the probability of miscorrecting an ECC codeword in a multi-dimensional code, such as a product code, thereby avoiding the added latency in recovering from the miscorrection. Initially, the ECC processor sets the error correction power of the code to a minimum value so that the probability of making a miscorrection is low even though the probability of detecting an uncorrectable codeword is high. The ECC processor then performs iterative error correction passes over the multi-dimensional code and incrementally increases the error correction power if no corrections are made during a current pass. Increasing the correction power may render a previously uncorrectable codeword correctable, and after correcting the codeword, it may render a corresponding intersecting codeword in the other dimension correctable.

Abstract: A sampled amplitude read channel is disclosed for disk storage systems (e.g., magnetic or optical) comprising a sampling device for sampling the analog read signal emanating from the read head positioned over a disk storage medium, a channel equalizer for equalizing the signal samples according to a desired partial response, a trellis sequence detector for detecting a preliminary sequence from the equalized signal samples, and a post processor for correcting errors in the preliminary sequence, including errors caused by the channel equalizers correlating the noise in the read signal. The preliminary sequence detected by the sequence detector is remodulated into ideal partial response samples and then subtracted from the actual signal samples to generate a sequence of sample errors. The sample errors are then filtered by a sample error filter, and the filtered sample errors are correlated with error event sequences corresponding to the most likely error events of the trellis sequence detector.

Abstract: A magnetic disk storage device employing an on-the-fly, multiple burst error correction system for detecting and correcting errors in data sectors stored on a magnetic disk, wherein each data sector comprises a data field and multiple sync marks for synchronizing to the data field. Multiple sync marks improve the probability of successful byte synchronization to the data field in the presence of noise in the system, such as defects in the storage medium. Further, a sync mark may be embedded within the data field to facilitate byte resynchronization when synchronization is lost.

Abstract: A sampled amplitude read channel is disclosed for reading data recorded on a disk storage medium by detecting an estimated binary sequence from a sequence of discrete time sample values generated by sampling pulses in an analog read signal from a read head positioned over the disk storage medium. The read channel comprises a sampling device, such as an analog-to-digital converter (A/D), for sampling the analog read signal to generate the discrete time sample values and for sampling at least one other auxillary analog input signal, such as a servo control signal. In this manner, performance characteristics of the read channel can be measured, such as the driving current applied to the servo control voice coil motor (VCM), without requiring additional hardware.

Abstract: A multi-layered error detection and correction (EDAC) system is disclosed for processing an error correction code (ECC) typically employed in optical disk storage devices. A first layer of the EDAC system includes a primary ECC, such as a multiple burst Reed-Solomon code, and a second layer incudes a secondary ECC, such as a CRC code, for use in verifying the validity of the corrections made using the primary ECC. The primary ECC is multi-dimensional and, in the embodiment disclosed herein, it is a two-dimensional P/Q product code typically employed in a CD-ROM storage device. The secondary ECC operates in unison with the primary ECC. As the EDAC system processes and corrects the data using the primary ECC, the EDAC system also simultaneously updates the secondary ECC. In this manner, when the EDAC system is finished processing the data using the primary ECC, the validation syndrome generated by the secondary ECC is available immediately for checking the validity of the corrections.

Abstract: An error correction processor is disclosed for correcting errors in binary data read from a disk storage medium, wherein the binary data comprises a first and second set of intersecting ECC codewords of a multi-dimensional codeword. The error correction processor comprises a data buffer for storing the ECC codewords read from the disk storage medium; a syndrome generator for generating ECC syndromes in response to a codeword in the second set; an error-locator polynomial generator for generating an error locator polynomial .sigma.(x) in response to the ECC syndromes; a selector for selecting between the error-locator polynomial .sigma.(x) and an erasure polynomial .sigma.(x).sub.EP, wherein:(i) the erasure polynomial .sigma.(x).sub.EP is generated while processing the first set codewords; and(ii) the erasure polynomial .sigma.(x).sub.EP is used to correct at least two codewords in the second set; andan error corrector for generating correction values in response to either the error-locator polynomial .sigma.

Abstract: An error correction system (10) is provided for correcting up to two bits per sector stored in a solid state non-volatile memory (12) which emulates a disk drive. The error correction system (10) includes an ECC/remainder generator (100), a bank of remainder registers (102), and a calculation circuit (104), all under supervision of a controller (106). During a write-to-memory operation, error correction system (10) generates ECC bytes for storage in the memory (12). In a write operation, an entire sector acquired from memory (12) is used to generate ECC check remainder bytes REM.sub.0 -REM.sub.3. The check remainder bytes REM.sub.0 -REM.sub.3 are utilized to generates syndromes S.sub.1, S.sub.3 and a factor S.sub.B, the syndromes in turn being used to obtain either one or two error location positions (.alpha..sup.L1, .alpha..sup.L2). The mathematical calculation circuit (104) not only generates the syndromes S.sub.1, S.sub.3 and factor S.sub.B, as well as the error location positions (.alpha..sup.L1, .alpha..

Abstract: A disk storage system is disclosed wherein user data received from a host system is first encoded according to a first channel code having a high code rate, and then encoded according to an ECC code, such as a Reed-Solomon code, wherein the ECC redundancy symbols are encoded according to a second channel code having low error propagation. In the preferred embodiment, the first channel code is a RLL (d,k) code having a long k constraint which allows for longer block lengths (and higher code rates). During read back, a synchronous read channel samples the analog read signal a synchronously and interpolates the asynchronous sample values to generate sample values substantially synchronized to the baud rate. In contrast to conventional synchronous-sampling timing recovery, interpolated timing recovery can tolerate a longer RLL k constraint because it is less sensitive to noise in the read signal and not affected by process variations in fabrication.

Abstract: A servo decoder is disclosed for disc storage systems that operates according to a novel coding scheme capable of accurately decoding detected codewords representing servo track address during seek operations, even when the recording head flies between two adjacent tracks, and capable of correcting errors in the detected codedwords caused by noise in the read signal, such as inter-symbol interference. In a first embodiment, the coding scheme comprises an error correcting code (ECC) capable of correcting a predetermined number of bit errors in the detected codewords. To achieve the equivalent effect of a conventional Gray code, the codewords are arranged such that adjacent track addresses differ by a number of bits equal to the minimum distance of the ECC code. In a second embodiment, the servo code corrects certain minimum distance error events associated with a trellis type sequence detector.

Abstract: In an optical disk storage device capable of reading compact disks (CDs) and digital video disks (DVDs), the latency of an error correction system is significantly reduced by sharing a syndrome buffer between CD and DVD modes of operation. In CD mode, user data read from the disk is stored in the syndrome buffer and corrected using C1/C2 redundancy of a Cross-Interleaved Reed-Solomon Code (CIRC). In DVD mode, user data read from the disk is stored in a data buffer and the syndrome buffer stores: intermediate values for generating the ECC syndromes for use in correcting the user data, and data CRC and error CRC syndromes for use in verifying the validity and completeness of the corrections. Two aspects of the present invention which significantly increase throughput are (1) the ECC syndromes are generated concurrently for the row (Q) and column (P) codewords of the CD and DVD product codes, and (2) the CRC validation syndrome is generated concurrent with correcting the product code.

Abstract: A compact disk (CD) and digital video disk (DVD) error correction system is disclosed which generates a CRC validation syndrome on-the-fly while correcting the CD/DVD product code, thereby reducing the overall access latency as compared to the prior art. For the DVD product code, which comprises multiple data sectors with separate CRC symbols appended to each data sector, a buffer used for C1 and C2 encoding/decoding in CD mode is used to store partial data and error CRC syndromes for each data sector. During the vertical (P) and horizontal (Q) passes over the DVD product code, data and error CRC syndrome registers are loaded with the appropriate partial CRC syndromes depending on the current data symbol being processed by a P/Q decoder. After processing each data sector, the data and error CRC syndromes for each data sector are combined and compared to a constant to determine whether the corrections to the data sector are valid and complete.

Abstract: An efficient error correction processor is disclosed for correcting a multi-dimensional code comprising a first set of codewords that intersect with a second set of codewords. The error correction is carried out by performing iterative passes over the first and second set of codewords. The individual codewords are corrected using error syndromes which are computed as a function of the codeword data. In the preferred embodiment, the individual codewords are encoded according to a Reed-Solomon code and the error syndromes are computed as the modulo division of the codeword polynomial by the factors of a generator polynomial. To increase the throughput of the error correction processor, a syndrome buffer is employed to facilitate generating the error syndromes for both the first and second set codewords concurrently. In this manner, after a pass over the first set of codewords, the error syndromes for the second set codewords are available for immediate processing.