Patents by Inventor Chu-Chung Lee
Chu-Chung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240112989Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a package leadframe including a die pad, a first ridge formed at a first outer edge of the die pad, a second ridge formed at a second outer edge of the die pad opposite of the first outer edge and separate from the first ridge, and a plurality of leads surrounding the die pad. A semiconductor die is attached to the die pad by way of a die attach material. The semiconductor die is located on the die pad between the first ridge and the second ridge. An encapsulant encapsulates the semiconductor die and at least a portion of the package leadframe.Type: ApplicationFiled: December 5, 2022Publication date: April 4, 2024Inventors: Trent Uehling, Wei Gao, Chu-Chung Lee
-
Patent number: 10325876Abstract: The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure.Type: GrantFiled: June 25, 2014Date of Patent: June 18, 2019Assignee: NXP USA, Inc.Inventors: Varughese Mathew, Burton J. Carpenter, Leo M. Higgins, III, Chu-Chung Lee, Tu-Anh N. Tran
-
Patent number: 9461012Abstract: An integrated circuit wire bond connection is provided having an aluminum bond pad (51) that is directly bonded to a copper ball (52) to form an aluminum splash structure (53) and associated crevice opening (55) at a peripheral bond edge of the copper ball (54), where the aluminum splash structure (53) is characterized by a plurality of geometric properties indicative of a reliable copper ball bond, such as lateral splash size, splash shape, relative position of splash-ball crevice to the aluminum pad, crevice width, crevice length, crevice angle, and/or crevice-pad splash index.Type: GrantFiled: December 2, 2014Date of Patent: October 4, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Leo M. Higgins, III, Chu-Chung Lee
-
Patent number: 9437459Abstract: An electronic component package that includes a package substrate having an aluminum bond pad formed from an aluminum clad copper structure. The aluminum clad copper structure is attached to a dielectric layer. An electronic component is attached to the substrate and includes a conductive structure electrically coupled to the aluminum bond pad. The aluminum bond pad, the electronic component, and at least a portion of the substrate are encapsulated with an encapsulant.Type: GrantFiled: May 1, 2014Date of Patent: September 6, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Burton J. Carpenter, Chu-Chung Lee, Tu-Anh N. Tran
-
Patent number: 9437574Abstract: An electronic component package includes a substrate and dielectric structure. The dielectric structure includes a top surface having a protrusion portion and a lower portion. The protrusion portion is located at first height that is greater than a second height of the lower portion. A conductive bond pad is located over the dielectric structure. A ball bond electrically couples the bond pad and a bond wire. An intermetallic compound located between the ball bond and bond pad is formed of material of the ball bond and bond pad and electrically couples the bond pad to the ball bond. A portion of the bond pad is vertically located between a portion of the lower portion of the top surface of the dielectric structure and the intermetallic compound. No portion of the bond pad is vertically located between at least a portion of the protrusion portion and the intermetallic compound.Type: GrantFiled: September 30, 2013Date of Patent: September 6, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Tu-Anh N. Tran, Chu-Chung Lee
-
Patent number: 9368470Abstract: A semiconductor device includes a bond formed on a bond pad. The bond is formed of a wire that includes a central core of conductive metal, a first coating over the central core of conductive metal that is more chemically active than the conductive metal, and a second coating over the central core of conductive metal that is less chemically active than the central core of conductive metal.Type: GrantFiled: October 31, 2014Date of Patent: June 14, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Chu-Chung Lee, Burton J. Carpenter, Tu-Anh N. Tran
-
Publication number: 20160126208Abstract: A semiconductor device includes a bond formed on a bond pad. The bond is formed of a wire that includes a central core of conductive metal, a first coating over the central core of conductive metal that is more chemically active than the conductive metal, and a second coating over the central core of conductive metal that is less chemically active than the central core of conductive metal.Type: ApplicationFiled: October 31, 2014Publication date: May 5, 2016Inventors: CHU-CHUNG LEE, BURTON J. CARPENTER, TU-ANH N. TRAN
-
Patent number: 9331050Abstract: Methods of forming gold-aluminum electrical interconnects are described. The method may include interposing a diffusion retardant layer between the gold and the aluminum, the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material; bringing into contact the diffusion retardant layer, the gold, and the aluminum; forming alloys of gold and the diffusion retardant material in regions containing the material and forming gold-aluminum intermetallic compounds in regions substantially devoid of the material; and forming a continuous electrically conducting path between the aluminum and the gold. A structure for gold-aluminum interconnect is provided. The structure may include an aluminum alloy bond pad and a diffusion retardant layer in contact with the bond pad, the diffusion retardant layer including regions containing and regions substantially devoid of a diffusion retardant material.Type: GrantFiled: January 23, 2012Date of Patent: May 3, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Kevin J. Hess, Chu-Chung Lee
-
Patent number: 9331046Abstract: An integrated circuit package includes a semiconductor die attached to a package support. The die has a plurality of peripheral bond pads along a periphery of the die and a first bond pad on an interior portion of the die wherein the first bond pad is a power supply bond pad. A conductive distributor is over the die and within a perimeter of the die and has a first opening. The plurality of bond pads are located between the perimeter of the die and a perimeter of the conductive distributor. The first bond pad is in the first opening. A first bond wire is connected between the first bond pad and the conductive distributor. A second bond wire is connected between a first peripheral bond pad of the plurality of peripheral bond pads and the conductive distributor.Type: GrantFiled: June 26, 2014Date of Patent: May 3, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Chu-Chung Lee, Kian Leong Chin, Kevin J. Hess, James Patrick Johnston, Tu-Anh N. Tran, Heng Keong Yip
-
Patent number: 9324675Abstract: A semiconductor structure includes a bond pad and a wire bond coupled to the bond pad. The wire bond includes a bond in contact with the bond pad. The wire bond includes a coating on a surface of the wire bond, and a first exposed portion of the wire bond in a selected location. The wire bond is devoid of the coating over the selected location of the wire bond, and an area of the first exposed portion is at least one square micron.Type: GrantFiled: April 25, 2014Date of Patent: April 26, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Burton J. Carpenter, Chu-Chung Lee, Tu-Anh N. Tran
-
Patent number: 9257403Abstract: An integrated circuit copper wire bond connection is provided having a copper ball (32) bonded directly to an aluminum bond pad (31) formed on a low-k dielectric layer (30) to form a bond interface structure for the copper ball characterized by a first plurality of geometric features to provide thermal cycling reliability, including an aluminum minima feature (Z1, Z2) located at an outer peripheral location (42) under the copper ball to prevent formation and/or propagation of cracks in the aluminum bond pad.Type: GrantFiled: November 26, 2013Date of Patent: February 9, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Tu-Anh N. Tran, John G. Arthur, Yin Kheng Au, Chu-Chung Lee, Chin Teck Siong, Meijiang Song, Jia Lin Yap, Matthew J. Zapico
-
Publication number: 20150380376Abstract: The present disclosure provides embodiments of package devices and methods for making package devices for a semiconductor die. One embodiment includes a die mounting structure having a finished bond pad that includes a copper bond pad and a cobalt-containing layer over a top surface of the copper bond pad, and a wire bond structure that is bonded to a top surface of the cobalt-containing layer of the finished bond pad, where cobalt-containing material of the cobalt-containing layer is located between a bottom surface of the wire bond structure and the top surface of the copper bond pad such that the cobalt-containing material is present under a center portion of the wire bond structure.Type: ApplicationFiled: June 25, 2014Publication date: December 31, 2015Inventors: VARUGHESE MATHEW, Burton J. Carpenter, Leo M. Higgins, III, Chu-Chung Lee, Tu-Anh N. Tran
-
Publication number: 20150318240Abstract: An electronic component package that includes a package substrate having an aluminum bond pad formed from an aluminum clad copper structure. The aluminum clad copper structure is attached to a dielectric layer. An electronic component is attached to the substrate and includes a conductive structure electrically coupled to the aluminum bond pad. The aluminum bond pad, the electronic component, and at least a portion of the substrate are encapsulated with an encapsulant.Type: ApplicationFiled: May 1, 2014Publication date: November 5, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: BURTON J. CARPENTER, Chu-Chung Lee, Tu-Anh N. Tran
-
Publication number: 20150311173Abstract: A semiconductor structure includes a bond pad and a wire bond coupled to the bond pad. The wire bond includes a bond in contact with the bond pad. The wire bond includes a coating on a surface of the wire bond, and a first exposed portion of the wire bond in a selected location. The wire bond is devoid of the coating over the selected location of the wire bond, and an area of the first exposed portion is at least one square micron.Type: ApplicationFiled: April 25, 2014Publication date: October 29, 2015Inventors: BURTON J. CARPENTER, CHU-CHUNG LEE, TU-ANH N. TRAN
-
Publication number: 20150303169Abstract: A method for forming a semiconductor device includes forming a first ball bond on a first contact pad, in which the first ball bond has a first wire segment of a bonding wire extending from the ball bond; forming a mid-span ball in the first wire segment at a first distance from the ball bond; and after the forming the mid-span ball, attaching the mid-span ball to a second contact pad to form a second ball bond.Type: ApplicationFiled: April 17, 2014Publication date: October 22, 2015Inventors: Tu-Anh N. Tran, Yin Kheng Au, Burton J. Carpenter, Chu-Chung Lee
-
Patent number: 9093383Abstract: A mold compound is provided for encapsulating a semiconductor device (101). The mold compound comprises at least approximately 70% by weight silica fillers, at least approximately 10% by weight epoxy resin system, and beneficial ions that are beneficial with respect to copper ball bond corrosion. A total level of the beneficial ions in the mold compound is at least approximately 100 ppm.Type: GrantFiled: May 2, 2014Date of Patent: July 28, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Sheila F. Chopin, Varughese Mathew, Leo M. Higgins, III, Chu-Chung Lee
-
Publication number: 20150145148Abstract: An integrated circuit copper wire bond connection is provided having a copper ball (32) bonded directly to an aluminum bond pad (31) formed on a low-k dielectric layer (30) to form a bond interface structure for the copper ball characterized by a first plurality of geometric features to provide thermal cycling reliability, including an aluminum minima feature (Z1, Z2) located at an outer peripheral location (42) under the copper ball to prevent formation and/or propagation of cracks in the aluminum bond pad.Type: ApplicationFiled: November 26, 2013Publication date: May 28, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Tu-Anh N. Tran, John G. Arthur, Yin Kheng Au, Chu-Chung Lee, Chin Teck Siong, Meijiang Song, Jia Lin Yap, Matthew J. Zapico
-
Publication number: 20150090480Abstract: An electronic component package includes a substrate and dielectric structure. The dielectric structure includes a top surface having a protrusion portion and a lower portion. The protrusion portion is located at first height that is greater than a second height of the lower portion. A conductive bond pad is located over the dielectric structure. A ball bond electrically couples the bond pad and a bond wire. An intermetallic compound located between the ball bond and bond pad is formed of material of the ball bond and bond pad and electrically couples the bond pad to the ball bond. A portion of the bond pad is vertically located between a portion of the lower portion of the top surface of the dielectric structure and the intermetallic compound. No portion of the bond pad is vertically located between at least a portion of the protrusion portion and the intermetallic compound.Type: ApplicationFiled: September 30, 2013Publication date: April 2, 2015Inventors: TU-ANH N. TRAN, Chu-Chung Lee
-
Publication number: 20150084199Abstract: An integrated circuit wire bond connection is provided having an aluminum bond pad (51) that is directly bonded to a copper ball (52) to form an aluminum splash structure (53) and associated crevice opening (55) at a peripheral bond edge of the copper ball (54), where the aluminum splash structure (53) is characterized by a plurality of geometric properties indicative of a reliable copper ball bond, such as lateral splash size, splash shape, relative position of splash-ball crevice to the aluminum pad, crevice width, crevice length, crevice angle, and/or crevice-pad splash index.Type: ApplicationFiled: December 2, 2014Publication date: March 26, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Leo M. Higgins, III, Chu-Chung Lee
-
Patent number: 8912667Abstract: A semiconductor device includes an integrated circuit die on a substrate. A first subset of wire bonds is between the substrate and the die. A second subset of wire bonds is between the substrate and the die. A dielectric material coats the first subset of the wire bonds along a majority of length of the first subset of the wire bonds. A medium is in contact with the second subset of the wire bonds along a majority of length of the second subset of the wire bonds.Type: GrantFiled: January 31, 2012Date of Patent: December 16, 2014Assignee: Freescale Semiconductor, Inc.Inventors: Robert J. Wenzel, Kevin J. Hess, Chu-Chung Lee