Abstract: A MOSFET die and a Schottky diode die are mounted on a common lead frame pad and their drain and cathode, respectively, are connected together at the pad. The pad has a plurality of pins extending from one side thereof. The lead frame has insulated pins on its opposite side which are connected to the FET source, the FET gate and the Schottky diode anode respectively by wire bonds. The lead frame and die are molded in an insulated housing and the lead frame pins are bent downwardly to define a surface-mount package.

Abstract: A multichip module has a substrate, which receives several flip chip and for other semiconductor die on one surface and has vias extending through the substrate from the flip chip bottom electrodes to solder ball electrodes on the bottom of the substrate. Passive components are also mounted on the top of the substrate and are connected to further vias which extend to respective ball contacts at the substrate bottom. In one embodiment, the bottom surfaces and electrodes of the die are insulated and their tops (and drain electrodes) are connected by a moldable conductive layer. In another embodiment the top surface of the substrate is covered by an insulation cap, which may be finned for improved thermal properties. The passives are upended to have their longest dimension perpendicular to the substrate surface and are between the fin valleys.

Abstract: An SO-8 type package contains a control MOSFET die mounted on one lead frame section and a synchronous MOSFET and Schottky diode die is mounted on a second lead frame pad section. The die are interconnected through the lead frame pads and wire bonds to define a buck converter circuit and the die and lead frame pads are overmolded with a common insulation housing.

Abstract: A MOSFET die and a Schottky diode die are mounted on a common lead frame pad and their drain and cathode, respectively, are connected together at the pad. The pad has a plurality of pins extending from one side thereof. The lead frame has insulated pins on its opposite side which are connected to the FET source, the FET gate and the Schottky diode anode respectively by wire bonds. The lead frame and die are molded in an insulated housing and the lead frame pins are bent downwardly to define a surface-mount package.

Abstract: A MOSFET die is mounted onto the bottom surface of a lead frame pad of a lead frame which has increased heat conducting capacity. The pad includes a plurality of at least four integral pins extending therefrom. The lead frame also includes isolated pins which are connected to the MOSFET source and drain using wire bonds. The lead frame and MOSFET are molded in a housing. The pins extend outside the molded housing for external connection, and the pins extending from the lead frame pad provide a path for heat removal from the MOSFET by a heat conduction path formed of the MOSFET drain electrode, the lead frame pad, their interconnection material and the pins.

Abstract: An electronic package for an electronic device includes a substrate. A power transistor die has a lower surface and a upper surface, and the lower surface of the power transistor die is mounted on the substrate. A control circuit for controlling the power transistor is mounted to the upper surface of the power transistor die using an insulating epoxy.

Abstract: A MOSFET die and a Schottky diode die are mounted on a common lead frame pad and their drain and cathode, respectively, are connected together at the pad. The pad has a plurality of pins extending from one side thereof. The lead frame has insulated pins on its opposite side which are connected to the FET source, the FET gate and the Schottky diode anode respectively by wire bonds. The lead frame and die are molded in an insulated housing and the lead frame pins are bent downwardly to define a surface-mount package.

Abstract: A semiconductor package includes a bottom leadframe having a bottom plate portion and at least one first terminal extending from the bottom plate portion; at least one second terminal being co-planar with the first terminal; a semiconductor power MOSFET die having a bottom surface defining a drain connection and a top surface on which a first metalized region defining a source and a second metalized region defining a gate are disposed, the bottom surface being coupled to the bottom plate of the leadframe such that the first terminal is electrically connected to the drain; a copper plate coupled to and spanning a substantial part of the first metalized region defining the source connection; and at least one beam portion being sized and shaped to couple the copper plate portion to the at least one second terminal such that it is electrically coupled to the source.

Abstract: A MOSFET die and a Schottky diode die are mounted on a common lead frame pad and their drain and cathode, respectively, are connected together at the pad. The pad has a plurality of pins extending from one side thereof. The lead frame has insulated pins on its opposite side which are connected to the FET source, the FET gate and the Schottky diode anode respectively by wire bonds. The lead frame and die are molded in an insulated housing and the lead frame pins are bent downwardly to define a surface-mount package.