Patents by Inventor Chuan Lee
Chuan Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240103356Abstract: An electronic device is provided. The electronic device includes a base and a conductive layer that is disposed on the base and patterned by a plurality of processes. The plurality of processes include providing a mask substrate. The mask substrate includes a first substrate and a patterned substrate. In the cross-sectional view, the width of the first substrate is greater than or equal to the width of the patterned substrate. The plurality of processes include arranging the mask substrate and the base correspondingly. The plurality of processes also include performing exposure and development processes on the conductive layer for patterning the conductive layer, and removing the mask substrate.Type: ApplicationFiled: December 5, 2023Publication date: March 28, 2024Inventors: Chien-Hsing LEE, Chin-Lung TING, Jung-Chuan WANG, Hong-Sheng HSIEH
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Patent number: 11940727Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.Type: GrantFiled: March 27, 2023Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTDInventors: Chih-Tsung Shih, Tsung-Chih Chien, Tsung Chuan Lee, Hao-Shiang Chang
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Publication number: 20240097301Abstract: The present invention discloses an integrated choke assembly comprising: a base having a main body structure, a first protruding part and a second protruding part. A first choke has a first magnetic core and a first winding, wherein the first protruding part is arranged through the first opening of the first magnetic core so that the first choke is arranged on the upper surface of the main body structure, and the first winding is wound on the first magnetic core. A second choke has a second magnetic core and a second winding, wherein the second protruding part is arranged through the second opening of the second magnetic core so that the second choke is arranged on the lower surface of the main body structure, and the second winding is wound on the second magnetic core.Type: ApplicationFiled: October 16, 2022Publication date: March 21, 2024Inventors: Pang-Chuan CHEN, Chih-Shin HUANG, Shu-Cheng LEE
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Publication number: 20240077543Abstract: A battery pack includes a group of cells, a current path switch coupled to the group of cells, and a current monitoring system. The current monitoring system includes a signal detection unit, a logic unit and a current path control unit. The signal detection unit is coupled to the group of cells and/or a positive terminal of the battery pack, and used to detect at least one voltage signal of the group of cells and/or of the positive terminal of the battery pack. The logic unit is coupled to the signal detection unit, and used to generate a calculated value of a voltage signal of the at least one voltage signal and generate a logic signal according to the calculated value. The current path control unit is coupled to the logic unit and the current path switch, and used to control the current path switch according to the logic signal.Type: ApplicationFiled: April 10, 2023Publication date: March 7, 2024Applicant: RICHTEK TECHNOLOGY CORP.Inventors: Hsu-Kai Hou, Po-Ching Lee, Tseng-Chuan Wu
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Publication number: 20240079439Abstract: A pixel of an image sensor includes: a semiconductor material substrate; a photosensitive region formed in the substrate, the photosensitive region generating photo-induced electrical charge in response to illumination with light; a storage node formed in the substrate proximate to the photosensitive region, the storage node selectively receiving and storing photo-induced electrical charge generated by the photosensitive region; and a shield formed over the storage node which inhibits light from reaching the storage node, the shield including an extension which protrudes into the substrate and surrounds an outer periphery of the storage node.Type: ApplicationFiled: January 4, 2023Publication date: March 7, 2024Inventors: Chung-Yi Lin, Yueh-Chuan Lee, Chia-Chan Chen
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Publication number: 20240076422Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.Type: ApplicationFiled: September 1, 2023Publication date: March 7, 2024Inventors: Jing-Cherng TSAI, Jen-Long WU, Wen-Hao KANG, Kuei-Pin LIN, Jing-Yu LEE, Jun-Ye HONG, Zih-Yu SHIH, Cheng-Hung CHIANG, Gang-Wei SHEN, Yu-Chuan SUNG, Chung-Hua WENG, Hsing-Ya CHEN
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Patent number: 11923433Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.Type: GrantFiled: March 9, 2021Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sheng-Liang Pan, Yungtzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
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Patent number: 11912438Abstract: An unmanned vehicle module can include, in some aspects, a landing platform including a landing area for receiving an unmanned vehicle, wherein the landing area includes a predetermined charging region; a first charging plate; a second charging plate, wherein the first charging plate and the second charging plate are positioned in the predetermined charging region; an electrical energy storage device for connecting electrically with the first charging plate and with the second charging plate; and an unmanned vehicle alignment mechanism configured to move the unmanned vehicle into the predetermined charging region; wherein the unmanned vehicle alignment mechanism includes a first beam, a second beam, a third beam, a fourth beam, and an actuation device for actuating at least two of the first beam, the second beam, the third beam, and the fourth beam to push the unmanned vehicle into the charging region.Type: GrantFiled: January 31, 2019Date of Patent: February 27, 2024Assignee: H3 Dynamics Holdings Pte. Ltd.Inventors: Taras Wankewycz, Matthew Mehmet Crawford, Cher Chuan Lee, Bo Han, Harshavardhan Thakar
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Patent number: 11905964Abstract: A fan frame body structure includes a first frame body. The first frame body has a first upper end, a first lower end, a first frame wall and a first main flow way. The first main flow way passes through the first frame body and is formed with a first main inlet and a first main outlet respectively at the first upper end and the first lower end. A first subsidiary flow way is disposed in the first frame wall. The first subsidiary flow way is in parallel the first main flow way. The first subsidiary outlet is positioned at the first upper end of the first frame body in flush with and in adjacency to the first main inlet.Type: GrantFiled: September 20, 2022Date of Patent: February 20, 2024Assignee: ASIA VITAL COMPONENTS CO., LTD.Inventors: Sung-Wei Sun, Chu-Hsien Chou, Yi-Chih Lin, Pei-Chuan Lee, Wen-Hao Liu
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Publication number: 20240029917Abstract: A method for producing a porous structure electrode with gas permeability and liquid impermeability, includes the following steps: Step 1: mixing a catalytic material having hydrophilicity, a carbon nanotube material, a material with a hydrophilic group, and a carbon black material to form a first slurry, wherein the carbon nanotube material has a specific surface area equal to or greater than the carbon black material; Step 2: mixing the first slurry with an emulsified material to form a second slurry; Step 3: obtaining a film material through a film forming process; Step 4: heating the film material to a first temperature to remove solvent in the film material; Step 5: Repeating steps 3 to 4; and Step 6: heating the film material to a second temperature to remove liquid in the film material, thereby leaving pores in the film material, and allowing the film material to solidify.Type: ApplicationFiled: July 13, 2023Publication date: January 25, 2024Inventors: Chia-Hung LI, Kuang-Che LEE, Chien-Yao HUANG, Chun-Hsien TSAI, Ting-Chuan LEE, Chun-Jung TSAI
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Publication number: 20230406646Abstract: A system and a method for picking and placing objects, includes capturing at least one first image of the object at a first time point and at least one second image at a second time point; identifying the object in the first image and the second image, obtaining first position information, second position information, and object attribute of the object; based on the first position information, the second position information, the first time point, and the second time point, calculating a moving speed of the object; based on the object attribute, determining whether the object is a target object; if so, calculating a target position and a target time point of the target object based on the first and second position information and the moving speed; controlling a target machine arm to move at or to the target position at the target time point to pick the target object.Type: ApplicationFiled: December 29, 2022Publication date: December 21, 2023Inventors: TUNG-CHUN HSIEH, CHUNG-WEI WU, HSIN-KO YU, CHIH-WEI LI, SUNG-CHUAN LEE, TZE-CHIN LO, CHIEN-MING KO
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Publication number: 20230405831Abstract: A system and a method for picking and placing objects, includes capturing at least one first image of at least one object at a first time point and at least one second image at a second time point; identifying the object in the first image and the second image; and obtaining first position information and second position information of the object; based on the first position information, the second position information, the first time point, and the second time point, calculating a moving speed of the object; calculating a target position and a target time point of the object based on the first position information, the second position information, and the moving speed; and controlling the machine arm to move at or to the target position at the target time point to pick the object.Type: ApplicationFiled: December 29, 2022Publication date: December 21, 2023Inventors: TUNG-CHUN HSIEH, CHUNG-WEI WU, CHIH-WEI LI, HSIN-KO YU, SUNG-CHUAN LEE, TZE-CHIN LO, CHIEN-MING KO
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Publication number: 20230367195Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.Type: ApplicationFiled: July 24, 2023Publication date: November 16, 2023Inventors: Chih-Tsung SHIH, Tsung-Chih CHIEN, Shih-Chi FU, Chi-Hua FU, Kuotang CHENG, Bo-Tsun LIU, Tsung Chuan LEE
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Publication number: 20230361137Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a gate structure on a substrate. A doped region is within the substrate. One or more dielectric materials are within a recess formed by one or more surfaces of the substrate. The doped region is laterally between the gate structure and the recess. A doped epitaxial material is within the recess and between the one or more dielectric materials and the doped region. The doped epitaxial material is asymmetric about a vertical line that extends through a lateral center of the doped epitaxial material.Type: ApplicationFiled: June 28, 2023Publication date: November 9, 2023Inventors: Yueh-Chuan Lee, Chia-Chan Chen
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Publication number: 20230362515Abstract: A method is provided for forming a light-shielding layer to block irradiation of light onto a light-sensitive storage region. The light-sensitive storage region is formed in a semiconductor substrate to store electric charges. A storage gate feature is formed over the light-sensitive storage region, and includes a polysilicon gate electrode that is disposed over the light-sensitive storage region. A metal layer is formed over the storage gate feature. A silicidation process is performed to transform a part of the metal layer that is in contact with the polysilicon gate electrode into a silicide light-shielding layer. A thermal process is performed to induce lateral growth of the silicide light-shielding layer to make the silicide light-shielding layer extend to cover a lateral surface of the storage gate feature. A process temperature of the thermal process is higher than that of the silicidation process.Type: ApplicationFiled: May 9, 2022Publication date: November 9, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yueh-Chuan LEE, Chih-Chiang CHANG, Chia-Chan CHEN
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Publication number: 20230346888Abstract: The present application provides a method for treating and/or preventing an infection of Coronavirus comprising: providing a therapeutically effective amount of a composition comprising interferon to a subject via sublingual administration and/or buccal administration; wherein the Coronavirus comprises SARS-CoV-2.Type: ApplicationFiled: April 27, 2023Publication date: November 2, 2023Applicant: AINOS INC. TAIWAN BRANCH (USA)Inventors: Tsung-Fu YU, Chun-Hsien TSAI, Ting-Chuan LEE, Chun-Jung TSAI
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Publication number: 20230327137Abstract: The present invention provides a manufacturing method of an electrode. The method includes steps of: mixing a first catalyst with a first average particle size, a second catalyst with a second average particle size, a first conductive agent, a first adhesive, and a solvent to form a first mixture, wherein a weight ratio of the first catalyst to the second catalyst is 5:1 to 1:5; stirring the first mixture to obtain a second mixture; rolling the second mixture into a catalytic layer; and pressing the catalytic layer with a conductive current collector and a gas diffusion film to obtain the electrode.Type: ApplicationFiled: October 26, 2022Publication date: October 12, 2023Inventors: Kuang-Che Lee, Chia-Hung Li, Chien-Yao Huang, Chiun-Shian Tsai, Ting-Chuan Lee, Chiun- Rung Tsai
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Publication number: 20230324804Abstract: A method of forming an extreme ultraviolet (EUV) mask includes forming a multilayer Mo/Si stack comprising alternating stacked Mo and Si layers over a mask substrate; forming a ruthenium capping layer over the multilayer Mo/Si stack; doping the ruthenium capping layer with a halogen element, a pentavalent element, a hexavalent element or combinations thereof; forming an absorber layer over the ruthenium capping layer; and etching the absorber layer to form a pattern in the absorber layer.Type: ApplicationFiled: June 14, 2023Publication date: October 12, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Tsung SHIH, Yu-Hsun WU, Bo-Tsun LIU, Tsung-Chuan LEE
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Patent number: 11774844Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.Type: GrantFiled: March 14, 2022Date of Patent: October 3, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Tsung Shih, Tsung-Chih Chien, Shih-Chi Fu, Chi-Hua Fu, Kuotang Cheng, Bo-Tsun Liu, Tsung Chuan Lee
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Patent number: D1008833Type: GrantFiled: April 23, 2021Date of Patent: December 26, 2023Assignee: AINOS, INC.Inventors: Chia-Nan Liao, Chia-Pin Huang, Tzu-Ting Weng, Yu-Hsuan Liao, Chun-Hsien Tsai, Ting-Chuan Lee, Chun-Jung Tsai