Abstract: A first clock signal is generated from a reference clock signal. A first frequency associated with the first clock signal is less than a reference clock frequency associated with the reference clock signal. The first clock signal is propagated towards a first component of an integrated circuit through a clock tree. A second clock signal having a second frequency is generated from the first clock signal at a terminal point of the clock tree. The second clock signal is provided to the first component.

Abstract: A capacitor is provided. The capacitor includes a first electrode layer and a second electrode layer; and a first dielectric layer and a second dielectric layer, wherein the first dielectric layer and the second dielectric layer are disposed between the first electrode layer and the second electrode layer. The first dielectric layer includes a first dielectric powder and a first organic resin, and the second dielectric layer includes a second dielectric powder and a second organic resin. In particular, the weight ratio of the first dielectric powder to the first organic resin is greater than the weight ratio of the second dielectric powder to the second organic resin.

Abstract: According to an aspect, a method comprises maintaining, by a cache control unit in a first packet data network, white and black lists of data servers in a second packet data network that are allowed or unable to use a cache server in the first packet data network, respectively; monitoring data traffic to and from data servers in the second packet data network over an interface between the first and second packet data network; comparing the candidate data servers to the data servers in the white and black lists; and in response to a candidate data server being in neither list, performing the following: causing sending a cache request to the candidate data server and in response to receiving an acknowledgement to the cache request within a pre-defined time, adding the candidate data server to the white list, otherwise adding the candidate data server to the black list.

Abstract: The disclosure is directed to an air purifier and an automobile air conditioner with an air purifier. The air purifier includes a reactor, a column, an air guider and a plurality of light emitting elements. The reactor includes an air inlet and an air outlet. The column is disposed in the reactor, and the column has a N-side walls. The air guider is disposed on the column, and the air guider is coated with a photocatalyst. The light emitting elements are placed on the N side walls of the column configured to irradiate on the photocatalyst, where each of the light emitting elements has an emitting angle of ? and ?*N>360°.

Abstract: An adsorbent breather assembly for filtering contaminants such as particulars and vapor phase contaminants, e.g. volatile organic compounds, for use with electronic devices can include a blocking region adjacent to the adsorbent filter layer to improve filtering performance.

Abstract: Various examples pertaining to a sensor housing design for millimeter wave (mmWave) sensors are described. A sensor housing may include a radar sensor, a printed circuit board (PCB), a radome and a PCB holder. The radar sensor may be capable of emitting a radio wave. The PCB may have a first side and a second side opposite the first side with the radar sensor mounted on the first side thereof to form a PCB assembly (PCBA). The radome may include a cavity in which the PCBA is disposed. The PCB holder may be disposed along a circumference of an inner wall of the radome, and the PCB holder may be configured to hold the PCBA such that a distance between an inner surface of the radome and a side of the radar sensor facing the inner surface of the radome is proportional to half wavelength of the radio wave.

Abstract: A device with a noise shaping function in sampling frequency control includes a first adder, an N-bit quantizer, a mapping circuit, a second adder, a first D flip-flop, a scaler, and a second D flip-flop. The first adder generates a first value according to an input signal, a second value, and a third value. The N-bit quantizer outputs a codeword to a controller according to the first value. Frequency adjusting orders corresponding to codewords outputted by the N-bit quantizer are between a smallest predetermined negative value and a largest positive predetermined value, the controller utilizes an adjusting order corresponding to the codeword to make a frequency generator generate adjusted sampling frequency, and N is an integer greater than 2. The first D flip-flop, the scaler, and the second D flip-flop are used for providing a high-pass filter effect to the device.

Abstract: This disclosure relates to a VR glove capable of measuring the movement of individual finger and thumb bones. The VR glove can include a plurality of inertial measurement units (IMUs) to track the movement of one or more finger and/or hand sections. The IMUs can include one or more motion sensors, such as a gyroscope and an accelerometer, for measuring the orientation, position, and velocity of objects (e.g., finger bones) that the IMU can be attached. An IMU can be located proximate to a finger (or thumb) bone and can measure the inertial motion of the corresponding bone. In some examples, the VR glove may include magnetometers to determine the direction of the geo-magnetic field. The VR glove can also include one or more other electronic components, such as a plurality of electrodes for sensing the heading, enabling capacitive touch, and/or contact sensing between finger tips.

Abstract: A first clock signal is generated from a reference clock signal. A first frequency associated with the first clock signal is less than a reference clock frequency associated with the reference clock signal. The first clock signal is propagated towards a first component of an integrated circuit through a clock tree. A second clock signal having a second frequency is generated from the first clock signal at a terminal point of the clock tree. The second clock signal is provided to the first component.

Abstract: According to an aspect, a method comprises maintaining, by a cache control unit in a first packet data network, white and black lists of data servers in a second packet data network that are allowed or unable to use a cache server in the first packet data network, respectively; monitoring data traffic to and from data servers in the second packet data network over an interface between the first and second packet data network; comparing the candidate data servers to the data servers in the white and black lists; and in response to a candidate data server being in neither list, performing the following: causing sending a cache request to the candidate data server and in response to receiving an acknowledgement to the cache request within a pre-defined time, adding the candidate data server to the white list, otherwise adding the candidate data server to the black list.

Abstract: A transistor with low leakage currents includes a substrate, a gate, spacers, pad dielectric layers, a source, and a drain. The gate is formed above a gate dielectric layer, wherein the gate dielectric layer has a first dielectric constant. The spacers have a second dielectric constant. The pad dielectric layers are formed under the spacers and having a third dielectric constant. The source and the drain are adjacent to the spacers and in two opposite directions of the gate. The first dielectric constant, the second dielectric constant, and the third dielectric constant are different from each other.

Abstract: Provided herein are 1-oxo-isoindoline-5-carboxamide compounds having the following structure: wherein R1, R2, R3, R4 and n are as defined herein, compositions comprising an effective amount of a 1-oxo-isoindoline-5-carboxamide compound, and methods for treating or preventing disorders.

Abstract: A VCOM generator circuit generates a VCOM signal for an electronic display. The VCOM circuit includes an operational amplifier having reduced supply rails. In an implementation, the VCOM circuit has at least three supply rails, AVDD, ground or GND, and VP or VN, or both. VP is less than AVDD and greater than VN. VN is higher than ground and below VP. The VCOM circuit with reduced voltage supply rails for VP and VN reduces power consumption of the VCOM op amps. By reducing power consumption, this also reduces the surface temperature of the integrated circuit.

Abstract: A light source apparatus including a light-emitting module and a control unit is provided. The light-emitting module is configured to provide a light. The control unit is configured to make the light switched between a first light and a second light so that at least one of a blue-light hazard and a circadian stimulus value of the light is changed. A wavelength of a blue light main peak in a spectrum of the first light is different from a wavelength of a blue light main peak in a spectrum of the second light.

Abstract: An antenna array module is provided, which includes a circuit layer, an antenna dielectric layer, a metal plate and a chip. The circuit layer includes a signal line, a ground layer and a first dielectric material; the ground layer includes a coupling slot, and the signal line is connected to the chip. The antenna dielectric layer is disposed on the circuit layer and the antenna dielectric layer includes a second dielectric material; the thermal conductivity coefficient of the second dielectric material is lower than the thermal conductivity coefficient of the first dielectric material. The metal plate is disposed on the antenna dielectric layer; the signal line is coupled to the metal plate via the coupling slot.

Abstract: A network device supporting TRILL protocol includes a memory, a processor, and a communication interface. The memory includes a lookup table stored therein. The processor is coupled to the memory. The communication interface is coupled to the processor. The communication interface includes a trunk port and an access port and is configured to receive a first packet. When the processor determines that an output port corresponding to a destination address of the first packet is the trunk port, and determines that there is a lack of nickname information corresponding to the destination address according to the look up table, a second packet is transmitted through the trunk port of the communication interface. The second packet includes an enable local bit. The second packet and the first packet include the same payload information.

Abstract: A transistor structure includes a gate, a spacer, a channel region, a first concave, and a first conductive region. The gate is above a silicon surface. The spacer is above the silicon surface and at least covers a sidewall of the gate. The channel region is under the silicon surface. The first conductive region is at least partially formed in the first concave, wherein a conductive region of a neighborhood transistor structure next to the transistor structure is at least partially formed in the first concave.

Abstract: This invention discloses a DRAM cell includes an asymmetric transistor coupled to a capacitor. The asymmetric transistor includes a drain region extending upward from an isolator region; a gate region extends upward from a gate dielectric or the isolator; a source region of asymmetric transistor extends upward from a first portion of an isolating layer. The upward extending directions of the drain region, the gate region, and the source region are perpendicular or substantially perpendicular to an original silicon surface. Moreover, the capacitor is partially formed in a concave and the isolating layer is positioned in the concave. The capacitor extends upward from a second portion of the isolating layer. The upward extending directions of the upright portion of the capacitor electrode, the third portion of the insulating layer and the counter electrode are perpendicular or substantially perpendicular to the original silicon surface.

Abstract: An optical module includes an electronic assembly and an optical assembly. The electronic assembly includes a circuit board and a chip component. The optical assembly disposed on the electronic assembly includes a bracket and an optical component. The bracket surrounds the chip component and has at least two conductive layers separated from each other. The conductive layers are electrically connected to the electronic assembly. The optical assembly is disposed on the bracket and has at least one light-transmissive conductive layer which is electrically connected to the conductive layers.

Abstract: A liquid crystal photoelectric apparatus includes a first and a second quartz glass substrates, an upper alignment layer disposed between the first and the second quartz glass substrates, a lower alignment layer disposed between the upper alignment layer and the second quartz glass substrate, a liquid crystal material disposed between the upper and the lower alignment layers, a first transparent conductive layer disposed between the upper alignment layer and the first quartz glass substrate and including at least one first main portion and first finger portions extending from the corresponding first main portion and a second transparent conductive layer second transparent conductive layer disposed between the lower alignment layer and the second quartz glass substrate and including a second main portion and second finger portions extending from the second main portion in an extension direction perpendicular to that of the first finger portions. An optical imaging processing system is provided.