Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.

Abstract: An ambient light sensor includes a substrate, a metasurface disposed on the substrate, and an aperture layer disposed on the substrate. The metasurface includes a plurality of nanostructures and a filling layer laterally surrounding the plurality of nanostructures. The aperture layer laterally separates the metasurface into a plurality of sub-meta groups.

Abstract: A lever-operated latch device includes an assembly of a case body, an actuation body mounted on the case body, a linking member and a slide body. The actuation body has a free end and a pivoted end pivotally connected with the case body in cooperation with elastic members. The free end of the actuation body is formed with two protruding arms and an opening section positioned between the protruding arms. An operation section is disposed in the opening section. The linking member has a first end pivotally connected with the free end of the actuation body (or the operation section) and a second end connected with the slide body. When an operator presses the operation section, the actuation body is permitted to move from a closed position to an opened position so as to drive the linking member and the slide body to move.

Abstract: A sample analyzing method and a sample preparing method are provided. The sample analyzing method includes a sample preparing step, a placing step, and an analyzing step. The sample preparing step includes an obtaining step implemented by obtaining an identification information; and a marking and placing step implemented by placing a sample carrying component having a sample disposed thereon into a marking equipment, allowing the marking equipment to utilize the identification information to form an identification structure on the sample carrying component, and placing the sample carrying component into one of the accommodating slots according to the identification information. The placing step is implemented by taking out the sample carrying component from one of the accommodating slots and placing the sample carrying component into an electron microscope equipment. The analyzing step is implemented by utilizing the electron microscope equipment to photograph the sample to generate an analyzation image.

Abstract: A method and apparatus are disclosed. In an example from the perspective of a User Equipment (UE), the UE receives one or more signals indicative of a first Physical Uplink Shared Channel (PUSCH) and a second PUSCH on a first cell and in a Transmission Time Interval (TTI). The UE determines to transmit a first Uplink Control Information (UCI) in the TTI, wherein the first UCI overlaps with the first PUSCH and the second PUSCH in time domain. The UE selects the first PUSCH for multiplexing the first UCI based on whether the UE is configured with joint Hybrid Automatic Repeat Request (HARQ) feedback mode or separate HARQ feedback mode. The UE transmits the first PUSCH and the second PUSCH on the first cell, wherein the first PUSCH transmitted on the first cell includes the first UCI.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.

Abstract: Methods and apparatuses for detecting an object are described herein. The apparatus includes a light receiver configured to receive at least two lights with a first wavelength and a second wavelength. The apparatus also includes a memory configured to store a plurality of adjusting parameters, and a processor configured to compare a first reference light intensity at the first wavelength and a second reference light intensity at the second wavelength without a presence of the object to obtain a condition index, access a corresponding adjusting parameter from the memory according to the condition index for adjusting a threshold, and compare a reflected light intensity reflected from the object with the adjusted threshold to determine a detection information.

Abstract: In various examples, calibration techniques for interior depth sensors and image sensors for in-cabin monitoring systems and applications are provided. An intermediary coordinate system may be generated using calibration targets distributed within an interior space to reference 3D positions of features detected by both depth-perception and optical image sensors. Rotation-translation transforms may be determined to compute a first transform (H1) between the depth-perception sensor's 3D coordinate system and the 3D intermediary coordinate system, and a second transform (H2) between the optical image sensor's 2D coordinate system and the intermediary coordinate system. A third transform (H3) between the depth-perception sensor's 3D coordinate system and the optical image sensor's 2D coordinate system can be computed as a function of H1 and H2. The calibration targets may comprise a structural substrate that includes one or more fiducial point markers and one or more motion targets.

Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.

Abstract: A voltage tracking circuit is provided. The voltage tracking circuit includes first and second P-type transistors and a control circuit. The drain of the first P-type transistor is coupled to a first voltage terminal. The gate and the drain of the second P-type transistor are respectively coupled to the first voltage terminal and a second voltage terminal. The control circuit is coupled to the first and second voltage terminals and generates a control voltage according to the first voltage and the second voltage. The sources of the first and second P-type transistors are coupled to an output terminal of the voltage tracking circuit, and the output voltage is generated at the output terminal. In response to the second voltage being higher than the first voltage, the control circuit generates the control signal to turn off the first P-type transistor.

Abstract: A method executed by a User Equipment (UE) operating in a Frame-Based Equipment (FBE) mode is provided. The method includes the following steps: determining a starting time and a periodicity of a first Fixed Frame Period (FFP) of a cell on an operating channel of an unlicensed band; determining a starting time and a periodicity of a second FFP for initiating an uplink transmission to the cell; performing a Listen-Before-Talk (LBT) procedure on the operating channel of the unlicensed band; and performing the uplink transmission to the cell using a first uplink resource in the second FFP in response to the LBT procedure indicating that the operating channel of the unlicensed band is clear.

Abstract: A contact lens includes a central region, an annular region and a peripheral region. The central region includes a central point of the contact lens. The annular region symmetrically surrounds the central region. The peripheral region symmetrically surrounds the annular region. The peripheral region includes at least one color pattern portion. The annular region includes at least one power of critical point.

Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: A quick-change vice base with improved structure, which comprises: a base body, a quick-change coupler, a moveable block set and a central bolt, wherein, the bottoms of the first moveable block and second moveable block are respectively locked with a moveable block positioning base, one end of the moveable block positioning base has a pushing block; when the lead screw rotates clockwise, the first moveable block and the second moveable block will move toward the quick-change coupler, so that the curved stopping blocks on the first moveable block and the second moveable block will be fitted into the recesses of the quick-change coupler; when the lead screw rotates anticlockwise, the first movable block and the second movable block will move away from the quick-change coupler and drive the moveable block positioning seat to move simultaneously.

Abstract: A device includes: a stack of semiconductor nanostructures; a gate structure wrapping around the semiconductor nanostructures, the gate structure extending in a first direction; a source/drain region abutting the gate structure and the stack in a second direction transverse the first direction; a contact structure on the source/drain region; a backside conductive trace under the stack, the backside conductive trace extending in the second direction; a first through via that extends vertically from the contact structure to a top surface of the backside dielectric layer; and a gate isolation structure that abuts the first through via in the second direction.

Abstract: A semiconductor structure is provided and includes a first gate structure, a second gate structure, and at least one local interconnect that extend continuously across a non-active region from a first active region to a second active region. The semiconductor structure further includes a first separation spacer disposed on the first gate structure and first vias on the first gate structure. The first vias are arranged on opposite sides of the first separation spacer are isolated from each other and apart from the first separation spacer by different distances.

Abstract: A radar signal processing system with a self-interference cancelling function includes an analog front end (AFE) processor, an analog to digital converter (ADC), an adaptive interference canceller (AIC), and a digital to analog converter (DAC). The AFE processor receives an original input signal and generates an analog input signal. The ADC converts the analog input signal to a digital input signal. The AIC generates a digital interference signal digital interference signal by performing an adaptive interference cancellation process according to the digital input signal. The DAC converts the digital interference signal to an analog interference signal. Finally, the analog interference signal is fed back to the AFE and cancelled from the original input signal in the AFE processor while performing the front end process, reducing the interference of the static interference from the leaking of a close-by transmitter during the front end process.