Patents by Inventor Chun-Chen Chen

Chun-Chen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210013585
    Abstract: A semiconductor device package includes a substrate and an antenna module. The substrate has a first surface and a second surface opposite to the first surface. The antenna module is disposed on the first surface of the substrate with a gap. The antenna module has a support and an antenna layer. The support has a first surface facing away from the substrate and a second surface facing the substrate. The antenna layer is disposed on the first surface of the support. The antenna layer has a first antenna pattern and a first dielectric layer.
    Type: Application
    Filed: July 9, 2019
    Publication date: January 14, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin Ho, Chih-Cheng Lee, Chun Chen Chen, Yuanhao Yu
  • Patent number: 10891805
    Abstract: A 3D model construction device includes a camera and a wearable display coupled to the camera. The camera obtains multiple first frames, a second frame and depth information. The wearable display includes a display unit, a processing unit, a storage unit and a projection unit. The storage unit stores a first module and a second module. When the first module is performed by the processing unit, the processing unit calculates a first pose of the wearable display. When the second module is performed by the processing unit, the processing unit calculates a 3D model according to the first frames, the depth information, the first pose and calibration parameters, and updates the 3D model according to the second frame. The projection unit projects the 3D model and the second frame onto the display unit according to the first pose for being displayed with a real image on the display unit.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: January 12, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chun-Tse Hsiao, Chuan-Chi Wang, Chia-Chen Chen
  • Publication number: 20210001640
    Abstract: A manufacturing method of a thermal head structure capable of improving printing resolution includes the following steps. A heat storing layer, a first electrode pattern, a heat generating resistor layer, a second electrode pattern and an insulating protective layer are formed to be overlapped on a substrate, and the step of forming the heat generating resistor layer is between the step of forming the first electrode pattern and the step of forming the second electrode pattern chronologically.
    Type: Application
    Filed: June 1, 2020
    Publication date: January 7, 2021
    Inventors: Ming-Jia LI, Yi-Wei LIN, Chun-Chen CHEN
  • Patent number: 10886208
    Abstract: A semiconductor device package includes a carrier, an electronic component, a connection element and an encapsulant. The electronic component is disposed on a surface of the carrier. The connection element is disposed on the surface and adjacent to an edge of the carrier. The encapsulant is disposed on the surface of the carrier. A portion of the connection element is exposed from an upper surface and an edge of the encapsulant.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: January 5, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Cheng-Lin Ho, Chih-Cheng Lee, Chun Chen Chen, Chen Yuang Chen
  • Patent number: 10868538
    Abstract: A logic cell structure includes: a first portion, with a first height, arranged to be a first layout of a first semiconductor element; a second portion, with the first height, arranged to be a second layout of a second semiconductor element, wherein the first portion is separated from the second portion; and a third portion arranged to be a third layout of an interconnecting path used for coupling the first semiconductor element and the second semiconductor element.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shao-Huan Wang, Chun-Chen Chen, Sheng-Hsiung Chen, Kuo-Nan Yang
  • Publication number: 20200353759
    Abstract: A method of manufacturing a thermal print head structure includes the following steps. A glaze layer, a heating resistor layer, an electrode layer and a photoresist layer are sequentially coated on a substrate, in which the photoresist layer has an arc ridge portion in accordance with the formation of the glaze layer. The arc ridge portion of the photoresist layer is partially removed such that a sunken portion is formed on the arc ridge portion. The photoresist layer is fully thinned to remove a bottom of the sunken portion, so that a local position of the electrode layer is revealed. The local position of the electrode layer is etched so that the heating resistor layer is partially revealed outwardly. The photoresist layer is removed from the electrode layer. A protective layer is formed on the electrode layer, the heating resistor layer, and the substrate.
    Type: Application
    Filed: August 15, 2019
    Publication date: November 12, 2020
    Inventors: Ming-Jia LI, Yi-Wei LIN, Chun-Chen CHEN
  • Patent number: 10752014
    Abstract: A thermal print head structure includes a fixed electrode layer, a movable electrode layer opposite to the fixed electrode layer, a protection layer group covering the fixed electrode layer and the movable electrode layer, a heat source used to heat the fixed electrode layer, and a number of spacers. The fixed electrode layer includes a fixed electrode line. The movable electrode layer includes a flexible electrode line which is intersected with the fixed electrode line. These spacers are located between the fixed electrode layer and the protection layer group such that gaps are defined between the fixed electrode layer and the protection layer group. When a potential difference is generated between the fixed electrode line and the flexible electrode line, the movable electrode layer contacts the fixed electrode layer through the gap.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: August 25, 2020
    Assignee: Chien Hwa Coating Technology, Inc.
    Inventors: Ming-Jia Li, Chih-Hui Liu, Yi-Wei Lin, Chun-Chen Chen
  • Patent number: 10752119
    Abstract: An intelligent power distributing system for charging station includes at least one charging module; an intelligent switching unit coupled to the at least one charging module; at least two charging guns coupled to the intelligent switching unit; and at least two system controlling and monitoring units coupled to the at least two charging guns respectively, each of the at least two system controlling and monitoring units being coupled to the at least one charging module, one of the at least two system controlling and monitoring units transmitting instructions to the intelligent switching unit according to the power outputting states of the at least two charging guns, such that the intelligent switching unit dynamically distributes the charging power of the at least one charging module to one or more of the at least two charging guns.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: August 25, 2020
    Assignee: PHIHONG TECHNOLOGY CO., LTD
    Inventors: Chun-Chen Chen, Jian-Hsieng Lee, YingChieh Yeh, Hsiao-Tung Ku
  • Publication number: 20200193275
    Abstract: A DNN hardware accelerator and an operation method of the DNN hardware accelerator are provided. The DNN hardware accelerator includes: a network distributor for receiving an input data and distributing respective bandwidth of a plurality of data types of a target data amount based on a plurality of bandwidth ratios of the target data amount; and a processing element array coupled to the network distributor, for communicating data of the data types of the target data amount between the network distributor based on the distributed bandwidth of the data types.
    Type: Application
    Filed: January 15, 2019
    Publication date: June 18, 2020
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yao-Hua CHEN, Chun-Chen CHEN, Chih-Tsun HUANG, Jing-Jia LIOU, Chun-Hung LAI, Juin-Ming LU
  • Publication number: 20200180327
    Abstract: The present invention relates to a method for manufacturing a thermal print head. Dispose a silicon substrate on a carrier, and dispose sequentially a glaze layer, a thermal resistance layer, an electrode pattern layer, and a passivation layer on the silicon substrate for forming a thermal print head. In addition, the size of the silicon substrate disposed on the carrier can be changed according to the opening on the carrier for providing a large-size thermal print head or one-time large-size printing.
    Type: Application
    Filed: January 10, 2019
    Publication date: June 11, 2020
    Inventors: CHIH-HUI LIU, YI-WEI LIN, CHUN-CHEN CHEN
  • Patent number: 10675888
    Abstract: The present invention relates to a method for manufacturing a thermal print head. Dispose a silicon substrate on a carrier, and dispose sequentially a glaze layer, a thermal resistance layer, an electrode pattern layer, and a passivation layer on the silicon substrate for forming a thermal print head. In addition, the size of the silicon substrate disposed on the carrier can be changed according to the opening on the carrier for providing a large-size thermal print head or one-time large-size printing.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: June 9, 2020
    Assignee: Chien Hwa Coating Technology, Inc.
    Inventors: Chih-Hui Liu, Yi-Wei Lin, Chun-Chen Chen
  • Patent number: 10635771
    Abstract: A method for parasitic-aware capacitor sizing and layout generation is proposed, which is executed by a computer, the method comprising using the computer to perform the following: creating a capacitor sizing and parasitic matching sequence to represent a unit capacitor size, routing topology and routing patterns of a plural of nets in a capacitor network. Next, a shielding assignment is performed to create a number of shielding portions of each net in the plural of nets. Then, a fitness evaluation of configurations of the capacitor sizing and parasitic matching sequence is performed. A shielding net routing is performed to compensate unmatched parasitic capacitance of the configurations of the capacitor sizing and parasitic matching sequence.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: April 28, 2020
    Assignee: AnaGlobe Technology, Inc.
    Inventors: Po-Hung Lin, Vincent Weihao Hsiao, Chun-Yu Lin, Nai-Chen Chen, Yu-Tsang Hsieh
  • Publication number: 20200118912
    Abstract: A semiconductor device package includes a carrier, an electronic component, a connection element and an encapsulant. The electronic component is disposed on a surface of the carrier. The connection element is disposed on the surface and adjacent to an edge of the carrier. The encapsulant is disposed on the surface of the carrier. A portion of the connection element is exposed from an upper surface and an edge of the encapsulant.
    Type: Application
    Filed: January 31, 2019
    Publication date: April 16, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Lin HO, Chih-Cheng LEE, Chun Chen CHEN, Chen Yuang CHEN
  • Patent number: 10526369
    Abstract: The present invention provides a cell penetrating peptide dimer by oxidative modification, in which each monomer is connected with each other by the disulfide linkage. The drugability of the peptide dimer has been improved through enhancing stability, reducing proteolysis, retaining permeability and increasing heparan sulfate binding specificity. The modified peptide products can be used to deliver drug molecules as a suitable drug carrier for targeted therapy.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: January 7, 2020
    Inventors: Yu-Min Lin, Wei-Chen Chen, Win-Chin Chiang, Ting Lian Chang, Chun-Hung Kuo
  • Publication number: 20190333286
    Abstract: A 3D model construction device includes a camera and a wearable display coupled to the camera. The camera obtains multiple first frames, a second frame and depth information. The wearable display includes a display unit, a processing unit, a storage unit and a projection unit. The storage unit stores a first module and a second module. When the first module is performed by the processing unit, the processing unit calculates a first pose of the wearable display. When the second module is performed by the processing unit, the processing unit calculates a 3D model according to the first frames, the depth information, the first pose and calibration parameters, and updates the 3D model according to the second frame. The projection unit projects the 3D model and the second frame onto the display unit according to the first pose for being displayed with a real image on the display unit.
    Type: Application
    Filed: April 25, 2019
    Publication date: October 31, 2019
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chun-Tse HSIAO, Chuan-Chi WANG, Chia-Chen CHEN
  • Publication number: 20190299942
    Abstract: The present disclosure relates to methods and associated systems for operating a battery exchange station. The present technology (1) receives battery information from a memory attached to each of a plurality of exchangeable batteries positioned in the battery exchange station; (2) receives a battery demand prediction associated with the battery exchange station; and (3) identifying one or more uninterruptible-power-supply (UPS) batteries from the plurality of exchangeable batteries at least partially based in part on the battery demand prediction and individual state of charges (SoCs) of the plurality of exchangeable batteries.
    Type: Application
    Filed: March 14, 2019
    Publication date: October 3, 2019
    Inventors: I-Fen Shih, Yun-Chun Lai, Chien-Chung Chen, Chun-Chen Chen, Yu-Lin Wu
  • Publication number: 20190263097
    Abstract: The present invention provides a method of manufacturing a graphene composite film. The method includes the following steps: dispersing graphene in a polyester polymer or a cross-linked polymer to form a mixture; preparing a composite layer including a layer having the mixture and a layer having polyester; and stretching the composite layer biaxially to form the graphene composite film. A graphene composite film is disclosed as well.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 29, 2019
    Inventors: Chun-Chen CHEN, Chien-Hua HUANG
  • Publication number: 20190267492
    Abstract: A semiconductor device includes an oxide semiconductor layer, disposed over a substrate. A source electrode of a metal nitride is disposed on the oxide semiconductor layer. A drain electrode of the metal nitride is disposed on the oxide semiconductor layer. A metal-nitride oxidation layer is formed on a surface of the source electrode and the drain electrode. A ratio of a thickness of the metal-nitride oxidation layer to a thickness of the drain electrode or the source electrode is equal to or less than 0.2.
    Type: Application
    Filed: May 15, 2019
    Publication date: August 29, 2019
    Applicant: United Microelectronics Corp.
    Inventors: Yen-Chen Chen, Xiao Wu, Hai Tao Liu, Ming Hua Du, Shouguo Zhang, Yao-Hung Liu, Chin-Fu Lin, Chun-Yuan Wu
  • Patent number: 10340391
    Abstract: A semiconductor device includes an oxide semiconductor layer, disposed over a substrate. A source electrode of a metal nitride is disposed on the oxide semiconductor layer. A drain electrode of the metal nitride is disposed on the oxide semiconductor layer. A metal-nitride oxidation layer is formed on a surface of the source electrode and the drain electrode. A ratio of a thickness of the metal-nitride oxidation layer to a thickness of the drain electrode or the source electrode is equal to or less than 0.2.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: July 2, 2019
    Assignee: United Microelectronics Corp.
    Inventors: Yen-Chen Chen, Xiao Wu, Hai Tao Liu, Ming Hua Du, Shouguo Zhang, Yao-Hung Liu, Chin-Fu Lin, Chun-Yuan Wu
  • Patent number: 10328812
    Abstract: A power supply system with automatic switchover voltage for vehicle control unit is proposed. The system comprises a supply communication module configured to communicate with a vehicle control unit, the supply communication module comprising a power supply module to provide power for a vehicle control unit; and a communication device coupled to the supply communication module for showing power supply status; wherein the supply communication module provides a first direct voltage and communicates with the vehicle control unit before supplying power, and if the supply communication module does not receive any message from the vehicle control unit within a first time interval, the supply communication module automatically switches to a second direct voltage from the first direct voltage or automatically increases the first direct voltage within a second time interval, and supplies power to the vehicle control unit; and wherein the second direct voltage is greater than the first direct voltage.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: June 25, 2019
    Assignee: Phihong Technology Co., Ltd.
    Inventors: Chun-Chen Chen, Jian-Hsieng Lee, Ying-Chieh Yeh, Hsiao-Tung Ku