Abstract: A method of controlling phase shift pulse width modulation of a power converter, the method includes a step of obtaining sampling signals of an output voltage and current of the power converter. Then, a digital signal processor is used to calculate an output power of the power converter. Next, a comparator is used to compare the output power of the power converter with a reference power. When the output power is less than the reference power, the modulation control of the switch of the power converter enters into hard-switching mode, and when the output power is greater than the reference power, the modulation control of the switch of the power converter enters into soft-switching mode.

Abstract: A detection circuit for control pilot abnormality of a DC charging pile, which is electrically connected to a control pilot signal generating circuit and a control circuit, providing instant protection for the DC charging pile while control pilot (CP) abnormality been detected. The detection circuit includes a control pilot (CP) signal potential discrimination module, a charging-discharging module electrically connected to the CP signal potential discrimination module, and a controller protection triggering module electrically connected to the charging-discharging module, wherein the CP signal potential discrimination module justifies the voltage level of the input CP signals been input, activates the charging-discharging module to charge the CP signals to a steady-state voltage higher than a predetermined voltage level within a certain time period, and activates the controller protection trigger module to provide instant protection for the DC charging pile.

Abstract: An IC device includes cells at cell locations, each cell including a device layer including gates spaced in a first direction according to a gate pitch, first metal lines in a first overlying metal layer, second metal lines in a second overlying metal layer and spaced in the first direction according to a metal line pitch, and a pin including a first metal line coupled to the device layer and a second metal line. A metal line/gate pitch ratio is less than 1, first and second cells correspond to a same IC component and have a same width between lateral edges, the first cell includes the first pin metal line a first distance from a first lateral edge, and the second cell includes the second pin metal line a second distance from the first lateral edge that differs from the first distance by a fraction of the metal line pitch.

Abstract: A logic cell structure includes a first portion, a second portion and a third portion. The first portion, arranged to be a first layout of a first semiconductor element, is placed in a first cell row of a substrate area extending in a first direction. The second portion, arranged to be a second layout of a second semiconductor element, is placed in a second cell row of the substrate area. The third portion is arranged to be a third layout of an interconnecting path used for coupling the first semiconductor element and the second semiconductor element. The first, second and third portions are bounded by a bounding box with a height in a second direction and a width in the first direction. Respective centers of the first portion and the second portion are arranged in a third direction different from each of the first direction and the second direction.

Abstract: An integrated circuit layout is provided. The integrated circuit layout includes one or more first cell rows partially extending across a space arranged for an integrated circuit layout along a first direction. Each of the one or more first cell rows has a first height along a second direction perpendicular to the first direction. The integrated circuit layout includes one or more third cell rows partially extending across the space along the first direction. Each of the one or more third cell rows has a second height along the second direction, the second height different from the first height.

Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.

Abstract: An integrated circuit layout is provided. The integrated circuit layout includes one or more first cell rows partially extending across a space arranged for an integrated circuit layout along a first direction. Each of the one or more first cell rows has a first height along a second direction perpendicular to the first direction. The integrated circuit layout includes one or more third cell rows partially extending across the space along the first direction. Each of the one or more third cell rows has a second height along the second direction, the second height different from the first height.

Abstract: An LLC resonant converter with variable turns ratio includes a switching circuit coupled to a DC input voltage for converting the DC voltage into switching signal, a resonant tank coupled to the switching circuit and configured to receive the switching signal to provide a primary current, a transformer circuit coupled to the resonant tank. The transformer circuit includes a plurality of separated transformers, each has a primary side winding and a side secondary side winding, where individual transformer has different turns of primary side winding, which can be dynamically selected to couple with the primary side winding of other transformers in series or in parallel to form a dynamically changing equivalent primary side winding, so that the turns ratio in the transformer circuit can be dynamically changed accordingly.

Abstract: An LLC resonant converter with variable resonant tank includes a switching circuit for converting a DC voltage into switching signal, a variable resonant tank coupled to the switching circuit for receiving the switching signal to provide a primary current, a transformer circuit having a primary and a secondary side winding, and a rectifying/filtering circuit to rectifying and filtering a secondary current. The variable resonant tank is coupled between the switching circuit and the transformer circuit, which includes a variable resonant inductor, a magnetizing inductance and a resonant capacitor coupled in series for dynamically adjusting the gain curve of the LLC resonant converter according to the demand of the output current.

Abstract: An integrated circuit includes a cell that is between a substrate and a supply conductive line and that includes a source region, a contact conductive line, a power conductive line, and a power via. The contact conductive line extends from the source region. The power conductive line is coupled to the contact conductive line. The power via interconnects the supply conductive line and the power conductive line.

Abstract: The present disclosure describes an example method for routing a standard cell with multiple pins. The method can include modifying a dimension of a pin of the standard cell, where the pin is spaced at an increased distance from a boundary of the standard cell than an original position of the pin. The method also includes routing an interconnect from the pin to a via placed on a pin track located between the pin and the boundary and inserting a keep out area between the interconnect and a pin from an adjacent standard cell. The method further includes verifying that the keep out area separates the interconnect from the pin from the adjacent standard cell by at least a predetermined distance.

Abstract: An LLC resonant converter includes a switching circuit for converting a DC voltage into switching signal, a resonant tank coupled to the switching circuit to receive the switching signal and to provide a primary current, a transformer circuit coupled to the resonant tank. The transformer circuit includes a plurality of separated transformers, each has a primary side and a secondary side windings disposed on the PCB, where the primary side winding of each transformer can be selected to couple in series or in parallel with the primary side winding of other transformers to form a dynamically varied equivalent primary side winding, maintaining the turns ratio to fine-tune the resonant tank. The gain curve of the LLC converter can be adjusted by electrically coupling an external excitation inductor, a resonant capacitor or a resonant inductor to the resonant tank, according to the demand of output current.

Abstract: An integrated circuit includes a cell that is between a substrate and a supply conductive line and that includes a source region, a contact conductive line, a power conductive line, and a power via. The contact conductive line extends from the source region. The power conductive line is coupled to the contact conductive line. The power via interconnects the supply conductive line and the power conductive line.

Abstract: The present disclosure describes an example method for routing a standard cell with multiple pins. The method can include modifying a dimension of a pin of the standard cell, where the pin is spaced at an increased distance from a boundary of the standard cell than an original position of the pin. The method also includes routing an interconnect from the pin to a via placed on a pin track located between the pin and the boundary and inserting a keep out area between the interconnect and a pin from an adjacent standard cell. The method further includes verifying that the keep out area separates the interconnect from the pin from the adjacent standard cell by at least a predetermined distance.

Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.

Abstract: A method of controlling phase shift pulse width modulation of a power converter, the method includes a step of obtaining sampling signals of an output voltage and current of the power converter. Then, a digital signal processor is used to calculate an output power of the power converter. Next, a comparator is used to compare the output power of the power converter with a reference power. When the output power is less than the reference power, the modulation control of the switch of the power converter enters into hard-switching mode, and when the output power is greater than the reference power, the modulation control of the switch of the power converter enters into soft-switching mode.

Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.

Abstract: A logic cell structure includes a first portion, a second portion and a third portion. The first portion, arranged to be a first layout of a first semiconductor element, is placed in a first cell row of a substrate area extending in a first direction. The second portion, arranged to be a second layout of a second semiconductor element, is placed in a second cell row of the substrate area. The third portion is arranged to be a third layout of an interconnecting path used for coupling the first semiconductor element and the second semiconductor element. The first, second and third portions are bounded by a bounding box with a height in a second direction and a width in the first direction. Respective centers of the first portion and the second portion are arranged in a third direction different from each of the first direction and the second direction.

Abstract: An LLC resonant converter includes a switching circuit for converting a DC voltage into switching signal, a resonant tank coupled to the switching circuit to receive the switching signal and to provide a primary current, a transformer circuit coupled to the resonant tank. The transformer circuit includes a plurality of separated transformers, each has a primary side and a secondary side windings disposed on the PCB, where the primary side winding of each transformer can be selected to couple in series or in parallel with the primary side winding of other transformers to form a dynamically varied equivalent primary side winding, maintaining the turns ratio to fine-tune the resonant tank. The gain curve of the LLC converter can be adjusted by electrically coupling an external excitation inductor, a resonant capacitor or a resonant inductor to the resonant tank, according to the demand of output current.

Abstract: An LLC resonant converter with variable resonant tank includes a switching circuit for converting a DC voltage into switching signal, a variable resonant tank coupled to the switching circuit for receiving the switching signal to provide a primary current, a transformer circuit having a primary and a secondary side winding, and a rectifying/filtering circuit to rectifying and filtering a secondary current. The variable resonant tank is coupled between the switching circuit and the transformer circuit, which includes a variable resonant inductor, a magnetizing inductance and a resonant capacitor coupled in series for dynamically adjusting the gain curve of the LLC resonant converter according to the demand of the output current.