Abstract: In a cavity down BGA packaging structure, a circuit substrate is bonded onto a heat spreader. A cavity formed is formed in the circuit substrate into which a chip is bonded onto the heat spreader. The circuit substrate has at least an insulating layer, a patterned wiring layer, and a via electrically connected to the heat spreader. A first ground pad, ball pad, and first contact pad are defined on the patterned wiring layer, wherein the first ground pad is spaced apart from and electrically connected to the via. The chip comprises at least a second contact pad and a second ground pad respectively connected to the first contact pad and the heat spreader. An encapsulant material encapsulates the cavity, the chip, and the first and second contact pads. A plurality of solder balls are attached to the first ground pad and ball pad.

Abstract: A semiconductor package includes a substrate panel, a chip, an upper package encapsulant, and a lower package encapsulant. The chip is mounted to the substrate panel and below a hole in the substrate panel. A number of wires interconnect the leads on the chip with the leads on the substrate panel. The upper package encapsulant is formed on the upper side of the substrate panel by filling molten liquid plastic material into an upper mold placed on the upper side of the substrate panel. The lower package encapsulant is formed on the underside of the substrate panel by filling molten liquid plastic material into a lower mold placed on the underside of the substrate panel.

Abstract: A laser method for forming vias comprises: providing a heat sink; locally oxidizing a surface of the heat sink into a copper oxide film; bonding a substrate onto the heat sink at the copper oxide layer locations, wherein the substrate comprises at least a patterned trace layer and an insulating layer to which is bonded the heat sink, the insulating layer comprising a plurality of through holes that expose the portions of the copper oxide film; removing the copper oxide exposed through the through holes by laser beam; disposing a plurality of solder balls respectively in the through holes; and reflowing the solder balls to form a plurality of vias.

Abstract: A method for fabricating the wafer level chip scale package (WLCSP) is developed. This method mainly comprises the steps of: disposing a wafer on the top surface of a retractable film, the wafer having a plurality of chips and a plurality of cutting lines therebetween, each chip having a plurality of bonding pads; cutting the wafer into individual chips along the cutting lines; stretching the retractable film so as to separate the cut chips from one another with a predetermined distance; molding the cut wafer in order to encapsulate the bonding pads and sides of each chip completely; grinding the encapsulated chip to expose the bonding pads out of the molding compound; and sawing the encapsulated chips into individual semiconductor package unit.

Abstract: In a wire-bonding process, a chip is provided with at least a first contact pad. A chip carrier is further provided with at least a second contact pad. A plurality of stacked conductive bumps are formed on the first contact pad. A conductive wire is formed by a reverse bonding process. The conductive wire electrically connects the second contact pad of the chip carrier to the stacked conductive bumps over the first contact pad of the chip.

Abstract: A method of manufacturing a leadless semiconductor chip package comprises the steps of: attaching a semiconductor die onto a die pad of a lead frame, wherein the lead frame comprises a plurality of leads arranged about the periphery of the die pad and each lead has a notch formed at the to-be-punched position thereof; wire bonding the inner ends of the leads to bonding pads on the semiconductor die; sucking a film against a lower part of a molding die; closing and clamping the molding die in a manner that the semiconductor die is positioned in a cavity of the molding die and the lead frame is disposed against the film; transferring a hardenable molding compound into the cavity; hardening the molding compound; opening the molding die to take out the molded product; and punching the molded product along the notches of the leads thereby making the singulation process more convenient and correct.

Abstract: A semiconductor package includes a substrate panel, a chip, an upper package encapsulant, and a lower package encapsulant. The chip is mounted to the substrate panel and below a hole in the substrate panel. A number of wires interconnect the leads on the chip with the leads on the substrate panel. The upper package encapsulant is formed on the upper side of the substrate panel by filling molten liquid plastic material into an upper mold placed on the upper side of the substrate panel. The lower package encapsulant is formed on the underside of the substrate panel by filling molten liquid plastic material into a lower mold placed on the underside of the substrate panel.

Abstract: A method of making a semiconductor chip package utilizes a film carrier to support a semiconductor chip. The method comprises the steps of: forming a plurality of through-holes in a film carrier; laminating a metal layer on the film carrier; etching the metal layer to form a die pad and a plurality of connection pads disposed corresponding to the through-holes; forming a metal coating on the surfaces of the die pad and the connection pads which are not covered by the film carrier; attaching a semiconductor chip to the die pad; electrically coupling the semiconductor chip to the connection pads; forming a package body over the film carrier and the semiconductor chip; and removing the film carrier.

Abstract: A method for fabricating the wafer level chip scale package (WLCSP) is developed. This method mainly comprises the steps of: disposing a wafer on the top surface of a retractable film, the wafer having a plurality of chips and a plurality of cutting lines therebetween, each chip having a plurality of bonding pads; cutting the wafer into individual chips along the cutting lines; stretching the retractable film so as to separate the cut chips from one another with a predetermined distance; molding the cut wafer in order to encapsulate the bonding pads and sides of each chip completely; grinding the encapsulated chip to expose the bonding pads out of the molding compound; and sawing the encapsulated chips into individual semiconductor package unit.

Abstract: A method of making a semiconductor chip package is characterized in that it utilizes a flexible film carrier (instead of conventional lead frame or substrate) to support a semiconductor chip during the assembly process. The method comprises the steps of: forming a plurality of through-holes in a flexible film carrier; laminating a metal layer on the lower surface of the flexible film carrier; etching the metal layer to form a plurality of connection pads corresponding to the through-holes; forming a metal coating on the surfaces of the connection pads which are not covered by the flexible film carrier; attaching a semiconductor chip to the upper surface of the flexible film carrier; electrically coupling bonding pads on the semiconductor chip to the connection pads; forming a package body over the upper surface of the flexible film carrier and the semiconductor chip.

Abstract: A substrate structure mainly comprises a plurality of substrate units and a plurality of dispensing holes thereon. A main hole is provided on the surface of the substrate unit, the two ends of which are adjacent to the dispensing hole for dispensing liquified encapsulant material to form a semiconductor package. The semiconductor package mainly comprises a chip, a substrate and an encapsulant. The chip is adhesively attached to the substrate, and the encapsulant covers around the are along one side of the chip. Then the encapsulant flows from the upper surface of the substrate to the lower surface to cover wire areas by means of the liquified encapsulant material flowing through the dispensing hole from the upper surface of the substrate to the lower surface.

Abstract: A BGA package includes a substrate, a chip, and a heat spreader. The spreader covers the chip, a bottom part of the spreader is mounted on an upper surface of the substrate by an adhesive. The spreader shields Electro Magnetic Interference to the chip. In addition, the substrate is made of a built-up PCB.

Abstract: A stacked structure of a semiconductor package mainly comprises a first chip, a second chip, a substrate and a lead frame. The first chip and the second chip are attached on the surface of the substrate by a plurality of solder bumps by means of flipchip bonding. Then, the first chip, the second chip and the substrate form a stacked structure. A plurality of plugs of the substrate is provided along an edge of the substrate so as to attach to a plurality of receptacles of the lead frame to form a semiconductor device. The plugs are attached to the receptacles of the lead frame by silver paste to form a semiconductor device in such a way that the first chip and the second chip electrically connect to the lead frame. In addition, the lead frame is bent to form a plurality of fingers, which is placed in a space that is formed by a sidewall of the chip and a surface of the substrate while it is assembled.