Patents by Inventor Chun-I Tsai

Chun-I Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190164824
    Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, a barrier layer is formed along a sidewall. A portion of the barrier layer along the sidewall is etched back. After etching back the portion of the barrier layer, an upper portion of the barrier layer along the sidewall is smoothed. A conductive material is formed along the barrier layer and over the smoothed upper portion of the barrier layer.
    Type: Application
    Filed: November 29, 2018
    Publication date: May 30, 2019
    Inventors: Yu Shih Wang, Chun-I Tsai, Shian Wei Mao, Ken-Yu Chang, Ming-Hsing Tsai, Wei-Jung Lin
  • Patent number: 10283359
    Abstract: Systems and methods are provided for contact formation. A semiconductor structure is provided. The semiconductor structure includes an opening formed by a bottom surface and one or more side surfaces. A first conductive material is formed on the bottom surface and the one or more side surfaces to partially fill the opening, the first conductive material including a top portion and a bottom portion. Ion implantation is formed on the first conductive material, the top portion of the first conductive material being associated with a first ion density, the bottom portion of the first conductive material being associated with a second ion density lower than the first ion density. At least part of the top portion of the first conductive material is removed. A second conductive material is formed to fill the opening.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: May 7, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chi-Yuan Chen, Li-Ting Wang, Teng-Chun Tsai, Chun-I Tsai, Wei-Jung Lin, Huang-Yi Huang, Cheng-Tung Lin, Hong-Mao Lee
  • Patent number: 9978583
    Abstract: Methods of forming conductive structures and the conductive structures are disclosed. A method includes forming an opening in a dielectric layer over a substrate, performing a cleaning process on the dielectric layer with the opening, forming a nucleation layer in the opening, etching the nucleation layer in the opening, and forming a conductive material in the opening and on the nucleation layer after the etching. An upper portion of the opening is distal from the substrate, and a lower portion of the opening is proximate the substrate. After the etching, a thickness of an upper portion of the nucleation layer in the upper portion of the opening is less than a thickness of a lower portion of the nucleation layer in the lower portion of the opening.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: May 22, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-I Tsai, Chi-Yuan Chen, Wei-Jung Lin, Chia-Han Lai
  • Publication number: 20170221710
    Abstract: Systems and methods are provided for contact formation. A semiconductor structure is provided. The semiconductor structure includes an opening formed by a bottom surface and one or more side surfaces. A first conductive material is formed on the bottom surface and the one or more side surfaces to partially fill the opening, the first conductive material including a top portion and a bottom portion. Ion implantation is formed on the first conductive material, the top portion of the first conductive material being associated with a first ion density, the bottom portion of the first conductive material being associated with a second ion density lower than the first ion density. At least part of the top portion of the first conductive material is removed. A second conductive material is formed to fill the opening.
    Type: Application
    Filed: April 17, 2017
    Publication date: August 3, 2017
    Inventors: Chi-Yuan Chen, Li-Ting Wang, Teng-Chun Tsai, Chun-I Tsai, Wei-Jung Lin, Huang-Yi Huang, Cheng-Tung Lin, Hong-Mao Lee
  • Publication number: 20170213720
    Abstract: Methods of forming conductive structures and the conductive structures are disclosed. A method includes forming an opening in a dielectric layer over a substrate, performing a cleaning process on the dielectric layer with the opening, forming a nucleation layer in the opening, etching the nucleation layer in the opening, and forming a conductive material in the opening and on the nucleation layer after the etching. An upper portion of the opening is distal from the substrate, and a lower portion of the opening is proximate the substrate. After the etching, a thickness of an upper portion of the nucleation layer in the upper portion of the opening is less than a thickness of a lower portion of the nucleation layer in the lower portion of the opening.
    Type: Application
    Filed: April 6, 2017
    Publication date: July 27, 2017
    Inventors: Chun-I Tsai, Chi-Yuan Chen, Wei-Jung Lin, Chia-Han Lai
  • Patent number: 9624576
    Abstract: Systems and methods are provided for contact formation. A semiconductor structure is provided. The semiconductor structure includes an opening formed by a bottom surface and one or more side surfaces. A first conductive material is formed on the bottom surface and the one or more side surfaces to partially fill the opening, the first conductive material including a top portion and a bottom portion. Ion implantation is formed on the first conductive material, the top portion of the first conductive material being associated with a first ion density, the bottom portion of the first conductive material being associated with a second ion density lower than the first ion density. At least part of the top portion of the first conductive material is removed. A second conductive material is formed to fill the opening.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: April 18, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chi-Yuan Chen, Li-Ting Wang, Teng-Chun Tsai, Chun-I Tsai, Wei-Jung Lin, Huang-Yi Huang, Cheng-Tung Lin, Hong-Mao Lee
  • Patent number: 9627313
    Abstract: Methods of forming conductive structures and the conductive structures are disclosed. A method includes forming an opening in a dielectric layer over a substrate, performing a cleaning process on the dielectric layer with the opening, forming a nucleation layer in the opening, etching the nucleation layer in the opening, and forming a conductive material in the opening and on the nucleation layer after the etching. An upper portion of the opening is distal from the substrate, and a lower portion of the opening is proximate the substrate. After the etching, a thickness of an upper portion of the nucleation layer in the upper portion of the opening is less than a thickness of a lower portion of the nucleation layer in the lower portion of the opening.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: April 18, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-I Tsai, Chi-Yuan Chen, Wei-Jung Lin, Chia-Han Lai
  • Publication number: 20160155703
    Abstract: Methods of forming conductive structures and the conductive structures are disclosed. A method includes forming an opening in a dielectric layer over a substrate, performing a cleaning process on the dielectric layer with the opening, forming a nucleation layer in the opening, etching the nucleation layer in the opening, and forming a conductive material in the opening and on the nucleation layer after the etching. An upper portion of the opening is distal from the substrate, and a lower portion of the opening is proximate the substrate. After the etching, a thickness of an upper portion of the nucleation layer in the upper portion of the opening is less than a thickness of a lower portion of the nucleation layer in the lower portion of the opening.
    Type: Application
    Filed: January 25, 2016
    Publication date: June 2, 2016
    Inventors: Chun-I Tsai, Chi-Yuan Chen, Wei-Jung Lin, Chia-Han Lai
  • Patent number: 9245797
    Abstract: Methods of forming conductive structures and the conductive structures are disclosed. A method includes forming an opening in a dielectric layer over a substrate, performing a cleaning process on the dielectric layer with the opening, forming a nucleation layer in the opening, etching the nucleation layer in the opening, and forming a conductive material in the opening and on the nucleation layer after the etching. An upper portion of the opening is distal from the substrate, and a lower portion of the opening is proximate the substrate. After the etching, a thickness of an upper portion of the nucleation layer in the upper portion of the opening is less than a thickness of a lower portion of the nucleation layer in the lower portion of the opening.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: January 26, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-I Tsai, Chi-Yuan Chen, Wei-Jung Lin, Chia-Han Lai
  • Patent number: 9219009
    Abstract: A method of fabricating an integrated circuit (IC) is disclosed. The method includes providing a substrate having a conductive feature. A dielectric layer is formed over the substrate, having an opening to expose the conductive feature. A tungsten (W) capping layer is formed over the conductive feature in the opening without using fluorine-containing gases. A bulk W layer is formed over the W capping layer.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: December 22, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Han Lai, Chun-I Tsai, Wei-Jung Lin
  • Publication number: 20150179512
    Abstract: A method of fabricating an integrated circuit (IC) is disclosed. The method includes providing a substrate having a conductive feature. A dielectric layer is formed over the substrate, having an opening to expose the conductive feature. A tungsten (W) capping layer is formed over the conductive feature in the opening without using fluorine-containing gases. A bulk W layer is formed over the W capping layer.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Han LAI, Chun-I TSAI, Wei-Jung LIN
  • Publication number: 20150170964
    Abstract: Systems and methods are provided for contact formation. A semiconductor structure is provided. The semiconductor structure includes an opening formed by a bottom surface and one or more side surfaces. A first conductive material is formed on the bottom surface and the one or more side surfaces to partially fill the opening, the first conductive material including a top portion and a bottom portion. Ion implantation is formed on the first conductive material, the top portion of the first conductive material being associated with a first ion density, the bottom portion of the first conductive material being associated with a second ion density lower than the first ion density. At least part of the top portion of the first conductive material is removed. A second conductive material is formed to fill the opening.
    Type: Application
    Filed: December 17, 2013
    Publication date: June 18, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: CHI-YUAN CHEN, LI-TING WANG, TENG-CHUN TSAI, CHUN-I TSAI, WEI-JUNG LIN, HUANG-YI HUANG, CHENG-TUNG LIN, HONG-MAO LEE
  • Publication number: 20150048511
    Abstract: Methods of forming conductive structures and the conductive structures are disclosed. A method includes forming an opening in a dielectric layer over a substrate, performing a cleaning process on the dielectric layer with the opening, forming a nucleation layer in the opening, etching the nucleation layer in the opening, and forming a conductive material in the opening and on the nucleation layer after the etching. An upper portion of the opening is distal from the substrate, and a lower portion of the opening is proximate the substrate. After the etching, a thickness of an upper portion of the nucleation layer in the upper portion of the opening is less than a thickness of a lower portion of the nucleation layer in the lower portion of the opening.
    Type: Application
    Filed: August 19, 2013
    Publication date: February 19, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-I Tsai, Chi-Yuan Chen, Wei-Jung Lin, Chia-Han Lai
  • Publication number: 20140279186
    Abstract: Wearable objects purchased by a user are added to a digital wardrobe associated with the user. The user can create and store various outfits from the contents of the digital wardrobe. A recommender system also accesses the digital wardrobe and provides recommendations of wearable items personalized to the user's tastes.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventors: Wen-Hsiang Juan, Chun-I Tsai, San-Ching Yu