Patents by Inventor Chun-Jen Chen

Chun-Jen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10499501
    Abstract: A cover window is provided and includes a substrate and a coating layer. The substrate has a thickness of 60 to 120 ?m. The substrate has a Re of 6000 to 12000. The coating layer is coated on the substrate. The cover window has a first direction and a second direction. The first direction is a machine direction of the cover window. The second direction is perpendicular to the first direction. A tensile stress of 50 to 130 MPa is exerted in the first direction. A tensile stress of 140 to 300 MPa is exerted in the second direction. Since the substrate has a Re of 6000 to 12000, a penetrating ray of an incident ray is uniformly distributed on a visible region of the cover window, so as to reduce the phase difference between reflected rays, reduce rainbow patterns, and enhance visibility under a polarizer.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: December 3, 2019
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chun-Jen Chen, Nan-Tsun Kuo, Chia-Ming Hsieh, Tzu-Hsiang Lin
  • Patent number: 10446447
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; forming a liner on the fin-shaped structure; and removing the liner and part of the fin-shaped structure so that a sidewall of the fin-shaped structure comprises a curve. Moreover, the method includes forming an epitaxial layer around the sidewall of the fin-shaped structure while a top surface of the fin-shaped structure is exposed.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: October 15, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, I-Cheng Hu, Chun-Jen Chen, Tien-I Wu, Yu-Shu Lin, Chun-Yuan Wu
  • Patent number: 10429965
    Abstract: The disclosure provides a flexible polarizer, including a polarizing layer, a first protective layer, and a second protective layer. The polarizing layer has a first surface and a second surface opposite to each other. The first protective layer is disposed on the first surface and comprises polyvinylidene difluoride (PVDF) or a kind of high phase retardation plastics. The second protective layer is disposed on the second surface and comprises PVDF or a kind of the high phase retardation plastics. The first protective layer, the second protective layer, and the polarizing layer are configured to be bent along a bend line.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: October 1, 2019
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Chun-Jen Chen, Tzu-Hsiang Lin
  • Publication number: 20190295913
    Abstract: A package includes a die, a plurality of first conductive structures, a plurality of second conductive structures, an encapsulant, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The first conductive structures and the second conductive structures surround the die. The first conductive structures include cylindrical columns and the second conductive structures include elliptical columns or conical frustums. The encapsulant encapsulates the die, the first conductive structures, and the second conductive structures. The redistribution structure is over the active surface of the die and the encapsulant. The redistribution structure is electrically connected to the die, the first conductive structures, and the second conductive structures.
    Type: Application
    Filed: March 20, 2018
    Publication date: September 26, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Sheng-Huan Chiu, Chun-Jen Chen, Chen-Shien Chen, Kuo-Chio Liu, Kuo-Hui Chang, Chung-Yi Lin, Hsi-Kuei Cheng, Yi-Jen Lai
  • Patent number: 10366991
    Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure, a cladding layer, and a gate structure. The semiconductor substrate includes fin shaped structures. The isolation structure is disposed between the fin shaped structures. Each of the fin shaped structures includes a first portion disposed above a top surface of the isolation structure and a second portion disposed on the first portion. A width of the second portion is smaller than a width of the first portion. The cladding layer is disposed on the first portion and the second portion of each of the fin shaped structures. The cladding layer includes a curved surface. The gate structure is disposed straddling the fin shaped structures.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: July 30, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hsu Ting, Yu-Ying Lin, Yen-Hsing Chen, Chun-Jen Chen, Chun-Wei Yu, Keng-Jen Lin, Yu-Ren Wang
  • Publication number: 20190221562
    Abstract: A semiconductor device includes a semiconductor substrate, an isolation structure, a cladding layer, and a gate structure. The semiconductor substrate includes fin shaped structures. The isolation structure is disposed between the fin shaped structures. Each of the fin shaped structures includes a first portion disposed above a top surface of the isolation structure and a second portion disposed on the first portion. A width of the second portion is smaller than a width of the first portion. The cladding layer is disposed on the first portion and the second portion of each of the fin shaped structures. The cladding layer includes a curved surface. The gate structure is disposed straddling the fin shaped structures.
    Type: Application
    Filed: January 25, 2018
    Publication date: July 18, 2019
    Inventors: Hsu Ting, Yu-Ying Lin, Yen-Hsing Chen, Chun-Jen Chen, Chun-Wei Yu, Keng-Jen Lin, Yu-Ren Wang
  • Publication number: 20190214306
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure; forming a mask layer on the first fin-shaped structure; and performing a first anneal process so that the first fin-shaped structure and the second fin-shaped structure comprise different radius of curvature.
    Type: Application
    Filed: February 1, 2018
    Publication date: July 11, 2019
    Inventors: Chun-Jen Chen, Tien-I Wu, Yu-Shu Lin
  • Publication number: 20190131264
    Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.
    Type: Application
    Filed: December 13, 2018
    Publication date: May 2, 2019
    Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
  • Publication number: 20190064412
    Abstract: The disclosure provides a flexible polarizer, including a polarizing layer, a first protective layer, and a second protective layer. The polarizing layer has a first surface and a second surface opposite to each other. The first protective layer is disposed on the first surface and comprises polyvinylidene difluoride (PVDF) or a kind of high phase retardation plastics. The second protective layer is disposed on the second surface and comprises PVDF or a kind of the high phase retardation plastics. The first protective layer, the second protective layer, and the polarizing layer are configured to be bent along a bend line.
    Type: Application
    Filed: October 2, 2017
    Publication date: February 28, 2019
    Inventors: Chun-Jen CHEN, Tzu-Hsiang LIN
  • Publication number: 20190019772
    Abstract: Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a metal pad over a first substrate and forming a resist layer having an opening over the metal layer. The method for forming a semiconductor structure further includes forming a conductive pillar and a solder layer over the conductive pillar in the opening of the resist layer and removing the resist layer. The method for forming a semiconductor structure further includes removing a portion of the conductive pillar so that the conductive pillar has an angled sidewall.
    Type: Application
    Filed: September 7, 2018
    Publication date: January 17, 2019
    Inventors: Li-Guo LEE, Yung-Sheng LIU, Yi-Chen LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG
  • Patent number: 10163843
    Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
  • Publication number: 20180323302
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a shallow trench isolation (STI) around the fin-shaped structure; forming a liner on the fin-shaped structure; and removing the liner and part of the fin-shaped structure so that a sidewall of the fin-shaped structure comprises a curve. Moreover, the method includes forming an epitaxial layer around the sidewall of the fin-shaped structure while a top surface of the fin-shaped structure is exposed.
    Type: Application
    Filed: July 16, 2018
    Publication date: November 8, 2018
    Inventors: Yi-Fan Li, I-Cheng Hu, Chun-Jen Chen, Tien-I Wu, Yu-Shu Lin, Chun-Yuan Wu
  • Patent number: 10090267
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate and a metal pad formed over the first substrate. The semiconductor structure further includes a modified conductive pillar having a top portion and a bottom portion formed over the metal pad and a solder layer formed over the modified conductive pillar. In addition, the top portion of the modified conductive pillar has a first sidewall in a first direction and a bottom portion of the modified conductive pillar has a second sidewall in a second direction different from the first direction.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: October 2, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
  • Patent number: 10056490
    Abstract: A semiconductor device includes: a fin-shaped structure on a substrate, in which a sidewall of the fin-shaped structure comprises a curve. Specifically, the fin-shaped structure includes a top portion and a bottom portion, a shallow trench isolation (STI) around the bottom portion of the fin-shaped structure, and the curve includes a planar portion extending from the top surface of fin-shaped structure downward and a curved portion extending from the bottom surface of the fin-shaped structure upward.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: August 21, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, I-Cheng Hu, Chun-Jen Chen, Tien-I Wu, Yu-Shu Lin, Chun-Yuan Wu
  • Publication number: 20180166361
    Abstract: A method of preparing a semiconductor substrate with metal bumps on both sides of the substrate includes depositing a first-side UBM layer on a first surface of the substrate, and forming a plurality of first-side metal bumps on the first surface of the substrate after the first-side UBM layer is deposited. The method includes forming a second-side UBM layer on a second side of the substrate, and the first surface and the second surface are opposite of each other. The method includes forming a plurality of second-side metal bumps on the second surface of the substrate after the second-side UBM layer is deposited. The method includes removing exposed first-side UBM layer and exposed second-side UBM layer after the plurality of first-side metal bumps and the plurality of second-side metal bumps are formed. The method includes reflowing the plurality of first-side metal bumps and the plurality of second side metal bumps.
    Type: Application
    Filed: February 6, 2018
    Publication date: June 14, 2018
    Inventors: You-Hua CHOU, Yi-Jen LAI, Chun-Jen CHEN, Perre KAO
  • Patent number: 9997482
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first substrate and a metal pad formed over the first substrate. The semiconductor structure further includes a solder stud formed over the metal pad, and the solder stud has a flat top surface parallel to a top surface of the first substrate.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: June 12, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Li-Guo Lee, Yi-Chen Liu, Yung-Sheng Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
  • Publication number: 20180143740
    Abstract: A cover window is provided and includes a substrate and a coating layer. The substrate has a thickness of 60 to 120 ?m. The substrate has a Re of 6000 to 12000. The coating layer is coated on the substrate. The cover window has a first direction and a second direction. The first direction is a machine direction of the cover window. The second direction is perpendicular to the first direction. A tensile stress of 50 to 130 MPa is exerted in the first direction. A tensile stress of 140 to 300 MPa is exerted in the second direction. Since the substrate has a Re of 6000 to 12000, a penetrating ray of an incident ray is uniformly distributed on a visible region of the cover window, so as to reduce the phase difference between reflected rays, reduce rainbow patterns, and enhance visibility under a polarizer.
    Type: Application
    Filed: May 18, 2017
    Publication date: May 24, 2018
    Inventors: Chun-Jen CHEN, Nan-Tsun Kuo, Chia-Ming Hsieh, Tzu-Hsiang Lin
  • Publication number: 20180068967
    Abstract: A semiconductor device structure and a manufacturing method are provided. The semiconductor device structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device structure also includes a conductive trace over the dielectric layer. The semiconductor device structure further includes a conductive feature over the conductive trace, and a width of the conductive feature is substantially equal to or larger than a maximum width of the conductive trace. In addition, the semiconductor device structure includes a conductive bump over the conductive feature.
    Type: Application
    Filed: October 27, 2017
    Publication date: March 8, 2018
    Inventors: Li-Guo Lee, Yung-Sheng Liu, Yi-Chen Liu, Yi-Jen Lai, Chun-Jen Chen, Hsi-Kuei Cheng
  • Patent number: 9899296
    Abstract: A method of preparing a semiconductor substrate with metal bumps on both sides of the substrate includes depositing a first-side UBM layer on a first surface of the substrate, and forming a plurality of first-side metal bumps on the first surface of the substrate after the first-side UBM layer is deposited. The method includes forming a second-side UBM layer on a second side of the substrate, and the first surface and the second surface are opposite of each other. The method includes forming a plurality of second-side metal bumps on the second surface of the substrate after the second-side UBM layer is deposited. The method includes removing exposed first-side UBM layer and exposed second-side UBM layer after the plurality of first-side metal bumps and the plurality of second-side metal bumps are formed. The method includes reflowing the plurality of first-side metal bumps and the plurality of second side metal bumps.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: February 20, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: You-Hua Chou, Yi-Jen Lai, Chun-Jen Chen, Perre Kao
  • Publication number: 20180033756
    Abstract: Methods for forming semiconductor structures are provided. The method for forming a semiconductor structure includes forming a metal pad over a first substrate and forming a polymer layer over the metal pad. The method for forming a semiconductor structure further includes forming a seed layer over the metal pad and extending over the polymer layer and forming a conductive pillar over the seed layer. The method for forming a semiconductor structure further includes wet etching the seed layer using an etchant comprising H2O2. In addition, the step of wet etching the seed layer is configured to form an extending portion having a slope sidewall.
    Type: Application
    Filed: October 5, 2017
    Publication date: February 1, 2018
    Inventors: Li-Guo LEE, Yi-Chen LIU, Yung-Sheng LIU, Yi-Jen LAI, Chun-Jen CHEN, Hsi-Kuei CHENG