Patents by Inventor Chun-Jen Huang

Chun-Jen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200368910
    Abstract: A collaborative-robot control system is provided in the invention. The collaborative-robot control system includes a plurality of test machines, a plurality of collaborative robots, a first control system and a second control system. The plurality of test machines are configured in a plurality of paths. When the second control system assigns a first collaborative robot of the plurality of collaborative robots in a waiting area to a first test machine in a first path of the plurality of paths and the first collaborative robot is being blocked by a second collaborative robot of the plurality of collaborative robots in the first path, the second control system generates a push-forward command and transmits the push-forward command to the first control system. The first control system sends the push-forward command to the second collaborative robot to order the second collaborative robot to leave the first path first.
    Type: Application
    Filed: May 20, 2020
    Publication date: November 26, 2020
    Applicant: Winbond Electronics Corp.
    Inventors: Te-Wei CHU, Chen-Meng CHENG, Chun-Ming HUANG, Kuang-Tai CHEN, Yu-Jen CHANG, Tsung-Hsien WU
  • Publication number: 20200365710
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a spacer around the gate structure; forming a first contact etch stop layer (CESL) around the spacer; forming a mask layer on the first CESL; removing part of the mask layer; removing part of the first CESL; forming a second CESL on the mask layer and the gate structure; and removing part of the second CESL.
    Type: Application
    Filed: August 5, 2020
    Publication date: November 19, 2020
    Inventors: Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang, Chun-Jen Huang
  • Patent number: 10832060
    Abstract: A resident activity recognition method is provided. The method comprises: receiving a plurality of first testing data from a plurality of sensors by a processor, wherein the first testing data includes a present weight set of sensors and present trigger statuses of sensors; determining an activity of a non-target resident at a present time by the processor according to a non-target resident model and the first testing data; reducing a part of the present weight set to generate an updated weight set and a second testing data including the updated weight set and the present trigger statuses by the processor according to the activity of the non-target resident at the present time, the first testing data and the non-target resident model; determining an activity of a target resident at the present time by the processor according to a target resident model and the second testing data.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: November 10, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jin-Shyan Lee, Chun-Hsien Wu, Jui-Wen Chen, Jui-Hsing Huang, Mao-Jen Chung
  • Patent number: 10777657
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a spacer around the gate structure; forming a first contact etch stop layer (CESL) around the spacer; forming a mask layer on the first CESL; removing part of the mask layer; removing part of the first CESL; forming a second CESL on the mask layer and the gate structure; and removing part of the second CESL.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: September 15, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Te-Chang Hsu, Chun-Chia Chen, Yao-Jhan Wang, Chun-Jen Huang
  • Publication number: 20200279917
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A semiconductor substrate with gate structures formed thereon is provided. A source/drain region is formed in the semiconductor substrate and formed between the gate structures. A dielectric layer is formed on the source/drain region and located between the gate structures. An opening penetrating the dielectric layer on the source/drain region is formed. A lower portion of a first conductive structure is formed in the opening. A dielectric spacer is formed on the lower portion and on an inner wall of the opening. An upper portion of the first conductive structure is formed in the opening and on the lower portion. The dielectric spacer surrounds the upper portion of the first conductive structure. The first conductive structure is formed by two steps for forming the dielectric spacer surrounding the upper portion and improving the electrical performance of the semiconductor device.
    Type: Application
    Filed: May 19, 2020
    Publication date: September 3, 2020
    Inventors: Te-Chang Hsu, Che-Hsien Lin, Cheng-Yeh Huang, Chun-Jen Huang, Yu-Chih Su, Yao-Jhan Wang
  • Publication number: 20200243664
    Abstract: A semiconductor device and a method for fabricating the semiconductor device are provided, in which the method includes the steps of forming a gate structure on a substrate, forming a spacer on a sidewall of the gate structure, forming two recesses adjacent to two sides of the spacer, performing a cleaning process to trim the spacer for forming a void between the spacer and the substrate, and forming two portions of an epitaxial layer in the two recesses. The semiconductor device preferably includes a cap layer on the two portions of the epitaxial layer as the cap layer includes a planar top surface and an inclined sidewall.
    Type: Application
    Filed: March 6, 2019
    Publication date: July 30, 2020
    Inventors: Wei-Chih Chuang, Chia-Jong Liu, Kuang-Hsiu Chen, Chung-Ting Huang, Chi-Hsuan Tang, Kai-Hsiang Wang, Bing-Yang Jiang, Yu-Lin Cheng, Chun-Jen Chen, Yu-Shu Lin, Jhong-Yi Huang, Chao-Nan Chen, Guan-Ying Wu
  • Patent number: 10728419
    Abstract: A system and a method using matrix barcode information to perform point-to-point information exchange are provided. An electronic device is connected to a document-processing device by way of wired connection and instantly exchange information with a mobile device held by a user. The electronic device and the mobile device are wirelessly connected through matrix barcode information. The electronic device provides a file transfer zone for storing information to be transmitted. When the user transmits a remote command to the electronic device through the mobile device, the electronic device directly drives the document-processing device according to the remote command for the document-processing device to perform a corresponding automated document-processing action, such as scanning or printing. Given the instant information exchange scheme established based on the matrix barcode information, the document-processing efficiency can be enhanced.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: July 28, 2020
    Assignee: AVISION INC.
    Inventors: Chun-Cheih Liao, Hung-Jen Lin, Chun-Ping Huang
  • Patent number: 10714944
    Abstract: A charging circuit includes a power conversion circuit, an inductor, and at least one conversion capacitor. The power conversion circuit includes a conversion switch circuit and a conversion control circuit. The conversion switch circuit includes an upper switch, a lower switch, and at least one auxiliary switch. In a switching conversion mode, the conversion control circuit operates the conversion switch circuit to switch the inductor to plural voltage levels repetitively for converting an input power to a charging power to charge a battery by switching power conversion. In a capacitive conversion mode, the conversion control circuit operates the conversion switch circuit to switch the conversion capacitor between two of voltage division nodes periodically for converting the input power to the charging power by capacitive power conversion.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: July 14, 2020
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Wei-Jen Huang, Tsung-Han Lee, Shun-Yu Huang, Chun-Kai Chang
  • Patent number: 10705639
    Abstract: An anti-reflective integrated touch display panel includes an anti-reflective structure and touch electrodes. The anti-reflective structure includes a first insulating layer, a second insulating layer disposed on the first insulating layer, a conducting layer disposed on the second insulating layer, a third insulating layer disposed on the second insulating layer, and a fourth insulating layer disposed on the third insulating layer. The first insulating layer includes silicon oxide or silicon nitride, and has a thickness of 0.1 to 2 micrometers. The second insulating layer includes silicon oxide or strontium oxide, and has a thickness of 0.001 to 0.1 micrometer. The conducting layer includes molybdenum, and has a thickness of 0.01 to 0.05 micrometer. The fourth insulating layer includes silicon nitride, and has a thickness of 0.001 to 0.3 micrometer. The touch electrodes are disposed between the third insulating layer and the fourth insulating layer.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: July 7, 2020
    Assignee: Au Optronics Corporation
    Inventors: Chun-Cheng Hung, Wen-Jen Li, Yen-Shih Huang, Chia-Ming Chen, Ting-Wei Ko, Chia-Yuan Yeh
  • Patent number: 10699433
    Abstract: A liquid level detecting method is provided. Firstly, a receiving component is provided, wherein the receiving component includes a transmissive container for containing a liquid and a marking component located on a rear surface of the transmissive container. Then, a camera captures a receiving component image of the receiving component from a front surface of the transmitting container, wherein the receiving component image includes a transmissive container image and a marking component image. Then, the marker component image is analyzed downward from an end portion to obtain multiple width values of multiple position points of the marker component image. Then, a width difference between each width value and a width average of the marking component image is obtained. Then, a position point whose width difference value is not within a preset range is determined. Then, according to the position point, a liquid level of the liquid is determined.
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: June 30, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jia-Hao Bai, Tzu-Hang Huang, Chun-Jen Chen, Cheng-Hsun Lin
  • Patent number: 10700163
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A semiconductor substrate with gate structures formed thereon is provided. A source/drain region is formed in the semiconductor substrate and formed between the gate structures. A dielectric layer is formed on the source/drain region and located between the gate structures. An opening penetrating the dielectric layer on the source/drain region is formed. A lower portion of a first conductive structure is formed in the opening. A dielectric spacer is formed on the lower portion and on an inner wall of the opening. An upper portion of the first conductive structure is formed in the opening and on the lower portion. The dielectric spacer surrounds the upper portion of the first conductive structure. The first conductive structure is formed by two steps for forming the dielectric spacer surrounding the upper portion and improving the electrical performance of the semiconductor device.
    Type: Grant
    Filed: November 18, 2018
    Date of Patent: June 30, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Te-Chang Hsu, Che-Hsien Lin, Cheng-Yeh Huang, Chun-Jen Huang, Yu-Chih Su, Yao-Jhan Wang
  • Publication number: 20200194058
    Abstract: The present invention provides a static random access memory (SRAM), the SRAM includes a substrate, a SRAM pattern disposed on the substrate, wherein the SRAM pattern at least includes a first gate structure, a second gate structure and a third gate structure, arranged along a first direction, wherein the second gate structure and the third gate structure are parallel to the first gate structure, and a gap is disposed between the second gate structure and the third gate structure, and wherein the first gate structure is composed of a first elongated structure, a second elongated structure and a curved structure disposed between the first elongated structure and the second elongated structure, and wherein the curved structure is aligned with the gap along a second direction, and an interconnection contact structure disposed between the first gate structure and the second gate structure, and arranged along the first direction.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 18, 2020
    Inventors: Te-Chang Hsu, Cheng-Pu Chiu, Chun-Jen Huang, Cheng-Yeh Huang, Che-Hsien Lin, Yao-Jhan Wang
  • Publication number: 20200194316
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate having a fin-shaped structure thereon, forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion, and then forming more than one gate structures such as a first gate structure and a second gate structure on the SDB structure. Preferably, each of the first gate structure and the second gate structure overlaps the fin-shaped structure and the SDB structure.
    Type: Application
    Filed: February 26, 2020
    Publication date: June 18, 2020
    Inventors: Fu-Jung Chuang, Po-Jen Chuang, Yu-Ren Wang, Chi-Mao Hsu, Chia-Ming Kuo, Guan-Wei Huang, Chun-Hsien Lin
  • Publication number: 20200185525
    Abstract: A semiconductor structure includes a semiconductor substrate, at least a silicon germanium (SiGe) epitaxial region disposed in the semiconductor substrate, and a contact structure disposed on the SiGe epitaxial region. The contact structure includes a titanium nitride (TiN) barrier layer and a metal layer surrounded by the TiN barrier layer. A crystalline titanium germanosilicide stressor layer is disposed in the SiGe epitaxial region and between the TiN barrier layer and the SiGe epitaxial region.
    Type: Application
    Filed: February 14, 2020
    Publication date: June 11, 2020
    Inventors: Cheng-Yeh Huang, Te-Chang Hsu, Chun-Jen Huang, Che-Hsien Lin, Yao-Jhan Wang
  • Publication number: 20200151461
    Abstract: A resident activity recognition method is provided. The method comprises: receiving a plurality of first testing data from a plurality of sensors by a processor, wherein the first testing data includes a present weight set of sensors and present trigger statuses of sensors; determining an activity of a non-target resident at a present time by the processor according to a non-target resident model and the first testing data; reducing a part of the present weight set to generate an updated weight set and a second testing data including the updated weight set and the present trigger statuses by the processor according to the activity of the non-target resident at the present time, the first testing data and the non-target resident model; determining an activity of a target resident at the present time by the processor according to a target resident model and the second testing data.
    Type: Application
    Filed: December 21, 2018
    Publication date: May 14, 2020
    Inventors: Jin-Shyan LEE, Chun-Hsien WU, Jui-Wen CHEN, Jui-Hsing HUANG, Mao-Jen CHUNG
  • Publication number: 20200153980
    Abstract: A system and a method using matrix barcode information to process documents are provided. A document-processing apparatus generates matrix barcode information and establishes a wireless link with a mobile apparatus through the matrix barcode information. When the document-processing apparatus establishes the wireless link with the mobile apparatus, the document-processing apparatus creates a file transfer zone, performs a corresponding automatic document-processing action, such as scanning or printing, according to a driving command received from the mobile apparatus, and exchanges the generated image information with the mobile apparatus through the file transfer zone. Given the matrix barcode information, the document-processing apparatus can be directly controlled by the mobile apparatus to achieve direct information exchange and enhanced efficiency and security of the document-processing system.
    Type: Application
    Filed: August 19, 2019
    Publication date: May 14, 2020
    Inventors: CHUN-CHEIH LIAO, HUNG-JEN LIN, CHUN-PING HUANG
  • Publication number: 20200153997
    Abstract: A system and a method using matrix barcode information to perform point-to-point information exchange are provided. An electronic device is connected to a document-processing device by way of wired connection and instantly exchange information with a mobile device held by a user. The electronic device and the mobile device are wirelessly connected through matrix barcode information. The electronic device provides a file transfer zone for storing information to be transmitted. When the user transmits a remote command to the electronic device through the mobile device, the electronic device directly drives the document-processing device according to the remote command for the document-processing device to perform a corresponding automated document-processing action, such as scanning or printing. Given the instant information exchange scheme established based on the matrix barcode information, the document-processing efficiency can be enhanced.
    Type: Application
    Filed: August 16, 2019
    Publication date: May 14, 2020
    Applicant: AVISION INC.
    Inventors: CHUN-CHEIH LIAO, HUNG-JEN LIN, CHUN-PING HUANG
  • Publication number: 20200127089
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A semiconductor substrate with gate structures formed thereon is provided. A source/drain region is formed in the semiconductor substrate and formed between the gate structures. A dielectric layer is formed on the source/drain region and located between the gate structures. An opening penetrating the dielectric layer on the source/drain region is formed. A lower portion of a first conductive structure is formed in the opening. A dielectric spacer is formed on the lower portion and on an inner wall of the opening. An upper portion of the first conductive structure is formed in the opening and on the lower portion. The dielectric spacer surrounds the upper portion of the first conductive structure. The first conductive structure is formed by two steps for forming the dielectric spacer surrounding the upper portion and improving the electrical performance of the semiconductor device.
    Type: Application
    Filed: November 18, 2018
    Publication date: April 23, 2020
    Inventors: Te-Chang Hsu, Che-Hsien Lin, Cheng-Yeh Huang, Chun-Jen Huang, Yu-Chih Su, Yao-Jhan Wang
  • Publication number: 20200105933
    Abstract: A semiconductor structure includes a semiconductor substrate, at least a silicon germanium (SiGe) epitaxial region disposed in the semiconductor substrate, and a contact structure disposed on the SiGe epitaxial region. The contact structure includes a titanium nitride (TiN) barrier layer and a metal layer surrounded by the TiN barrier layer. A crystalline titanium germanosilicide stressor layer is disposed in the SiGe epitaxial region and between the TiN barrier layer and the SiGe epitaxial region.
    Type: Application
    Filed: October 16, 2018
    Publication date: April 2, 2020
    Inventors: Cheng-Yeh Huang, Te-Chang Hsu, Chun-Jen Huang, Che-Hsien Lin, Yao-Jhan Wang
  • Patent number: 10608113
    Abstract: A semiconductor structure includes a semiconductor substrate, at least a silicon germanium (SiGe) epitaxial region disposed in the semiconductor substrate, and a contact structure disposed on the SiGe epitaxial region. The contact structure includes a titanium nitride (TiN) barrier layer and a metal layer surrounded by the TiN barrier layer. A crystalline titanium germanosilicide stressor layer is disposed in the SiGe epitaxial region and between the TiN barrier layer and the SiGe epitaxial region.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: March 31, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Yeh Huang, Te-Chang Hsu, Chun-Jen Huang, Che-Hsien Lin, Yao-Jhan Wang