Abstract: This disclosure provides data processing methods, apparatuses, and systems. In an implementation, a method comprises receiving, by a first data processing unit (DPU), a memory allocation request from a first service process in a computing node that comprises the first DPU, wherein the first DPU stores memory address assignment information that indicates a virtual memory address corresponding to a physical memory allocated by a storage node to the computing node. Determining, by the first DPU based on the memory address assignment information and in the virtual memory address corresponding to the physical memory allocated by the storage node to the computing node, a virtual memory address range assigned to the first service process, and when the first DPU receives a data storage request from the first service process, sending, by the first DPU, a write data request to the second DPU over a communication link between the first DPU and the second DPU.

Abstract: This disclosure provides systems, methods, and devices for image processing that support enhanced white balancing operations. In a first aspect, a method of image processing includes receiving first image data obtained at a first aperture; determining a first output image frame based on the first image data by applying a first white balancing to at least a portion of the first image data; receiving second image data obtained at a second aperture; and determining a second output image frame based on the second image data by applying a second white balancing based on the first aperture and the second aperture to at least a portion of the second image data. The second white balancing may be based on a first compensation factor based on the first aperture and the second aperture used to adjust the first white balancing. Other aspects and features are also claimed and described.

Abstract: Disclosed is a methods and apparatus which can improve defect tolerability of a hardware-based neural network. In one embodiment, a method for performing a calculation of values on first neurons of a first layer in a neural network, includes: receiving a first pattern of a memory cell array; determining a second pattern of the memory cell array according to a third pattern; determining at least one pair of columns of the memory cell array according to the first pattern and the second pattern; switching input data of two columns of each of the at least one pair of columns of the memory cell array; and switching output data of the two columns in each of the at least one pair of columns of the memory cell array so as to determine the values on the first neurons of the first layer.

Abstract: A radiotherapy system includes a neutron acceptor, an aerosolization device for aerosolizing the neutron acceptor, and an energy beam generator. A method for treating cancer, including: administering to a subject in need thereof an effective amount of an aerosolized neutron acceptor; and irradiating the subject with neutrons. A method for diagnosing cancer, including: administering to a subject in need thereof an effective amount of an aerosolized radioactive agent; and receiving an energy beam signal from the subject. A method for delivering a neutron receptor to a subject during radiation therapy, including aerosolizing the neutron receptor and administering to the subject an effective amount of the neutron receptor.

Abstract: In some embodiments, a method for forming a semiconductor device is provided. The method includes etching a substrate to form a recess within a surface of the substrate. An epitaxial material is formed within the recess, a capping structure is formed on the epitaxial material, and a capping layer is formed onto the capping structure. The capping layer laterally extends past an outermost sidewall of the capping structure. Dopants are implanted into the epitaxial material. Implanting the dopants into the epitaxial material forms a first doped region having a first doping type and a second doped region having a second doping type.

Abstract: A semiconductor package includes a conductive pillar and a solder. The conductive pillar has a first sidewall and a second sidewall opposite to the first sidewall, wherein a height of the first sidewall is greater than a height of the second sidewall. The solder is disposed on and in direct contact with the conductive pillar, wherein the solder is hanging over the first sidewall and the second sidewall of conductive pillar.

Abstract: An audio dose monitoring circuit includes: a sound level measuring circuit arranged to operably generate multiple sound level values, wherein the multiple sound level values respectively correspond to the sound levels generated by an audio playback device at multiple time points or the sound levels received by a microphone at multiple time points; an audio dose calculating circuit coupled with the sound level measuring circuit and arranged to operably generate an audio dose value corresponding to a measuring period based on the multiple sound level values and contents of a weighting table; a control circuit coupled with the audio dose calculating circuit and arranged to operably compare the audio dose value with a dose threshold to determine whether to generate a control signal or not; and an indication signal generating circuit coupled with the control circuit and arranged to operably generate a corresponding indication signal according to the control signal.

Abstract: A measurement system including an excitation light source, an image sensor, and a calculator is provided. The excitation light source is configured to emit an excitation light beam. The image sensor is configured to record an image of the excitation light beam passing through a glass substrate having a plurality of vias. The image is a 2D interference pattern. The calculator is electrically connected to the image sensor. The calculator analyzes a 3D geometric-structure image of the vias in the glass substrate according to the image. A measurement method is also provided.

Abstract: Methods and systems for media trend detection and maintenance are provided herein. A set of media items each having common media characteristics is identified. A set of pose values is determined for each respective media item of the set of media items. Each pose value is associated with a particular predefined pose for objects depicted by the set of media items. A set of distance scores is calculated. Each distance score represents a distance between the respective set of pose values determined for a media item and a respective set of pose values determined for an additional media item. A coherence score is determined for the set of media items based on the calculated set of distance scores. Responsive to a determination that the coherence score satisfies one or more coherence criteria, a determination is made that the set of media items corresponds to a media trend of a platform.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of nanostructures formed over a substrate, and a gate structure formed on the nanostructures. The semiconductor structure includes a source/drain (S/D) structure formed adjacent to the gate structure, and a fin spacer layer adjacent to the S/D structure. The bottom surface of the fin spacer layer is lower than a bottom surface of the S/D structure.

Abstract: A computer vision processing system is provided. The system includes one or more target devices and a processing unit. The target devices are configured to run the executable code of an image processing pipeline. The processing unit is configured to receive a series of application programming interface (API) calls and create a raw graph accordingly, redraw the raw graph into a compilable graph by sequentially processing each node, and compile the compilable graph into the executable code of the image processing pipeline. The series of API calls includes at least one tiling API call to set at least one of the nodes and at least one of the data objects as tileable. Each tileable node corresponds to multiple parallel processing nodes in multiple branches in the compilable graph, and each tileable data object corresponds to multiple tile data objects in the branches in the compilable graph.

Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through substrate via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through substrate via.

Abstract: A memory control method, a memory storage device and a memory control circuit unit are disclosed. The method includes: detecting a state of the memory storage device; and adjusting an operation mode of the memory storage device according to the state of the memory storage device, wherein the operation mode includes a first operation mode and a second operation mode, and a first waiting time before the memory storage device entering a power saving mode in the first operation mode is longer than a second waiting time before the memory storage device entering the power saving mode in the second operation mode.

Abstract: A power conversion system for converting an input power to an output power, includes: a current limit circuit clamping an input current of the output power to be not exceeding an input current limit during a current clamping state; and a charge quantity regulation circuit converting the output power to a temporary storage power in a temporary storage capacitor during a charging mode, wherein the charge quantity regulation circuit converts the temporary storage power to generate the output power in collaboration with the current limit circuit during a discharging mode. When the input current reaches a current threshold, the charge quantity regulation circuit enters the discharging mode. During the discharging mode, the charge quantity regulation circuit regulates an output voltage of the output power to a target level, wherein the target level is lower than an input voltage of the input power.

Abstract: The invention provides a touch display panel and a manufacturing method therefor. The touch display panel comprises a substrate; a display region disposed on the substrate; an opening region disposed on the substrate and adjacent to the display region; a plurality of touch electrodes disposed in the display region; a plurality of signal lines electrically connected to the touch electrodes; a common voltage loop surrounding the display region and having a first portion and a second portion spaced apart and adjacent to the opening region; a connection structure disposed between the first portion and the second portion; and a plurality of first dummy signal lines electrically connected to the connection structure; wherein the first portion is electrically connected to the second portion through the connection structure.

Abstract: A harvesting assembly for harvesting a tissue graft from surrounding tissue is disclosed including a guide. The guide includes a means for fixedly engaging with an anterior surface of the tendon. The guide also includes a means of guiding a cutting blade along a preferred trajectory into and along a length of the tendon. The guide also includes a means of guiding a truncating blade along a preferred trajectory across a width of tendon. The cutting blade may include two parallel blades for forming lateral sides of the tendon graft simultaneously. Each of the two parallel blades may define a leading edge that extends along at least a 90 degree arc that is equidistant from a stop on the cutting blade. The stop in combination with the guide may limit a cut depth into the tendon for a range of cutting blade handle elevation angles.

Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, an inter-metal dielectric (IMD) layer on the substrate, a MTJ in the IMD layer on the MTJ region, a first metal interconnection in the IMD layer on the logic region, and protrusions adjacent to two sides of the first metal interconnection. Preferably, the MTJ further includes a bottom electrode, a fixed layer, a barrier layer, a free layer, and a top electrode.

Abstract: An apparatus includes a wafer stage and a particle removing assembly. The wafer stage includes a cup adjacent to a wafer chuck. The particle removing assembly is configured to remove contaminant particles from the cup. In some embodiments, the particle removing assembly comprises a flexible ejecting member that includes one or more elongated tubes, a front tip, and a cleaning tip adapter configured to attach the front tip to each of the one or more elongated tubes. The front tip includes front openings and lateral openings from which pressurized cleaning material are introduced onto an unreachable area of the cup to remove the contaminant particles from the cup.

Abstract: Disclosed are systems, apparatuses, processes, and computer-readable media for processing image data. One illustrative method of processing image data includes: capturing a first image of a subject using a variable aperture lens configured with a first aperture and a first exposure value; capturing a second image of the subject using the variable aperture lens configured with a second aperture and a second exposure value, wherein the second aperture is smaller than the first aperture and the second exposure value is smaller than the first exposure value; and generating a high dynamic range (HDR) image at least in part by fusing the first image and the second image fusing the first image and the second image.

Abstract: Imaging systems and techniques are described. An imaging system receives image data captured by an image sensor according to one or more image capture settings, for instance according to an aperture size, temperature, lux, lens position, and/or region of interest. The image data includes image pixel data and focus pixel data. The imaging system determines a first focus setting based on phase detection using the focus pixel data. The imaging system determines a focus offset based on use of the one or more image capture settings as inputs to a trained model (e.g., decision tree, random forest, neural network). The imaging system determines a second focus setting at least in part by adjusting the first focus setting according to the focus offset, and causes a focus control mechanism to set a focus parameter to the second focus setting.