Patents by Inventor Chun Liu

Chun Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11157046
    Abstract: An electronic device is provided, including a main body, a cover movably connected to the main body, a biasing element connected to the cover and the main body, a movable member movably disposed on the main body, and a magnetic element disposed on the movable member. When the cover is located in a closed position relative to the main body, the cover is attracted by the magnetic element and restricted in the closed position. When the movable member is pushed by an external force to move from its initial position to a first position, the movable member and the magnetic element separate from the cover, and the biasing element drives the cover to move from the closed position to an open position.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: October 26, 2021
    Assignee: ACER INCORPORATED
    Inventors: Ting-Wen Pai, Wen-Chieh Tai, Cheng-Nan Ling, Chih-Chun Liu, Yu-Shih Wang
  • Patent number: 11158757
    Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: October 26, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Yi-Chieh Lin, Shiuan-Leh Lin, Yung-Fu Chang, Shih-Chang Lee, Chia-Liang Hsu, Yi Hsiao, Wen-Luh Liao, Hong-Chi Shih, Mei-Chun Liu
  • Publication number: 20210328012
    Abstract: A method includes forming a fin structure having a stack of alternating first semiconductor layers and second semiconductor layers over a substrate; forming a dummy gate structure across the fin structure; etching portions of the fin structure to expose portions of the substrate; forming source/drain stressors over the exposed portions of the substrate; after forming the source/drain stressors, removing the dummy gate structure; after removing the dummy gate structure, removing the first semiconductor layers such that the second semiconductor layers are suspended between the source/drain stressors; and forming a gate structure to surround each of the suspended second semiconductor layers. The source/drain stressors each comprise a first source/drain layer and a second source/drain layer over the first source/drain layer. An atomic concentration of a Group IV element or a Group V element in the second source/drain layer is greater than that in the first source/drain layer.
    Type: Application
    Filed: April 16, 2020
    Publication date: October 21, 2021
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Chung-En TSAI, Chia-Che CHUNG, Chee-Wee LIU, Fang-Liang LU, Yu-Shiang HUANG, Hung-Yu YEH, Chien-Te TU, Yi-Chun LIU
  • Patent number: 11151191
    Abstract: A method for video content searching is provided. The method accesses video content and segments the video content into a plurality of frames. The method identifies one or more characteristics for at least a portion of frames of the plurality of frames and determines time frames for each characteristic of the one or more characteristics within the portion of the frames. The method generates frame keywords for the plurality of frames based on the one or more characteristics. The method assigns at least one frame keyword to each time frame within the portion of the frames and generates an index store for the video content. The index store is generated based on the frame keywords and assigning the at least one frame keyword to each frame. The index store includes the frame keywords and time frames assigned to the frame keywords.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: October 19, 2021
    Assignee: International Business Machines Corporation
    Inventors: Tsai-Hsuan Hsieh, Peter Wu, Chiwen Chang, Allison Yu, Ching-Chun Liu, Kate Lin
  • Patent number: 11147157
    Abstract: A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: October 12, 2021
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Patent number: 11140773
    Abstract: A substrate structure with high reflectance includes a base material, a patterned circuit layer, an insulating layer and a metal reflecting layer. The base material includes a first surface and a second surface opposite to the first surface. The patterned circuit layer is disposed on the first surface. The insulating layer covers the patterned circuit layer and a part of the first surface exposed by the patterned circuit layer. The metal reflecting layer covers the insulating layer, and a reflectance of the metal reflecting layer is substantially greater than or equal to 85%. A manufacturing method of a substrate structure with high reflectance is also provided.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: October 5, 2021
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Patent number: 11139242
    Abstract: Integrated chips and methods for forming vias in the same include forming a multi-layer isolation structure on an underlying layer. The multi-layer isolation structure includes a first isolation layer around a second isolation layer. Conductive material is formed around the multi-layer isolation structure. The first isolation layer is etched back to expose at least a portion of a sidewall of the conductive material. A conductive via is formed to contact a top surface and the exposed portion of the sidewall of the conductive material.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: October 5, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ruilong Xie, Chih-Chao Yang, Chi-Chun Liu, Kangguo Cheng
  • Patent number: 11133260
    Abstract: A method of forming a self-aligned top via is provided. The method includes forming a metallization layer on a substrate, and forming a hardmask layer on the metallization layer. The method further includes forming a pair of adjacent parallel mandrels on the hardmask layer with sidewall spacers on opposite sides of each mandrel. The method further includes forming a planarization layer on the exposed portions of the hardmask layer, mandrels, and sidewall spacers, and forming an opening in the planarization layer aligned between the adjacent parallel mandrels. The method further includes forming a spacer layer in the opening, and removing portions of the spacer layer to form a pair of spacer plugs between sections of the sidewall spacers.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: September 28, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chi-Chun Liu, John C. Arnold, Dominik Metzler, Nelson Felix, Ashim Dutta
  • Publication number: 20210298150
    Abstract: An LED illumination device includes a circuit substrate, a bridge rectifier, a current-limiting chip, a resistance switching module and an LED group. The bridge rectifier is disposed on the circuit substrate and electrically connected to the circuit substrate. The current-limiting chip is disposed on the circuit substrate and electrically connected to the circuit substrate. The resistance switching module is disposed on the circuit substrate and electrically connected to the circuit substrate. The LED group includes a plurality of LED chips disposed on the circuit substrate and electrically connected to the circuit substrate. The bridge rectifier, the current-limiting chip, the resistance switching module and the LED group are electrically connected with each other.
    Type: Application
    Filed: July 3, 2020
    Publication date: September 23, 2021
    Inventors: CHIA-TIN CHUNG, PEI-CHUN LIU
  • Patent number: 11121285
    Abstract: A semiconductor device includes a conductive layer, a semiconductor stack, a first contact structure, an intermediate structure, a second contact structure, a first electrode and a second electrode. The semiconductor stack is disposed on the conductive layer. The first contact structure is disposed on the semiconductor stack. The intermediate structure encloses the first contact structure. The second contact structure is between the conductive layer and the semiconductor stack. The first electrode is on the conductive layer and separated from the semiconductor stack. The second electrode is on the intermediate structure.
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: September 14, 2021
    Assignee: Epistar Corporation
    Inventors: Yung-Fu Chang, Hui-Fang Kao, Yi-Tang Lai, Shih-Chang Lee, Wen-Luh Liao, Mei Chun Liu, Yao-Ru Chang, Yi Hisao
  • Publication number: 20210267039
    Abstract: A two-wire dimming lighting device includes an encoding circuit, a decoding circuit, a light source driving circuit, and an LED light emitting circuit. The encoding circuit wirelessly receives the dimming instruction, encodes an AC power according to the dimming instruction, and then outputs an encoded AC power. The decoding circuit receives the encoded AC power and then decodes the encoded AC power to obtain a light source driving instruction. The light source driving circuit receives the light source driving instruction and controls the changes of light emission of the LED light emitting circuit according to the light source driving instruction. The encoding circuit transmits the encoded AC power to the decoding circuit through a two-wire AC transmission wire.
    Type: Application
    Filed: July 6, 2020
    Publication date: August 26, 2021
    Inventors: CHIA-TIN CHUNG, PEI-CHUN LIU
  • Publication number: 20210256590
    Abstract: A computer implemented method for matching services to potential receivers of the services that includes registering at least one of service providers and service receivers as members to a service matching system. The service matching system collects data from the members. Permission to collect data from the members is revocable at any time by the members. The method further includes taking an order from a first service receiver to receive goods from a service provider; and calculating a route of the first service receiver to obtain the goods from the service provider. The method further includes matching the route of the first service receiver with a potential delivery route to a second service receiver having an order with the service provider; and offering a promotion to the first service receiver to deliver the order by the second service receiver with the service provider over the potential delivery route.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 19, 2021
    Inventors: Cheng-Fang Lin, Chih-Chiang Hung, Amanda PL Yang, Joey H.Y. Tseng, Ching-Chun Liu, Yu-Siang Chen
  • Patent number: 11095834
    Abstract: A living organism image monitoring system is provided, relating to the technical field of medical equipment. The living organism image monitoring system comprises a display module, a processor and a CIGS chip, the CIGS chip, the processor and the display module being electrically connected, the CIGS chip being used for detecting a near infrared light signal of a living organism and generating a current signal after having detected the near infrared light signal, the processor being used for generating a first pulse signal according to the current signal, and the display module being used for displaying an image according to the first pulse signal. The living organism image monitoring system provided by the present disclosure has the advantages of being capable of synchronously transmitting the images of a living organism to the display module for display and enabling the images to be clearer.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: August 17, 2021
    Assignee: PIONEER MATERIALS INC. CHENGDU
    Inventors: Chien-Chun Liu, Liu-Yuh Lin, Liang-Chih Weng, Tzu-Huan Cheng, Chen-Hsin Wu, Hao-Che Liu, Chien-Yao Huang, Leon A Chiu, Sau-Mou Wu, Ti-Hsien Tai, Yu-Hsiang Pan
  • Patent number: 11084032
    Abstract: A microfluidic chip with a high volumetric flow rate is provided that includes at least two vertically stacked microfluidic channel layers, each microfluidic channel layer including an array of spaced apart pillars. Each microfluidic channel layer is interconnected by an inlet/outlet opening that extends through the microfluidic chip. The microfluidic chip is created without wafer to wafer bonding thus circumventing the cost and yield issues associated with microfluidic chips that are created by wafer bonding.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: August 10, 2021
    Assignee: International Business Machines Corporation
    Inventors: Chi-Chun Liu, Yann Mignot, Joshua T. Smith, Bassem M. Hamieh, Nelson Felix, Robert L. Bruce
  • Patent number: 11075161
    Abstract: An interconnect structure is provided. The interconnect structure includes a first metallization layer, an insulating layer and a second metallization layer. The first metallization layer includes, at an uppermost surface thereof, a first body formed of first dielectric material, first metallic elements and buffer elements formed of second dielectric material adjacent the first metallic elements. The insulating layer is disposed on the uppermost surface of the first metallization layer and defines apertures located at the first metallic elements and the corresponding buffer elements. The second metallization layer is disposed on the insulating layer and includes a second body formed of first dielectric material and second metallic elements located at the apertures and extending through the apertures to contact the corresponding first metallic elements and the corresponding buffer elements.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: July 27, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yann Mignot, Hsueh-Chung Chen, Junli Wang, Chi-Chun Liu, Mary Claire Silvestre
  • Publication number: 20210223821
    Abstract: An electronic device assembly is provided, including an electronic device body and a detachable lens module. The electronic device body has a housing and a first joining unit, wherein the first joining unit is disposed on the housing. The detachable lens module is detachably assembled onto the housing and has a second joining unit, wherein the first joining unit is joined to the second joining unit to electrically connect the detachable lens module to the electronic device body.
    Type: Application
    Filed: June 19, 2020
    Publication date: July 22, 2021
    Applicant: Acer Incorporated
    Inventors: Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai, Chi-Hung Lai, Wu-Chen Lee, Pin-Chueh Lin, Chih-Wei Liao, Ting-Wen Pai, Wen-Chieh Chen
  • Patent number: 11068204
    Abstract: A memory device and an access method applied to the memory device are provided. The memory device is electrically connected to a host, and the memory device includes a memory circuit and a memory controller. The memory circuit includes a first memory array and a second memory array. The first memory array and the second memory array respectively provide a first physical space and a second physical space. The memory controller receives an access command from the host. The memory controller performs the access command to the first physical space when the access command is a first type of command, and the memory controller performs the access command to the second physical space when the access command is a second type of command.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: July 20, 2021
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventor: Yi-Chun Liu
  • Publication number: 20210214931
    Abstract: A dry process connected energy-consuming beam column joint based on a corbel includes a prefabricated concrete corbel column, pre-buried steel plates and connecting steel plates, wherein the corbel section of the prefabricated concrete corbel column is stepped, and a notch section of a prefabricated concrete notch beam is matched with the stepped section of the corbel and is in lap joint to the stepped section; the pre-buried steel plates are separately pre-buried on the upper and lower surfaces of the corbel and the prefabricated concrete notch beam, friction plates are arranged outside the pre-buried steel plates, and slight tooth spaces are arranged on the sides, facing the pre-buried steel plates, of the friction plates; and the connecting steel plates are arranged on the left and right sides of the prefabricated concrete notch beam and the corbel lap joint section.
    Type: Application
    Filed: September 24, 2020
    Publication date: July 15, 2021
    Applicant: Southwest Jiaotong University
    Inventors: Zhixiang YU, Yuntao JIN, Chun LIU, Liping GUO, Liru LUO, Wenjun GAO, Hu XU, Lei ZHAO, Rui GUO
  • Publication number: 20210210679
    Abstract: A method of forming a semiconductor structure includes forming a memorization layer over a substrate, forming a first self-aligned double patterning (SADP) stack including a first organic planarization layer (OPL), masking layer, set of mandrels, and set of spacers, and forming a patterned memorization layer by transferring a first pattern of the first set of spacers to the memorization layer. The method also includes forming a second SADP stack comprising a second OPL, masking layer, set of mandrels, and set of spacers, and forming an array of pillars by transferring a second pattern of the second set of spacers to the patterned memorization layer. The first and second OPL and the first and second sets of mandrels are a spin-on coated OPL material, and the memorization layer and first and second masking layers are a material configured for removal selective to the spin-on coated OPL material.
    Type: Application
    Filed: January 6, 2020
    Publication date: July 8, 2021
    Inventors: Chi-Chun Liu, Yann Mignot, Ekmini Anuja De Silva, Nelson Felix, John Christopher Arnold
  • Publication number: 20210208635
    Abstract: An electronic device includes a casing, a stylus, a first magnet, a magnetic ring, and a pair of second magnets. The casing has a surface and an accommodation groove recessed from the surface. The stylus has a front end and a rear end. The first magnet is disposed at one of the front end and the rear end of the stylus, and the magnetic ring is disposed at the other of the front end and the rear end of the stylus. The second magnets are disposed in the casing and located below the accommodation groove, where locations of the first magnet and the magnetic ring correspond to locations of the second magnets.
    Type: Application
    Filed: August 13, 2020
    Publication date: July 8, 2021
    Applicant: Acer Incorporated
    Inventors: Yu-Shih Wang, Wen-Chieh Tai, Cheng-Nan Ling, Chih-Chun Liu