Patents by Inventor Chun-Ming Wang

Chun-Ming Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7969638
    Abstract: A thin black mask is created using a single mask process. A dielectric layer is deposited over a substrate. An absorber layer is deposited over the dielectric layer and a reflector layer is deposited over the absorber layer. The absorber layer and the reflector layer are patterned using a single mask process.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: June 28, 2011
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Gang Xu, Chun-Ming Wang, Fan Zhong, Qi Luo
  • Patent number: 7933475
    Abstract: Methods and apparatus for providing lighting in a display are provided. In one embodiment, a microelectromechanical system (MEMS) is provided that includes a transparent substrate and a plurality of interferometric modulators. The interferometric modulators include an optical stack coupled to the transparent substrate, a reflective layer over the optical stack, and one or more posts to support the reflective layer and to provide a path for light from a backlight for lighting the display.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: April 26, 2011
    Assignee: Qualcomm MEMS Technologies, Inc.
    Inventors: Chun-Ming Wang, Ming-Hau Tung, Surya Prakash Ganti
  • Publication number: 20110058243
    Abstract: Certain MEMS devices include layers patterned to have tapered edges. One method for forming layers having tapered edges includes the use of an etch leading layer. Another method for forming layers having tapered edges includes the deposition of a layer in which the upper portion is etchable at a faster rate than the lower portion. Another method for forming layers having tapered edges includes the use of multiple iterative etches. Another method for forming layers having tapered edges includes the use of a liftoff mask layer having an aperture including a negative angle, such that a layer can be deposited over the liftoff mask layer and the mask layer removed, leaving a structure having tapered edges.
    Type: Application
    Filed: November 15, 2010
    Publication date: March 10, 2011
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventor: Chun-Ming Wang
  • Publication number: 20110026327
    Abstract: Bit line connections for non-volatile storage devices and methods for fabricating the same are disclosed. At least two different types of bit line connections may be used between memory cells and bit lines. The different types of bit line connections may be structurally different from each other as follows. One type of bit line connection may include a metal pad between an upper via and lower via. Another type of bit line connection may include an upper via and lower via, but does not include the metal pad. Three rows of bit line connections may be used to relax the pitch. For example, two rows of bit line connections on the outside may have the metal pad, whereas bit line connections in the middle row do not have the metal pad.
    Type: Application
    Filed: June 10, 2010
    Publication date: February 3, 2011
    Inventors: Chen-Che Huang, Chun-Ming Wang, Masaaki Higashitani
  • Patent number: 7871909
    Abstract: Methods for forming patterns having triple the line frequency of a first pattern using only a single spacer are disclosed. For example, the first pattern is formed in a first and a second material using a lithographic process. Sidewall spacers are formed from a third material adjacent to exposed sidewalls of features in the second material. The width of the features in the first pattern in the first material is reduced. For example, the width is reduced to about the target width of features in a final pattern. The width of features in the first pattern in the second material is reduced using remaining portions of the first material as a mask. A second pattern is formed based on remaining portions of the second material and the sidewall spacers. The features in the second pattern may be lines having about ? the width of lines in the first pattern.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: January 18, 2011
    Assignee: SanDisk 3D LLC
    Inventors: Chun-Ming Wang, Chen-Che Huang, Masaaki Higashitani, George Matamis
  • Publication number: 20100330806
    Abstract: One embodiment of the invention provides a method of forming a plurality of contact holes, including forming a first feature and a second feature over an underlying material, forming sidewall spacers on the first and second features, removing the first and second features without removing the sidewall spacers, forming a cover mask at least partially exposing the sidewall spacers, and etching the underlying material using the cover mask and the sidewall spacers as a mask to form the plurality of contact holes.
    Type: Application
    Filed: June 29, 2009
    Publication date: December 30, 2010
    Inventors: Chun-Ming Wang, Chenche Huang, Masaaki Higashitani
  • Patent number: 7846756
    Abstract: A method of making a device is disclosed including: forming a first hard mask layer over an underlying layer; forming a first imprint resist layer over the underlying layer; forming first features over the first hard mask layer by bringing a first imprint template in contact with the first imprint resist layer; forming a first spacer layer over the first features; etching the first spacer layer to form a first spacer pattern and to expose top of the first features; removing the first features; patterning the first hard mask, using the first spacer pattern as a mask, to form first hard mask features; and etching at least part of the underlying layer using the first hard mask features as a mask.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: December 7, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Bing K. Yen, Chun-Ming Wang, Yung-Tin Chen, Steven Maxwell
  • Patent number: 7835093
    Abstract: Certain MEMS devices include layers patterned to have tapered edges. One method for forming layers having tapered edges includes the use of an etch leading layer. Another method for forming layers having tapered edges includes the deposition of a layer in which the upper portion is etchable at a faster rate than the lower portion. Another method for forming layers having tapered edges includes the use of multiple iterative etches. Another method for forming layers having tapered edges includes the use of a liftoff mask layer having an aperture including a negative angle, such that a layer can be deposited over the liftoff mask layer and the mask layer removed, leaving a structure having tapered edges.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: November 16, 2010
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Chun-Ming Wang
  • Publication number: 20100271688
    Abstract: MEMS devices (such as interferometric modulators) may be fabricated using a sacrificial layer that contains a heat vaporizable polymer to form a gap between a moveable layer and a substrate. One embodiment provides a method of making a MEMS device that includes depositing a polymer layer over a substrate, forming an electrically conductive layer over the polymer layer, and vaporizing at least a portion of the polymer layer to form a cavity between the substrate and the electrically conductive layer.
    Type: Application
    Filed: July 7, 2010
    Publication date: October 28, 2010
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventors: Chun-Ming Wang, Jeffrey Lan, Teruo Sasagawa
  • Patent number: 7795061
    Abstract: MEMS devices (such as interferometric modulators) may be fabricated using a sacrificial layer that contains a heat vaporizable polymer to form a gap between a moveable layer and a substrate. One embodiment provides a method of making a MEMS device that includes depositing a polymer layer over a substrate, forming an electrically conductive layer over the polymer layer, and vaporizing at least a portion of the polymer layer to form a cavity between the substrate and the electrically conductive layer.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: September 14, 2010
    Assignee: Qualcomm MEMS Technologies, Inc.
    Inventors: Chun-Ming Wang, Jeffrey Lan, Teruo Sasagawa
  • Patent number: 7786015
    Abstract: A method of making a semiconductor device includes forming at least one device layer over a substrate, forming at least two spaced apart features over the at least one device layer, forming sidewall spacers on the at least two features, selectively removing the spaced apart features, filling a space between a first sidewall spacer and a second sidewall spacer with a filler feature, selectively removing the sidewall spacers to leave a plurality of the filler features spaced apart from each other, and etching the at least one device layer using the filler feature as a mask.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: August 31, 2010
    Assignee: SanDisk 3D LLC
    Inventors: Yung-Tin Chen, Chun-Ming Wang, Steven J. Radigan, Christopher J. Petti, Steven Maxwell
  • Patent number: 7781269
    Abstract: A method of making a semiconductor device includes forming at least one device layer over a substrate, forming a plurality of spaced apart first features over the device layer, where each three adjacent first features form an equilateral triangle, forming sidewall spacers on the first features, filling a space between the sidewall spacers with a plurality of filler features, selectively removing the sidewall spacers, and etching the at least one device layer using at least the plurality of filler features as a mask. A device contains a plurality of bottom electrodes located over a substrate, a plurality of spaced apart pillars over the plurality of bottom electrodes, and a plurality of upper electrodes contacting the plurality of pillars. Each three adjacent pillars form an equilateral triangle, and each pillar comprises a semiconductor device.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: August 24, 2010
    Assignee: Sandisk 3D LLC
    Inventors: Chun-Ming Wang, Yung-Tin Chen, Roy E. Scheuerlein
  • Publication number: 20100200938
    Abstract: Certain MEMS devices include layers patterned to have tapered edges. One method for forming layers having tapered edges includes the use of an etch leading layer. Another method for forming layers having tapered edges includes the deposition of a layer in which the upper portion is etchable at a faster rate than the lower portion. Another method for forming layers having tapered edges includes the use of multiple iterative etches. Another method for forming layers having tapered edges includes the use of a liftoff mask layer having an aperture including a negative angle, such that a layer can be deposited over the liftoff mask layer and the mask layer removed, leaving a structure having tapered edges.
    Type: Application
    Filed: February 8, 2010
    Publication date: August 12, 2010
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventor: Chun-Ming Wang
  • Publication number: 20100202039
    Abstract: Embodiments of MEMS devices include support structures having substantially vertical sidewalls. Certain support structures are formed through deposition of self-planarizing materials or via a plating process. Other support structures are formed via a spacer etch. Other MEMS devices include support structures at least partially underlying a movable layer, where the portions of the support structures underlying the movable layer include a convex sidewall. In further embodiments, a portion of the support structure extends through an aperture in the movable layer and over at least a portion of the movable layer.
    Type: Application
    Filed: April 23, 2010
    Publication date: August 12, 2010
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventors: Lior Kogut, Chengbin Qiu, Chun-Ming Wang, Stephen Zee, Fan Zhong
  • Publication number: 20100167502
    Abstract: A method of making a device is disclosed including: forming a first hard mask layer over an underlying layer; forming a first imprint resist layer over the underlying layer; forming first features over the first hard mask layer by bringing a first imprint template in contact with the first imprint resist layer; forming a first spacer layer over the first features; etching the first spacer layer to form a first spacer pattern and to expose top of the first features; removing the first features; patterning the first hard mask, using the first spacer pattern as a mask, to form first hard mask features; and etching at least part of the underlying layer using the first hard mask features as a mask.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventors: Bing K. Yen, Chun-Ming Wang, Yung-Tin Chen, Steven Maxwell
  • Patent number: 7742258
    Abstract: A method for fabricating a magnetic head with a trapezoidal shaped pole piece tip is described. The body of the main pole piece is deposited; then one or more layers for the pole piece tip are deposited. A bed material is deposited over the pole piece tip material. A void is formed in the bed material over the area for the pole piece tip. The void is filled with an ion-milling resistant material such as alumina preferably using atomic layer deposition or atomic layer chemical vapor deposition. The excess ion-milling resistant material and the bed material are removed. The result is an ion-milling mask formed over the area for the pole piece tip. Ion milling is then used to remove the unmasked material in the pole piece tip layer and to form a beveled pole piece tip and preferably a beveled face on the main pole piece.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: June 22, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Tsung Yuan Chen, David Patrick Druist, Quang Le, Kim Y. Lee, Chun-Ming Wang, Howard Gordon Zolla
  • Publication number: 20100147790
    Abstract: A microelectromechanical systems device having support structures formed of sacrificial material surrounded by a protective material. The microelectromechanical systems device includes a substrate having an electrode formed thereon. Another electrode is separated from the first electrode by a cavity and forms a movable layer, which is supported by support structures formed of a sacrificial material.
    Type: Application
    Filed: February 24, 2010
    Publication date: June 17, 2010
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventors: Teruo Sasagawa, Clarence Chui, Manish Kothari, SuryaPrakash Ganti, Jeffrey B. Sampsell, Chun-Ming Wang
  • Publication number: 20100149627
    Abstract: A microelectromechanical systems device having support structures formed of sacrificial material surrounded by a protective material. The microelectromechanical systems device includes a substrate having an electrode formed thereon. Another electrode is separated from the first electrode by a cavity and forms a movable layer, which is supported by support structures formed of a sacrificial material.
    Type: Application
    Filed: February 24, 2010
    Publication date: June 17, 2010
    Applicant: QUALCOMM MEMS TECHNOLOGIES, INC.
    Inventors: Teruo Sasagawa, Clarence Chui, Manish Kothari, SuryaPrakash Ganti, Jeffrey B. Sampsell, Chun-Ming Wang
  • Publication number: 20100105210
    Abstract: A method of making a device includes forming a first hard mask layer over an underlying layer, forming first features over the first hard mask layer, forming a first spacer layer over the first features, etching the first spacer layer to form a first spacer pattern and to expose top of the first features, removing the first features, patterning the first hard mask using the first spacer pattern as a mask to form first hard mask features, removing the first spacer pattern. The method also includes forming second features over the first hard mask features, forming a second spacer layer over the second features, etching the second spacer layer to form a second spacer pattern and to expose top of the second features, removing the second features, etching the first hard mask features using the second spacer pattern as a mask to form second hard mask features, and etching at least part of the underlying layer using the second hard mask features as a mask.
    Type: Application
    Filed: October 27, 2008
    Publication date: April 29, 2010
    Inventors: Yung-Tin Chen, Chun-Ming Wang, Steven J. Radigan
  • Patent number: 7704773
    Abstract: Embodiments of MEMS devices include support structures having substantially vertical sidewalls. Certain support structures are formed through deposition of self-planarizing materials or via a plating process. Other support structures are formed via a spacer etch. Other MEMS devices include support structures at least partially underlying a movable layer, where the portions of the support structures underlying the movable layer include a convex sidewall. In further embodiments, a portion of the support structure extends through an aperture in the movable layer and over at least a portion of the movable layer.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: April 27, 2010
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Lior Kogut, Chengbin Qiu, Chun-Ming Wang, Stephen Zee, Fan Zhong