Patents by Inventor Chun To Lee

Chun To Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128853
    Abstract: A power converter that properly copes with the wiring defects on a feedback path is shown. According to a control signal, a power driver couples an input voltage to an energy storage element to provide an output voltage that is down-converted from the input voltage. The output voltage is further converted into a feedback voltage by a feedback circuit, and is entered to an error amplifier with a reference voltage for generation of an amplified error. A control signal generator generates the control signal of the power driver according to the amplified error. The power converter specifically has a comparator, which is enabled in a soft-start stage till the output voltage reaches a stable status. The comparator compares the amplified error with a critical value. When the amplified error exceeds the critical value, the input voltage is disconnected from the energy storage element.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 18, 2024
    Inventors: Jung-Sheng CHEN, Chih-Chun CHUANG, Yong-Chin LEE
  • Publication number: 20240130043
    Abstract: An electronic device is disclosed. The electronic device includes a system board and a first set of electronic devices disposed over the system board. Each of the first set of electronic devices comprises a processing unit and a carrier carrying the processing unit. The electronic device also includes a first interconnection structure electrically connected with the processing unit through the carrier and configured to receive a first power from a first power supply unit and to transmit the first power to the processing unit.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 18, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Yen TING, Pao-Nan LEE, Hung-Chun KUO, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20240124298
    Abstract: Microelectromechanical devices and methods of manufacture are presented. Embodiments include bonding a mask substrate to a first microelectromechanical system (MEMS) device. After the bonding has been performed, the mask substrate is patterned. A first conductive pillar is formed within the mask substrate, and a second conductive pillar is formed within the mask substrate, the second conductive pillar having a different height from the first conductive pillar. The mask substrate is then removed.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 18, 2024
    Inventors: Yun-Chung Wu, Jhao-Yi Wang, Hao Chun Yang, Pei-Wei Lee, Wen-Hsiung Lu
  • Publication number: 20240125713
    Abstract: A method includes directing light at a first side of a semiconductor structure; detecting a first light intensity at a second side of the semiconductor structure, wherein the first light intensity corresponds to the light that penetrated the semiconductor structure from the first side to the second side; and comparing the first light intensity to a second light intensity, wherein the second light intensity corresponds to an expected intensity of light.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 18, 2024
    Inventors: Hao Chun Yang, Ming-Da Cheng, Pei-Wei Lee, Mirng-Ji Lii
  • Publication number: 20240128420
    Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Applicant: AUO Corporation
    Inventors: Chia-Hui Pai, Tai-Tso Lin, Wen-Hsien Tseng, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
  • Publication number: 20240128414
    Abstract: A light-emitting device is provided. The light-emitting device includes a light-emitting unit and a light-conversion structure disposed on the light-emitting unit, wherein the light-conversion structure includes a quantum dot layer and an etching blocking layer disposed on one of the surfaces of the quantum dot layer.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 18, 2024
    Inventors: Shiou-Yi KUO, Chin-Hung LUNG, Yu-Chun LEE, Hung-Chun TONG
  • Publication number: 20240129305
    Abstract: An apparatus may include a device comprising a controller configured to perform, using a first namespace identifier, a first access of a namespace of the device, wherein the device may be configured to perform, using a second namespace identifier, a second access of the namespace of the device, and wherein the second namespace identifier may include first information to determine the first namespace identifier, and second information to identify the controller. The first information may include the first namespace identifier, and the second information may include a controller identifier for the controller. The second namespace identifier may include the first namespace identifier concatenated with the controller identifier. The controller may include at least a portion of a communication endpoint. The device may further include a second controller configured to perform the second access. The first controller may include a child controller, and the second controller may include a parent controller.
    Type: Application
    Filed: July 19, 2023
    Publication date: April 18, 2024
    Inventors: Sang Young YE, Daniel Lee HELMICK, Chun-Chu Chen-Jhy Archie WU
  • Publication number: 20240127987
    Abstract: An integrated over-current protection device includes a positive temperature coefficient (PTC) component, a first conductive unit, a second conductive unit, a first conductive via, and a second conductive via. The PTC component includes a first PTC body, and has opposing first and second surfaces. The first conductive unit is disposed on the first surface, and includes a first electrode and a first conductive pad electrically insulated from the first electrode. The second conductive unit is disposed on the second surface, and includes a second electrode and a second conductive pad electrically insulated from the second electrode. The first conductive via extends through the first conductive unit and the PTC component to electrically connect the first electrode to the second conductive pad. The second conductive via extends through the second conductive unit and the PTC component to electrically connect the second electrode to the first conductive pad.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Inventors: Jack Jih-Sang CHEN, Chang-Hung JIANG, Ching-Chiang YEH, Ming-Chun LEE
  • Publication number: 20240124350
    Abstract: A quantum dot composite structure and a method for forming the same are provided. The quantum dot composite structure includes: a glass particle including a glass matrix and a plurality of quantum dots located in the glass matrix, wherein at least one of the plurality of quantum dots includes an exposed surface in the glass matrix; and an inorganic protective layer disposed on the glass particle and covering the exposed surface.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 18, 2024
    Inventors: Ching LIU, Wen-Tse HUANG, Ru-Shi LIU, Pei Cong YAN, Chai-Chun HSIEH, Hung-Chun TONG, Yu-Chun LEE, Tzong-Liang TSAI
  • Patent number: 11963053
    Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may determine, via a first subscription of the UE, a trigger event for a conditional handover of the UE from a source network entity to a target network entity. The UE may determine, based at least in part on the trigger event, that a target band associated with the target network entity is not compatible with a serving band associated with a second subscription of the UE. The UE may store the trigger event for the conditional handover in a buffer of the UE. The UE may perform an action related to the conditional handover based at least in part on a condition being satisfied. Numerous other aspects are described.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: April 16, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Kuo-Chun Lee, Qingxin Chen, Arvind Vardarajan Santhanam, Reza Shahidi, Mouaffac Ambriss, Liangchi Hsu, Tom Chin
  • Patent number: 11961546
    Abstract: A reference circuit for generating a reference current includes a plurality of resistive elements including at least one magnetic tunnel junction (MTJ). A control circuit is coupled to a first terminal of the at least one MTJ and is configured to selectively flow current through the at least one MTJ in the forward and inverse direction to generate a reference current.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Fu Lee, Hon-Jarn Lin, Po-Hao Lee, Ku-Feng Lin, Yi-Chun Shih, Yu-Der Chih
  • Publication number: 20240120244
    Abstract: This invention provides a carrier or submount for high power devices packaging and a method for forming the carrier or submount. The carrier comprises a thermal conductive ceramic substrate, a patterned adhesion layer on the substrate, a heat dissipation layer on the patterned adhesion layer, a conformal cover layer enclosing the heat dissipation layer and the adhesion layer, a lateral heat dissipation layer on the substrate and between the cover layer on the first region and the cover layer on the second region, a diffusion barrier layer on the conformal cover layer, and an eutectic bonding layer on the diffusion barrier layer. The substrate includes a first region for bonding high power device, a second region for wire-bonding, and a third region for heat sink. The first region and second region are on a first surface of the substrate, and the third region is one the second surface, opposite to the first surface, of the substrate.
    Type: Application
    Filed: November 16, 2023
    Publication date: April 11, 2024
    Inventors: Tzu Chien HUNG, Chun-Teng Ko, Bomin Tu, Zhengyu Lee
  • Publication number: 20240120325
    Abstract: A stacked package structure and a manufacturing method thereof are provided. The stacked package structure includes an upper redistribution layer, a first chip, and an upper molding layer. The first chip is disposed on the upper redistribution layer and is electrically connected to the upper redistribution layer. The upper molding layer is disposed on the first chip and the upper redistribution layer, and is configured to package the first chip. The upper molding layer includes a recess, the recess is recessed relative to a surface of the upper molding layer away from the upper redistribution layer, and the recess is circumferentially formed around a periphery of the upper molding layer.
    Type: Application
    Filed: May 31, 2023
    Publication date: April 11, 2024
    Applicant: POWERTECH TECHNOLOGY INC.
    Inventors: Pei-chun TSAI, Hung-hsin HSU, Shang-yu CHANG CHIEN, Chia-ling LEE
  • Publication number: 20240120419
    Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 11, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ling-Chun Chou, Yu-Hung Chang, Kun-Hsien Lee
  • Publication number: 20240120294
    Abstract: A chip package includes a substrate, a semiconductor chip, and a thermal conductive structure. The chip package includes a first and a second support structures below the thermal conductive structure. The first and the second support structures connect the substrate and corners of the thermal conductive structure. The thermal conductive structure has a side edge connecting the first and the second support structures. The first and the second support structures and the side edge together define of an opening exposing a space surrounding the semiconductor chip. The first and the second support structures are disposed along a side of the substrate. The first support structure is laterally separated from the side of the substrate by a first lateral distance. The side edge of the thermal conductive structure is laterally separated from the side of the substrate by a second lateral distance different than the first lateral distance.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 11, 2024
    Inventors: Shu-Shen YEH, Chin-Hua WANG, Kuang-Chun LEE, Po-Yao LIN, Shyue-Ter LEU, Shin-Puu JENG
  • Publication number: 20240115616
    Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Patent number: 11955335
    Abstract: In a method of coating a photo resist over a wafer, dispensing the photo resist from a nozzle over the wafer is started while rotating the wafer, and dispensing the photo resist is stopped while rotating the wafer. After starting and before stopping the dispensing the photo resist, a wafer rotation speed is changed at least 4 times. During dispensing, an arm holding the nozzle may move horizontally. A tip end of the nozzle may be located at a height of 2.5 mm to 3.5 mm from the wafer.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tung-Hung Feng, Hui-Chun Lee, Sheng-Wen Jiang, Shih-Che Wang
  • Patent number: 11955441
    Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jian-Hong Lin, Kuo-Yen Liu, Hsin-Chun Chang, Tzu-Li Lee, Yu-Ching Lee, Yih-Ching Wang
  • Patent number: 11955154
    Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
  • Patent number: 11956541
    Abstract: A control method of a driving mechanism is provided, including: the driving mechanism provides a first electrical signal from a control assembly to the driving mechanism to move the movable portion into an initial position relative to the fixed portion, wherein the control assembly includes a control unit and a position sensing unit; the status signal of an inertia sensing unit is read; the control unit sends the status signal to the control unit to calculate a target position; the control unit provides a second electrical signal to the driving assembly according to the target position for driving the driving assembly; a position signal is sent from the position sensing unit to the control unit; the control unit provides a third electric signal to the driving assembly to drive the driving assembly according the position signal.
    Type: Grant
    Filed: January 26, 2023
    Date of Patent: April 9, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chen-Hsien Fan, Sung-Mao Tsai, Yueh-Lin Lee, Yu-Chiao Lo, Mao-Kuo Hsu, Ching-Chieh Huan, Yi-Chun Cheng