Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.

Abstract: Methods, systems, an apparatus, including computer programs encoded on a storage device, for tracking human movement in video images. A method includes obtaining a first image of a scene captured by a camera; identifying a bounding box around a human detected in the first image; determining a scale amount that corresponds to a size of the bounding box; obtaining a second image of the scene captured by the camera after the first image was captured; and detecting the human in the second image based on both the first image scaled by the scale amount and the second image scaled by the scale amount. Detecting the human in the second image can include identifying a second scaled bounding box around the human detected in the second image scaled by the scale amount.

Abstract: This invention provides a carrier or submount for high power devices packaging and a method for forming the carrier or submount. The carrier comprises a thermal conductive ceramic substrate, a patterned adhesion layer on the substrate, a heat dissipation layer on the patterned adhesion layer, a conformal cover layer enclosing the heat dissipation layer and the adhesion layer, a diffusion barrier layer on the conformal cover layer, and an eutectic bonding layer on the diffusion barrier layer. The substrate includes a first region for bonding high power device, a second region for wire-bonding, and a third region for heat sink. The first region and second region are on a first surface of the substrate, and the third region is one the second surface, opposite to the first surface, of the substrate.

Abstract: A trimming method is provided. The trimming method includes the following steps. A first wafer including a substrate and a device layer over a first side of the substrate is provided. The first wafer is bonded to a second wafer with the first side of the substrate facing toward the second wafer. An edge trimming process is performed to remove a trimmed portion of the substrate from a second side opposite to the first side vertically downward toward the first side in a first direction along a perimeter of the substrate, wherein the edge trimming process results in the substrate having a flange pattern laterally protruding from the device layer and laterally surrounding an untrimmed portion of the substrate along a second direction perpendicular to the first direction.

Abstract: Embodiments of the present disclosure relate to a FinFET device having gate spacers with reduced capacitance and methods for forming the FinFET device. Particularly, the FinFET device according to the present disclosure includes gate spacers formed by two or more depositions. The gate spacers are formed by depositing first and second materials at different times of processing to reduce parasitic capacitance between gate structures and contacts introduced after epitaxy growth of source/drain regions.

Abstract: Disclosed is an electronic device including a device body and an antenna module. The antenna module includes a conductive element and at least one antenna element. The conductive element includes a main body portion and at least one assembly portion connected with each other. The at least one assembly portion is assembled on the device body. The at least one antenna element is disposed on the device body and coupled with the conductive element to excite a first resonance mode. The at least one assembly portion overlaps the at least one antenna element in the length direction of the main body portion.

Abstract: A method of provisioning LED fixtures in a wireless network includes: detecting nonvisible light emitted by each of the LED fixtures, using a portable wireless electronic device that comes into range of each of the LED fixtures one at a time; extracting, from the detected nonvisible light for each of the LED fixtures, a unique node ID assigned to each of the LED fixtures; and provisioning each of the LED fixtures into the wireless network, based on the unique ID extracted from the detected nonvisible light for each of the LED fixtures. Embodiments of the LED fixtures and a portable wireless electronic device used as part of the provisioning method are also described.

Abstract: Provided is a graphene-based coating suspension comprising multiple graphene sheets, thin film coating of an anti-corrosive pigment or sacrificial metal deposited on graphene sheets, and a binder resin dissolved or dispersed in a liquid medium, wherein the multiple graphene sheets contain single-layer or few-layer graphene sheets selected from a pristine graphene material having essentially zero % of non-carbon elements, or a non-pristine graphene material having 0.001% to 47% by weight of non-carbon elements wherein the non-pristine graphene is selected from graphene oxide, reduced graphene oxide, graphene fluoride, graphene chloride, graphene bromide, graphene iodide, hydrogenated graphene, nitrogenated graphene, doped graphene, chemically functionalized graphene, or a combination thereof. The invention also provides a process for producing this coating suspension. Also provided is an object or structure coated at least in part with such a coating.

Abstract: A memory device includes a plurality of memory elements. The memory device additionally includes a first current mirror that when in operation selectively outputs a first current to select a target memory cell as a first memory element of the plurality of memory elements. The memory device further includes a second current mirror that when in operation selectively outputs a second current to select the target memory cell as the first memory element of the plurality of memory elements.

Abstract: An electronic device includes a substrate, a first silicon transistor, a second silicon transistor and a first oxide semiconductor transistor. The first silicon transistor, the second silicon transistor and the first oxide semiconductor transistor are disposed on the substrate. The first silicon transistor has a first terminal electrically connected to a first voltage level, a second terminal and a control terminal. The second silicon transistor has a first terminal electrically connected to the second terminal of the first silicon transistor, a second terminal electrically connected to a second voltage level, and a control terminal electrically connected to the control terminal of the first silicon transistor. The first oxide semiconductor transistor has a first terminal electrically connected to the first terminal of the second silicon transistor. Wherein, a voltage value of the first voltage level is greater than a voltage value of the second voltage level.

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

Abstract: An electronic device includes a device body and an antenna module disposed in the device body and including a conductive structure and a coaxial cable including a core wire, a shielding layer wrapping the core wire, and an outer jacket wrapping the shielding layer. The conductive structure includes a structure body and a slot formed on the structure body and penetrating the structure body in a thickness direction of the structure body. A section of the shielding layer extends from the outer jacket and is connected to the structure body. A physical portion of the structure body and the section of the shielding layer are respectively located on two opposite sides of the slot in a width direction of the slot. A section of the core wire extends from the section of the shielding layer and overlaps the slot and the physical portion in the thickness direction.

Abstract: This invention provides a carrier or submount for high power devices packaging and a method for forming the carrier or submount. The carrier comprises a thermal conductive ceramic substrate, a patterned adhesion layer on the substrate, a heat dissipation layer on the patterned adhesion layer, a conformal cover layer enclosing the heat dissipation layer and the adhesion layer, a diffusion barrier layer on the conformal cover layer, an eutectic bonding layer on the diffusion barrier layer, and a dissipation ceramic substrate with an L-shape bonding conductor, wherein one end of the L-shape bonding conductor bonds to the power device and the other end bonds to the conformal cover layer at the second region. The substrate includes a first region for bonding high power device, a second region for wire-bonding, and a third region for heat sink. The first region and second region are on a first surface of the substrate, and the third region is one the second surface, opposite to the first surface, of the substrate.

Abstract: A user equipment (UE) may make a joint decision of adaptive receive diversity (ARD) and adaptive transmit diversity (ATD) configurations, including transmit (Tx) and receive (Rx) antennas selection and/or blanking based on downlink (DL) and uplink (UL) traffic conditions. The UE may disable at least one Tx chain for a transmission of a codebook-based sounding reference signal (SRS) (SRS-CB) based on one or more of at least one DL traffic condition or at least one UL traffic condition, and transmit, to a base station, upon disabling the at least one Tx chain, the SRS-CB via an antenna associated with at least one active Tx chain.

Abstract: An aerosol generation device includes a first housing including an inner accommodating space and an opening exposing the inner accommodating space to an outside of the first housing; a second housing including an inner space and coupled to the first housing with a fastening portion; a battery inserted into the inner space of the second housing and having a part exposed to an outside of the second housing; a case into which the second housing is inserted, the case covering at least one of the first housing or the second housing; and a cap coupled to the first housing and covering the first housing, wherein the case covers the part of the battery exposed to the outside of the second housing.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin, a second fin and a third fin therebetween. A first insulating structure includes a first insulating layer formed between the first and third fins, a capping structure covering the first insulating layer, a first insulating liner covering sidewall surfaces of the first insulating layer and the capping structure and a bottom surface of the first insulating layer, and a second insulating liner formed between the first insulating liner and the first fin and between the first insulating liner and the third fin. The second insulating structure includes a second insulating layer formed between the second fin and the third fin and a third insulating liner formed between the second insulating layer and the second fin and between the second insulating layer and the third fin.

Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.

Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.

Abstract: A power provider includes: first, second, and third inductors; a first transistor connected to the second inductor; a second transistor connected to the third inductor; and a power integrated chip (IC) including input terminals connected to the first, second, and third inductors, and an output terminal connected to a power line. The power provider may supply the power voltage using the first inductor and the power IC when power current is less than a first reference value, supply the power voltage using the second inductor, the first transistor, and the power IC when the power current is greater than the first reference value and less than a second reference value, and supply the power voltage using the second and third inductors, the first and second transistors, and the power IC when the power current is greater than the second reference value.

Abstract: A semiconductor device is manufactured by modifying an electromagnetic field within a deposition chamber. In embodiments in which the deposition process is a sputtering process, the electromagnetic field may be modified by adjusting a distance between a first coil and a mounting platform. In other embodiments, the electromagnetic field may be adjusted by applying or removing power from additional coils that are also present.