Abstract: The present application discloses a semiconductor structure and methods for manufacturing semiconductor structures. The semiconductor structure includes a plurality of bottom dies and a top die stacked on the bottom dies. The bottom dies receive power supplies through tiny through silicon vias (TSVs) formed in backside substrates of the bottom dies, while the top die receives power supplies through dielectric vias (TDVs) formed in a dielectric layer that covers the bottom dies. By enabling backside power delivery to the bottom die, more space can be provided for trace routing between stacked dies. Therefore, greater computation capability can be achieved within a smaller chip area with less power loss.

Abstract: Methods, systems, and apparatuses can comprise a first device in a wireless communication system receiving configuration of one or more first sidelink resource pools for at least sidelink data transmission and configuration of one or more second sidelink resource pools for sidelink reference signal transmission, receiving a Downlink Control Information (DCI) for sidelink, wherein the DCI comprises a resource pool index corresponding to one sidelink resource pool, determining the DCI for scheduling sidelink data transmission or sidelink reference signal transmission based on at least the resource pool index or the one sidelink resource pool, acquiring or determining fields or information in the DCI based on the determination that the DCI is for scheduling sidelink data transmission or sidelink reference signal transmission, determining a sidelink resource based on the acquired or determined fields, or the information in the DCI, and performing a sidelink transmission on the sidelink resource in the one sidelin

Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.

Abstract: A vehicle water-cooling heat sink plate having fin sets with different fin pitch distances is provided. The vehicle water-cooling heat sink plate includes a heat-dissipating plate body and three fin sets. The heat-dissipating plate body has a first heat-dissipating surface and a second heat-dissipating surface that are opposite to each other, the first heat-dissipating surface is used for contacting three traction inverter power component sets, and the second heat-dissipating surface is used for contacting a cooling fluid. The second heat-dissipating surface of the heat-dissipating plate body along a flow direction of the cooling fluid is divided into three heat-dissipating areas which are spaced apart from each other and have the same size, and the three heat-dissipating areas respectively correspond to three projection areas that are respectively generated by the three traction inverter power component sets.

Abstract: A cutting fluid digital monitoring and management system and method are provided, applicable to a computer numerical control (CNC) machining device. The CNC machining device has a cutting fluid tank configured to accommodate a cutting fluid. The cutting fluid digital monitoring and management system includes: a detection tank, configured to extract a cutting fluid from the cutting fluid tank through a motor and an electrically controlled water valve; a concentration sensing module, a pH sensing module, a water hardness sensing module, and a temperature sensing module, respectively configured to obtain a concentration, a pH value, a hardness, and a temperature of the cutting fluid; a processing module, configured to generate a monitoring integration value, compare the monitoring integration value with a standard model, and generate an adjustment signal; and an adjustment module, configured to actively adjust a variable parameter of the cutting fluid according to the adjustment signal.

Abstract: The present invention discloses a buckle connector connecting a main board and a sub-board. The buckle connector includes a first connecting portion and a second connecting portion. The first connecting portion mainly provides a first coupling member and the second connecting portion mainly provides a second coupling member. The first connecting portion and the second connecting portion are disposed on the same plane by coupling the first coupling member and the second coupling member when the first connecting portion moves to the second connecting portion in one direction.

Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.

Abstract: A physical analysis method, a sample for physical analysis and a preparing method thereof are provided. The preparing method of the sample for physical analysis includes: providing a sample to be inspected; and forming a contrast enhancement layer on a surface of the sample to be inspected. The contrast enhancement layer includes a plurality of first material layers and a plurality of second material layers stacked upon one another. The first material layer and the second material layer are made of different materials. Each one of the first and second material layers has a thickness that does not exceed 0.1 nm. In an image captured by an electron microscope, a difference between an average grayscale value of a surface layer image of the sample to be inspected and an average grayscale value of an image of the contrast enhancement layer is at least 50.

Abstract: An image sensor device has a first number of first pixels disposed in a substrate and a second number of second pixels disposed in the substrate. The first number is substantially equal to the second number. A light-blocking structure disposed over the first pixels and the second pixels. The light-blocking structure defines a plurality of first openings and second openings through which light can pass. The first openings are disposed over the first pixels. The second openings are disposed over the second pixels. The second openings are smaller than the first openings. A microcontroller is configured to turn on different ones of the second pixels at different points in time.

Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.

Abstract: A method of manufacturing a memory device includes providing a substrate and sequentially forming a stack layer and a hard mask layer on the substrate. The method includes forming a first patterned mandrel and a plurality of second patterned mandrels on the hard mask layer, wherein the first patterned mandrel is adjacent to and spaced apart from an end of the second patterned mandrels in the first direction. The method further includes using the first patterned mandrel and the second patterned mandrels as masks, patterning the hard mask layer and the stack layer sequentially to form a dummy structure and a plurality of word lines separated from each other on the substrate. A portion of the stack layer corresponding to the first mandrel is formed into the dummy structure, and a portion of the stack layer corresponding to the second patterned mandrels is formed into the word lines.

Abstract: A dumbbell main body includes two side boards, a connecting shaft, a rotating unit and a fastener. Each of the two side boards includes a containing space, a side-board upper chute, a side-board lower chute, a plurality of fastening holes and two fastening blocks. One of the fastening blocks is located above the other fastening blocks. Two ends of the connecting shaft are respectively connected to the two side boards. The rotating unit includes two rotating rings, four connecting boards, four sliding rods and a horizontal connecting board. The two rotating rings are respectively connected to two ends of the connecting shaft. The four connecting boards are respectively connected to the two rotating rings, wherein two of the connecting boards are located above the other two connecting boards. The four sliding rods are respectively disposed at the four connecting rods.

Abstract: A method forming a grating device includes: providing a substrate; entering the substrate into a process chamber; and depositing a grating material on the substrate to form a grating material layer on the substrate. A refractive index of the grating material gradually changes during depositing the grating material in the process chamber. The grating material layer includes a varying refractive index.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.

Abstract: A sample analyzing method and a sample preparing method are provided. The sample analyzing method includes a sample preparing step, a placing step, and an analyzing step. The sample preparing step includes an obtaining step implemented by obtaining an identification information; and a marking and placing step implemented by placing a sample carrying component having a sample disposed thereon into a marking equipment, allowing the marking equipment to utilize the identification information to form an identification structure on the sample carrying component, and placing the sample carrying component into one of the accommodating slots according to the identification information. The placing step is implemented by taking out the sample carrying component from one of the accommodating slots and placing the sample carrying component into an electron microscope equipment. The analyzing step is implemented by utilizing the electron microscope equipment to photograph the sample to generate an analyzation image.

Abstract: A lever-operated latch device includes an assembly of a case body, an actuation body mounted on the case body, a linking member and a slide body. The actuation body has a free end and a pivoted end pivotally connected with the case body in cooperation with elastic members. The free end of the actuation body is formed with two protruding arms and an opening section positioned between the protruding arms. An operation section is disposed in the opening section. The linking member has a first end pivotally connected with the free end of the actuation body (or the operation section) and a second end connected with the slide body. When an operator presses the operation section, the actuation body is permitted to move from a closed position to an opened position so as to drive the linking member and the slide body to move.

Abstract: An ambient light sensor includes a substrate, a metasurface disposed on the substrate, and an aperture layer disposed on the substrate. The metasurface includes a plurality of nanostructures and a filling layer laterally surrounding the plurality of nanostructures. The aperture layer laterally separates the metasurface into a plurality of sub-meta groups.

Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.

Abstract: In various examples, calibration techniques for interior depth sensors and image sensors for in-cabin monitoring systems and applications are provided. An intermediary coordinate system may be generated using calibration targets distributed within an interior space to reference 3D positions of features detected by both depth-perception and optical image sensors. Rotation-translation transforms may be determined to compute a first transform (H1) between the depth-perception sensor's 3D coordinate system and the 3D intermediary coordinate system, and a second transform (H2) between the optical image sensor's 2D coordinate system and the intermediary coordinate system. A third transform (H3) between the depth-perception sensor's 3D coordinate system and the optical image sensor's 2D coordinate system can be computed as a function of H1 and H2. The calibration targets may comprise a structural substrate that includes one or more fiducial point markers and one or more motion targets.

Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.