Patents by Inventor Chun-Yu Chen

Chun-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180109105
    Abstract: An electrostatic discharge (ESD) protection circuit for providing ESD paths between a signal pad and a first or second power rail includes a first ESD protection module and a second ESD protection module. The first ESD protection module is coupled between the signal pad and the first power rail, and includes at least two first diodes and a first resistor. The first diodes are stacked with each other, and one of the first diodes is electrically connected with the first resistor in parallel. The second ESD protection module is coupled between the signal pad and the second power rail, and includes at least two second diodes and a second resistor. The second diodes are stacked with each other, and one of the second diodes is electrically connected with the second resistor in parallel. The signal pad is coupled between the stacked first diodes and the stacked second diodes.
    Type: Application
    Filed: February 13, 2017
    Publication date: April 19, 2018
    Inventors: Chun-Yu LIN, Chun-Yu CHEN
  • Patent number: 9912844
    Abstract: A video signal output system includes a first video chip and a second video chip. The first video chip includes a first video signal output circuit and a simulation signal generating circuit. The simulation signal generating circuit outputs a first simulation signal and a second simulation signal. The second video chip includes a second video signal output circuit. The first video signal output circuit generates a first horizontal synchronization signal according to the first simulation signal, and generates a first vertical synchronization signal according to the second simulation signal. The second video signal output circuit generates a second horizontal synchronization signal according to the first simulation signal, and generates a second vertical synchronization signal according to the second simulation signal.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: March 6, 2018
    Assignee: MStar Semiconductor, Inc.
    Inventor: Chun-Yu Chen
  • Publication number: 20180055432
    Abstract: A blood glucose monitoring device includes a container, blood glucose test strips and a glucometer. The container includes a body and a cap. The cap or the body has thereon a rewritable signal component preconfigured with a test strip information. The test strip information includes traceability of the blood glucose test strips. The rewritable signal component sends by wireless communication technology an electronic signal carrying the test strip information. The glucometer includes a casing, processing module built-in with a comparison data, control panel, test slot, and signal processing component. The signal processing component receives the electronic signal of the container by the wireless communication technology. The processing module determines whether the test strip information matches the comparison data and creates a container-opened message when the determination is affirmative, thereby allowing the blood glucose test strips to be for use by the glucometer.
    Type: Application
    Filed: July 20, 2017
    Publication date: March 1, 2018
    Inventor: CHUN-YU CHEN
  • Patent number: 9899498
    Abstract: A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30.
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: February 20, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tien-Chen Chan, Yi-Fan Li, Yen-Hsing Chen, Chun-Yu Chen, Chung-Ting Huang, Zih-Hsuan Huang, Ming-Hua Chang, Yu-Shu Lin, Shu-Yen Chan
  • Patent number: 9895329
    Abstract: Disclosed herein are novel formyl peptide receptor 1 (FPR1) antagonists and their uses in manufacturing medicaments for the treatment and/or prophylaxis of diseases and/or disorders mediated by FPR1.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: February 20, 2018
    Inventors: Tsong-Long Hwang, Yung-Fong Tsai, Chun-Yu Chen, Liang-Mou Kuo, Yuan-Bin Cheng, Chih-Hsin Wang, Fang-Rong Chang, Yang-Chang Wu
  • Publication number: 20180021861
    Abstract: A drill structure includes a shank part and a flute part arranged on one end of the shank part. A chisel edge is formed on the front end of the flute part and two drill blades with tilt directions toward the shank part are formed on the two sides of the chisel edge. Every drill blade includes a primary relief surface with a cutting edge and a secondary relief surface with a knife-back edge. At least one assist relief surfaces is formed on the inner wall of one of the two helical grooves and an included angle is between the assist relief surface and the horizontal plane. The assist relief surface is connected with the cutting edge of one drill blade and portion of the knife-back edge of another drill blade.
    Type: Application
    Filed: June 7, 2017
    Publication date: January 25, 2018
    Inventors: Sung-Hao CHIEN, Li-Yi CHAO, Feng-Yu LIN, Ming-Yuan ZHAO, Chun-Yu CHEN
  • Publication number: 20180019324
    Abstract: A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30.
    Type: Application
    Filed: May 9, 2017
    Publication date: January 18, 2018
    Inventors: Tien-Chen Chan, Yi-Fan Li, Yen-Hsing Chen, Chun-Yu Chen, Chung-Ting Huang, Zih-Hsuan Huang, Ming-Hua Chang, Yu-Shu Lin, Shu-Yen Chan
  • Publication number: 20170331985
    Abstract: A video signal output system includes a first video chip and a second video chip. The first video chip includes a first video signal output circuit and a simulation signal generating circuit. The simulation signal generating circuit outputs a first simulation signal and a second simulation signal. The second video chip includes a second video signal output circuit. The first video signal output circuit generates a first horizontal synchronization signal according to the first simulation signal, and generates a first vertical synchronization signal according to the second simulation signal. The second video signal output circuit generates a second horizontal synchronization signal according to the first simulation signal, and generates a second vertical synchronization signal according to the second simulation signal.
    Type: Application
    Filed: December 5, 2016
    Publication date: November 16, 2017
    Inventor: Chun-Yu Chen
  • Publication number: 20170209942
    Abstract: A drill structure includes a shank part and a flute part arranged on one end of the shank part. A chisel edge is formed on the front end of the flute part and two drill blades with tilt directions toward the shank part are symmetrically formed on the two sides of the chisel edge. Every drill blade includes: a primary relief surface with a cutting edge, a first connecting edge and a first chamfering edge, a secondary relief surface with a knife-back edge, a second connecting edge, a second chamfering edge and an outer edge, and an assist relief surface. The second connecting edge joins to the first connecting edge, and the second chamfering edge connects with the first chamfering edge. The assist relief surface, which tilts toward the shank part the, is extend from the first chamfering edge and the second chamfering edge. This drill structure can improve the surface finish of the drilling hole.
    Type: Application
    Filed: January 20, 2017
    Publication date: July 27, 2017
    Inventors: Sung-Hao CHIEN, Li-Yi CHAO, Feng-Yu LIN, Ming-Yuan ZHAO, Chun-Yu CHEN
  • Patent number: 9680022
    Abstract: A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: June 13, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tien-Chen Chan, Yi-Fan Li, Yen-Hsing Chen, Chun-Yu Chen, Chung-Ting Huang, Zih-Hsuan Huang, Ming-Hua Chang, Yu-Shu Lin, Shu-Yen Chan
  • Patent number: 9678831
    Abstract: The present invention discloses an error correction method applied to a memory device, wherein the memory device has a plurality of pages. The error correction method includes: sequentially retrieving data of a plurality of first sectors of a first page of the pages in response to a first read command; performing a first error correction by an error correction module during retrieval the data of the first page; producing a second read command when the data of the first sectors of the first page are all retrieved; and starting to sequentially retrieve data of a plurality of second sectors of a second page of the pages in response to the second read command after the data of the first sectors of the first page are all retrieved.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: June 13, 2017
    Assignee: SILICON MOTION, INC.
    Inventors: Tuan-Chieh Wang, Chi-Chih Kuan, Chun-Yu Chen, Mong-Ling Chiao
  • Patent number: 9660086
    Abstract: The present invention provides a fin-shaped field effect transistor (FinFET), comprises: a substrate having a fin structure; a plurality trenches formed on the fin structure with an alloy grown in the trenches; a gate structure on the fin structure perpendicular to an extending direction of the fin structure in-between the plurality of trenches; and an amorphous layer on a surface of the fin structure exposed by the gate structure and disposed in-between the gate structure and the alloy. The invention also provides a manufacturing method of a fin-shaped field effect transistor (FinFET).
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: May 23, 2017
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Chun-Yu Chen, Chung-Ting Huang, Ming-Hua Chang, Tien-Chen Chan, Yen-Hsing Chen, Hsin-Chang Wu
  • Publication number: 20170116948
    Abstract: A display apparatus and a method for driving pixel thereof are provided. The display apparatus includes a source driver, a plurality of data lines and a plurality of pixels. The source driver receives a polarity signal and a frame switching signal and has a plurality of data channels. The data channels alternately provide a plurality of first pixel voltages with a first drive capability and a plurality of second pixel voltages with a second drive capability according to the polarity signal. Each of the data channels alternatively outputs the corresponding first pixel voltage and the corresponding second pixel voltage. The data lines are coupled to the source driver to receive the first pixel voltages and the second pixel voltages. The pixels are coupled to the data lines to receive the corresponding first pixel voltage or the corresponding second pixel voltage.
    Type: Application
    Filed: March 3, 2016
    Publication date: April 27, 2017
    Inventors: Chun-Kuei WEN, Chun-Yu CHEN, Yu-Ting HUANG, Hung-Min SHIH
  • Publication number: 20170066063
    Abstract: A drill structure includes a shank part and a flute part. A chisel edge is formed on the front end of the flute part and two primary relief faces with tile directions toward the shank part are symmetrically formed on the two sides of the chisel edge. Each primary relief face has a cutting edge, a knife-back edge, and an outer edge. The outer edges are respectively helically extended around the periphery of the flute part to form two helical cutting edges and two helical grooves. Two assist relief faces are respectively formed on the inner walls of the two helical grooves, and every assist relief face is connected with the cutting edge of one primary relief face and portion of the knife-back edge of another primary relief face. The drill structure can decrease the thickness of the chisel edge, reduces the resistance during drilling, and increases the life.
    Type: Application
    Filed: January 7, 2016
    Publication date: March 9, 2017
    Inventors: Nick Sung-Hao CHIEN, Li-Yi CHAO, Feng-Yu LIN, Ming-Yuan ZHAO, Chun-Yu CHEN
  • Publication number: 20170047439
    Abstract: The present invention provides a fin-shaped field effect transistor (FinFET), comprises: a substrate having a fin structure; a plurality trenches formed on the fin structure with an alloy grown in the trenches; a gate structure on the fin structure perpendicular to an extending direction of the fin structure in-between the plurality of trenches; and an amorphous layer on a surface of the fin structure exposed by the gate structure and disposed in-between the gate structure and the alloy. The invention also provides a manufacturing method of a fin-shaped field effect transistor (FinFET).
    Type: Application
    Filed: May 17, 2016
    Publication date: February 16, 2017
    Inventors: Chun-Yu Chen, Chung-Ting Huang, Ming-Hua Chang, Tien-Chen CHAN, Yen-Hsing CHEN, Hsin-Chang WU
  • Patent number: 9548338
    Abstract: A display substrate and a display device applying the same are provided. The display substrate includes a base plate and a display structure. The display structure is disposed on the base plate and includes first region. The first region includes a first sub-pixel, a second sub-pixel and two third sub-pixels. One of the two third sub-pixels has a first light emitting region having a first end point and a second end point. The other one of the two third sub-pixels has a second light emitting region having a third end point and a fourth end point. The first sub-pixel has a third light emitting region and the second sub-pixel has a fourth light emitting region. The third light emitting region and the fourth light emitting region are inside a quadrilateral region enclosed by the first, second, third and fourth end points.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: January 17, 2017
    Assignee: INNOLUX CORPORATION
    Inventors: Yi-Hua Hsu, Chien-Hsiang Huang, Chun-Yu Chen
  • Publication number: 20160358984
    Abstract: A display substrate and a display device applying the same are provided. The display substrate includes a base plate and a display structure. The display structure is disposed on the base plate and includes first region. The first region includes a first sub-pixel, a second sub-pixel and two third sub-pixels. One of the two third sub-pixels has a first light emitting region having a first end point and a second end point. The other one of the two third sub-pixels has a second light emitting region having a third end point and a fourth end point. The first sub-pixel has a third light emitting region and the second sub-pixel has a fourth light emitting region. The third light emitting region and the fourth light emitting region are inside a quadrilateral region enclosed by the first, second, third and fourth end points.
    Type: Application
    Filed: August 19, 2016
    Publication date: December 8, 2016
    Inventors: Yi-Hua Hsu, Chien-Hsiang Huang, Chun-Yu Chen
  • Publication number: 20160328012
    Abstract: The present invention provides a status switching method applied to a slave device. The status switching method includes: receiving a command wrapper from a host device; receiving a status query command corresponding to the command wrapper from the host device; transmitting a status wrapper to the host device in response to the status query command; and refusing to enter a low-power status corresponding to a switch status request when the switch status request is received during a specific period, wherein the specific period starts when the command wrapper is received and ends when the status wrapper is transmitted.
    Type: Application
    Filed: July 22, 2016
    Publication date: November 10, 2016
    Inventors: Yao-Chung HSU, Tuan-Chieh WANG, Chi-Chih KUAN, Chun-Yu CHEN
  • Patent number: D777028
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 24, 2017
    Inventor: Chun-Yu Chen
  • Patent number: D791947
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: July 11, 2017
    Inventor: Chun-Yu Chen