Abstract: A method for fabricating a semiconductor device includes the steps of first forming a fin-shaped structure on a substrate, forming a dielectric layer surrounding the fin-shaped structure, performing an anneal process to transform the dielectric layer into a shallow trench isolation (STI), removing the fin-shaped structure to form a trench, and forming a stack structure in the trench. Preferably, the stack structure includes a first semiconductor layer on the fin-shaped structure and a second semiconductor layer on the first semiconductor layer and the first semiconductor layer and the second semiconductor layer include different materials.

Abstract: Disclosed are systems and methods to detect and identify vehicular anomalies. Techniques to detect and identify the vehicular anomalies include receiving signals from various sensors, grouping the signals into detection sets, detecting anomalies by a comparison to vehicle behavior models, and cross-referencing the detection sets with each other to narrow down and identify the source of the anomaly. The detection sets may be grouped such that facets of vehicle maneuverability are captured and cover causal relations between different maneuverability mechanisms.

Abstract: A head-mounted display includes a host, two installing bases, two connection elements and a head belt. The host has two installing grooves and two opposite sidewalls, and the two installing grooves respectively penetrate through the two sidewalls. The two installing bases are disposed in the host, wherein each installing base has an abutting portion and an installing portion connected to each other. The abutting portion of each installing base abuts against an inner edge of the corresponding sidewall, and the installing portion of each installing base is exposed outside of the host through the corresponding installing groove. The two connection elements are respectively installed onto the two installing portions of the two installing bases. The head belt has two opposite connection portions, and the two connection portions are respectively connected to the two connection elements.

Abstract: A method for fabricating a high-voltage (HV) transistor is provided. The method includes providing a substrate, having a first isolation structure and a second isolation structure in the substrate and a recess in the substrate between the first and second isolation structures. Further, a hydrogen annealing process is performed over the recess. A sacrificial dielectric layer is formed on the recess. The sacrificial dielectric layer is removed, wherein a portion of the first and second isolation structures is also removed. A gate oxide layer is formed in the recess between the first and second isolation structures after the hydrogen annealing process.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming recesses adjacent to two sides of the gate structure, forming a buffer layer in the recesses, forming a first linear bulk layer on the buffer layer, forming a second linear bulk layer on the first linear bulk layer, forming a bulk layer on the second linear bulk layer, and forming a cap layer on the bulk layer.

Abstract: The present invention relates to an exhaust gas purification system comprising two catalytic sub-systems, wherein the first catalytic sub-system is for conversion of NOx, HC, CO and optionally particulate matter, and the second sub-system is for conversion of CO. The second sub-system locates at the downstream of the first catalytic sub-system. An air injection is positioned between the first catalytic sub-system and second catalytic sub-system.

Abstract: The current disclosure describes techniques for forming a gate-all-around device where semiconductor layers are released by etching out the buffer layers that are vertically stacked between semiconductor layers in an alternating manner. The buffer layers stacked at different vertical levels include different material compositions, which bring about different etch rates with respect to an etchant that is used to remove at least partially the buffer layers to release the semiconductor layers.

Abstract: A virtual reality positioning device including a casing, a plurality of lenses, and a plurality of optical positioning components is provided. The casing has a plurality of holes. The lenses are installed in the holes, respectively, where a field angle of each of the lenses is greater than or equal to 120 degrees and less than or equal to 160 degrees, and the lenses include convex lenses or Fresnel lenses. The optical positioning components are installed in the casing and aligned to the lenses, respectively. In addition, a virtual reality positioning system and manufacturing method of a virtual reality positioning device are provided.

Abstract: A method for providing driving assistance based on a HD map includes acquiring information such as position of a vehicle and timing, and acquiring a speed of the vehicle based on the manner of driving, and acquiring distance an intersection in front of the vehicle and information from a HD map such as traffic light intersection ahead. Deciding such as whether the vehicle can pass through the intersection based on the speed of the vehicle, intersection distance, and the traffic light information and prompting and/or controlling the vehicle if it is determined that passage through is not possible. A vehicle-mounted apparatus applying the method is also disclosed.

Abstract: A traffic safety control method is provided. The method includes obtaining first related information of a road when a vehicle is traveling on a road. Second related information is detected using a detecting device of the vehicle when the first related information indicates that there is the intersection in front of the vehicle on the road. The vehicle is controlled according to the first related information and the second related information.

Abstract: An driving assistant method is provided. The method includes identifying a type of a traffic line between a current lane in which a vehicle is located and an adjacent lane of the current lane. The type of the traffic line is used to determine whether or not the adjacent lane is an overtaking lane. An overtaking speed of the vehicle is calculated when the vehicle can overtake from the current lane to the adjacent lane. A prompt including the overtaking speed is issued once the overtaking speed is obtained.

Abstract: A traffic safety control method is provided. The method includes determining whether there is an intersection in front of a vehicle. When there is the intersection in front of the vehicle, a driving direction of the vehicle at the intersection is predicted according to a plurality of lane positions of the vehicle that are continuously obtained. A message is transmitted once the predicted driving direction is determined to be conflicting with a traffic rule of the intersection.

Abstract: A method for navigating and route planning based on a HD map and with reference to other electronic devices moving along a similar route includes setting a start location and an end location; planning at least one navigation route based on the start location and the end location; acquiring locations of own electronic device and of co-travelling external electronic devices based on the HD map; acquiring speeds of the external electronic devices and selecting those moving at low speed; identifying moving directions of the slow-speed target electronic devices; and re-planning and resetting the at least one navigation route when the moving directions of the target electronic devices intersected with a direction of the lane. An electronic device and a server applying the method are also disclosed.

Abstract: A display device includes an output circuit, a multiplexer, and a controller. The output circuit is configured to output a data voltage to an output pin. The multiplexer is configured to sequentially output the data voltage to different data lines according to a first multiplexing signal and a second multiplexing signal. The controller is configured to generate a control signal according to a variation of the data voltage to make the output pin output a default voltage level different from the data voltage corresponding to the data voltage.