Patents by Inventor Chung-Chuan Tseng
Chung-Chuan Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961866Abstract: A method of forming an image sensor includes forming a photodiode within a semiconductor substrate. The method further includes disposing an interconnect structure over the semiconductor substrate. The interconnect structure includes a contact etch stop layer (CESL) over the photodiode; and a plurality of dielectric layers over the CESL, wherein at least one dielectric layer of the plurality of dielectric layers comprises a low dielectric constant (low-k) material. The method further includes patterning at least the plurality of dielectric layers, wherein patterning at least the plurality of dielectric layers comprises defining an opening above an active region of the photodiode. The method further includes depositing a cap layer on sidewalls of the opening, wherein the cap layer includes a dielectric material having a higher moisture resistance than the low-k dielectric material.Type: GrantFiled: October 27, 2020Date of Patent: April 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chiao-Chi Wang, Chia-Ping Lai, Chung-Chuan Tseng
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Publication number: 20240055449Abstract: A semiconductor device includes: a photodiode formed in a substrate; and at least one transistor having a gate feature that comprises a first portion and a second portion coupled to an end of the first portion, the first portion disposed above and extending along a major surface of the substrate and the second portion extending from the major surface of the substrate into the substrate, wherein the photodiode and the at least one transistor at least partially form a pixel.Type: ApplicationFiled: August 9, 2023Publication date: February 15, 2024Inventors: Chen-Hsiang HUNG, Chung-Chuan TSENG, Li-Hsin CHU, Chia-Ping LAI
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Patent number: 11894411Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.Type: GrantFiled: November 28, 2022Date of Patent: February 6, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
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Publication number: 20230395595Abstract: A method of making a semiconductor device, includes: providing a first dielectric layer; sequentially forming a first metal layer, a dummy capacitor dielectric layer, and a second metal layer over the first dielectric layer; and using a single mask layer with two patterns to simultaneously recess two portions of the second metal layer so as to define a metal thin film of a resistor and a top metal plate of a capacitor.Type: ApplicationFiled: August 10, 2023Publication date: December 7, 2023Inventors: Chen-Hsiang HUNG, Li-Hsin CHU, Chia-Ping LAI, Chung-Chuan TSENG
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Publication number: 20230378218Abstract: Various embodiments of the present disclosure are directed towards methods for forming an image sensor in which a device layer overlies and has a different semiconductor material than a substrate and in which the device layer has high crystalline quality. Some embodiments of the methods include: epitaxially growing the device layer on the substrate; patterning the device layer to form a trench dividing the device layer into mesa structures corresponding to pixels; forming an inter-pixel dielectric layer filling the trench and separating the mesa structures; and forming photodetectors in the mesa structures. Other embodiments of the methods include: depositing the inter-pixel dielectric layer over the substrate; patterning the inter-pixel dielectric layer to form cavities corresponding to the pixels; epitaxially growing the mesa structures in the cavities; and forming the photodetectors in the mesa structures.Type: ApplicationFiled: August 8, 2023Publication date: November 23, 2023Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai, Szu-Chien Tseng, Yeh-Hsun Fang
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Publication number: 20230378234Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.Type: ApplicationFiled: August 4, 2023Publication date: November 23, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
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Patent number: 11784199Abstract: A semiconductor device includes: a photodiode formed in a substrate; and at least one transistor having a gate feature that comprises a first portion and a second portion coupled to an end of the first portion, the first portion disposed above and extending along a major surface of the substrate and the second portion extending from the major surface of the substrate into the substrate, wherein the photodiode and the at least one transistor at least partially form a pixel.Type: GrantFiled: October 4, 2022Date of Patent: October 10, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chen-Hsiang Hung, Chung-Chuan Tseng, Li-Hsin Chu, Chia-Ping Lai
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Publication number: 20230317743Abstract: A semiconductor device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes silicon. The second semiconductor structure is embedded in the first semiconductor structure, in which the second semiconductor structure has at least one convex portion and at least one concave portion. The convex portion and the concave portion are on at least one edge of the second semiconductor structure, and a shape of the concave portion includes rectangle, trapezoid, inverted trapezoid, or parallelogram. The second semiconductor structure includes germanium, elements of group III or group V, or combinations thereof. The convex portion of the second semiconductor structure has a top surface substantially coplanar with a top surface of the first semiconductor structure.Type: ApplicationFiled: June 5, 2023Publication date: October 5, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Zong-Jie WU, Chiao-Chi WANG, Chung-Chuan TSENG, Chia-Ping LAI
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Patent number: 11756955Abstract: A method of making a semiconductor device, includes: providing a first dielectric layer; sequentially forming a first metal layer, a dummy capacitor dielectric layer, and a second metal layer over the first dielectric layer; and using a single mask layer with two patterns to simultaneously recess two portions of the second metal layer so as to define a metal thin film of a resistor and a top metal plate of a capacitor.Type: GrantFiled: October 22, 2021Date of Patent: September 12, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chen-Hsiang Hung, Li-Hsin Chu, Chia-Ping Lai, Chung-Chuan Tseng
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Publication number: 20230261039Abstract: Capacitors for use in semiconductor devices including a plurality of first trenches in a first region of a substrate, the first trenches extending in a first direction, a plurality of second trenches in the first region of the substrate, the second trenches extending in a second direction other than the first direction, with the adjacent second trenches and first trenches cooperating to define protruding structures and island structures having an upper surface that is at or below a plane defined by a portion of an upper surface of a substrate surrounding the first region with a series of film pairs including a dielectric layer and a conductive layer formed in the first and second trenches and the protruding and island structures.Type: ApplicationFiled: April 25, 2023Publication date: August 17, 2023Inventors: Wen-Feng KUO, Chung-Chuan TSENG, Chia-Ping LAI
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Publication number: 20230246056Abstract: A semiconductor device with dummy and active pixel structures and a method of fabricating the same are disclosed. The semiconductor device includes a first pixel region with a first pixel structure, a second pixel region, surrounding the first pixel region, includes a second pixel structure adjacent to the first pixel structure and electrically isolated from the first pixel structure, and a contact pad region with a pad structure disposed adjacent to the second pixel region. The first pixel structure includes a first epitaxial structure disposed within a substrate and a first capping layer disposed on the first epitaxial structure. The second pixel structure includes a second epitaxial structure disposed within the substrate and a second capping layer disposed on the second epitaxial structure. Top surfaces of the first and second epitaxial structures are substantially coplanar with each other. The first and second epitaxial structures includes a same semiconductor material.Type: ApplicationFiled: April 10, 2023Publication date: August 3, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Wei CHEN, Chung-Chuan Tseng, Chiao-Chi Wang, Chia-Ping Lai
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Patent number: 11670650Abstract: A semiconductor device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes silicon. The second semiconductor structure is embedded in the first semiconductor structure, in which the second semiconductor structure has at least one convex portion and at least one concave portion. The convex portion and the concave portion are on at least one edge of the second semiconductor structure, and a shape of the concave portion includes rectangle, trapezoid, inverted trapezoid, or parallelogram. The second semiconductor structure includes germanium, elements of group III or group V, or combinations thereof.Type: GrantFiled: June 5, 2020Date of Patent: June 6, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Zong-Jie Wu, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
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Patent number: 11626442Abstract: Various embodiments of the present disclosure are directed towards methods for forming an image sensor in which a device layer overlies and has a different semiconductor material than a substrate and in which the device layer has high crystalline quality. Some embodiments of the methods include: epitaxially growing the device layer on the substrate; patterning the device layer to form a trench dividing the device layer into mesa structures corresponding to pixels; forming an inter-pixel dielectric layer filling the trench and separating the mesa structures; and forming photodetectors in the mesa structures. Other embodiments of the methods include: depositing the inter-pixel dielectric layer over the substrate; patterning the inter-pixel dielectric layer to form cavities corresponding to the pixels; epitaxially growing the mesa structures in the cavities; and forming the photodetectors in the mesa structures.Type: GrantFiled: August 10, 2020Date of Patent: April 11, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai, Szu-Chien Tseng, Yeh-Hsun Fang
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Patent number: 11626444Abstract: A semiconductor device with dummy and active pixel structures and a method of fabricating the same are disclosed. The semiconductor device includes a first pixel region with a first pixel structure, a second pixel region, surrounding the first pixel region, includes a second pixel structure adjacent to the first pixel structure and electrically isolated from the first pixel structure, and a contact pad region with a pad structure disposed adjacent to the second pixel region. The first pixel structure includes a first epitaxial structure disposed within a substrate and a first capping layer disposed on the first epitaxial structure. The second pixel structure includes a second epitaxial structure disposed within the substrate and a second capping layer disposed on the second epitaxial structure. Top surfaces of the first and second epitaxial structures are substantially coplanar with each other. The first and second epitaxial structures includes a same semiconductor material.Type: GrantFiled: August 27, 2020Date of Patent: April 11, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Wei Chen, Chung-Chuan Tseng, Chiao-Chi Wang, Chia-Ping Lai
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Publication number: 20230093001Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.Type: ApplicationFiled: November 28, 2022Publication date: March 23, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
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Patent number: 11587824Abstract: A method for manufacturing a semiconductor structure includes at least following steps. A device layer is formed on a first semiconductor substrate. The device layer is separated from the first semiconductor substrate. A dielectric layer is formed on a second semiconductor substrate. The device layer is bonded onto the dielectric layer.Type: GrantFiled: June 5, 2020Date of Patent: February 21, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Yu-Hsiang Tsai, Chung-Chuan Tseng, Chia-Wei Liu, Li-Hsin Chu
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Patent number: 11581400Abstract: A semiconductor structure includes a substrate having a trench array therein, wherein the trench array includes a plurality of outer trenches and a plurality of inner trenches, wherein each of the plurality of outer trenches has a width greater than a width of each of the plurality of inner trenches. The semiconductor structure further includes a capacitor material stack extending into the trench array.Type: GrantFiled: October 27, 2020Date of Patent: February 14, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Hsiang Tsai, Chung-Chuan Tseng, Chia-Ping Lai
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Publication number: 20230034661Abstract: A semiconductor device includes: a photodiode formed in a substrate; and at least one transistor having a gate feature that comprises a first portion and a second portion coupled to an end of the first portion, the first portion disposed above and extending along a major surface of the substrate and the second portion extending from the major surface of the substrate into the substrate, wherein the photodiode and the at least one transistor at least partially form a pixel.Type: ApplicationFiled: October 4, 2022Publication date: February 2, 2023Inventors: Chen-Hsiang HUNG, Chung-Chuan Tseng, Li-Hsin Chu, Chia-Ping Lai
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Patent number: 11545518Abstract: A method for fabricating an image sensor is described which includes forming an insulating layer on a semiconductor substrate and forming a recess in the semiconductor substrate and the insulating layer. An epitaxial structure is grown in the recess. A first polish treatment is then performed to the insulating layer and the epitaxial structure. The insulating layer is detected to obtain a signal intensity, and the signal intensity increases as a thickness of the insulating layer decreases. The first polish treatment stops when the signal intensity reaches a target value.Type: GrantFiled: August 11, 2020Date of Patent: January 3, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
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Publication number: 20220384503Abstract: A method includes following steps. A first III-V compound layer is epitaxially grown over a semiconductive substrate. The first III-V compound layer has an energy gap in a gradient distribution. A source/drain contact is formed over the first III-V compound layer. A gate structure is formed over the first III-V compound layer.Type: ApplicationFiled: August 9, 2022Publication date: December 1, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Ying WU, Li-Hsin CHU, Chung-Chuan TSENG, Chia-Wei LIU