Patents by Inventor Chung-Chuan Tseng
Chung-Chuan Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11515355Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.Type: GrantFiled: June 15, 2020Date of Patent: November 29, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LIMITEDInventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
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Publication number: 20220375972Abstract: Various embodiments of the present disclosure are directed towards methods for forming an image sensor in which a device layer overlies and has a different semiconductor material than a substrate and in which the device layer has high crystalline quality. Some embodiments of the methods include: epitaxially growing the device layer on the substrate; patterning the device layer to form a trench dividing the device layer into mesa structures corresponding to pixels; forming an inter-pixel dielectric layer filling the trench and separating the mesa structures; and forming photodetectors in the mesa structures. Other embodiments of the methods include: depositing the inter-pixel dielectric layer over the substrate; patterning the inter-pixel dielectric layer to form cavities corresponding to the pixels; epitaxially growing the mesa structures in the cavities; and forming the photodetectors in the mesa structures.Type: ApplicationFiled: August 4, 2022Publication date: November 24, 2022Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai, Szu-Chien Tseng, Yeh-Hsun Fang
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Patent number: 11488993Abstract: A semiconductor device includes: a photodiode formed in a substrate; and at least one transistor having a gate feature that comprises a first portion and a second portion coupled to an end of the first portion, the first portion disposed above and extending along a major surface of the substrate and the second portion extending from the major surface of the substrate into the substrate, wherein the photodiode and the at least one transistor at least partially form a pixel.Type: GrantFiled: September 14, 2020Date of Patent: November 1, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chen-Hsiang Hung, Chung-Chuan Tseng, Li-Hsin Chu, Chia-Ping Lai
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Patent number: 11476288Abstract: A method includes epitaxially growing a first III-V compound layer over a semiconductive substrate. A second III-V compound layer is epitaxially grown over the first III-V compound layer. A source/drain contact is formed over the second III-V compound layer. A gate structure is formed over the second III-V compound layer. A pattern is formed shielding the gate structure and the source/drain contact, in which a portion of the second III-V compound layer is free from coverage by the pattern.Type: GrantFiled: October 21, 2019Date of Patent: October 18, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chien-Ying Wu, Li-Hsin Chu, Chung-Chuan Tseng, Chia-Wei Liu
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Publication number: 20220271119Abstract: A method of manufacturing a capacitor including the operations of etching a plurality of primary trenches into a first region of a substrate, the primary trenches extending in a first direction, etching a plurality of secondary trenches into the first region of the substrate, the secondary trenches extending in a second direction other than the first direction, with the adjacent secondary trenches and adjacent primary trenches jointly defining an island structure having an upper surface that is recessed relative to an upper surface a surrounding substrate, and depositing a series of film pairs including a dielectric layer and a conductive layer.Type: ApplicationFiled: May 9, 2022Publication date: August 25, 2022Inventors: Wen-Feng KUO, Chung-Chuan TSENG, Chia-Ping LAI
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Patent number: 11329125Abstract: A capacitor comprises at least one primary trench in a substrate, extending in a first direction, and at least one secondary trench in the substrate, extending in a second direction different from the first direction. The capacitor further comprises a first dielectric material separating the substrate from the first capacitor plate of a plurality of capacitor plates, and a second dielectric material separating the first capacitor plate from a second capacitor plate of the plurality of capacitor plates, wherein the first dielectric material, the second dielectric material, the first capacitor plate and the second capacitor plate are at least partially within the at least one primary trench and the at least one secondary trench in the substrate.Type: GrantFiled: July 22, 2019Date of Patent: May 10, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wen-Feng Kuo, Chung-Chuan Tseng, Chia-Ping Lai
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Publication number: 20220052105Abstract: A method for fabricating an image sensor is described which includes forming an insulating layer on a semiconductor substrate and forming a recess in the semiconductor substrate and the insulating layer. An epitaxial structure is grown in the recess. A first polish treatment is then performed to the insulating layer and the epitaxial structure. The insulating layer is detected to obtain a signal intensity, and the signal intensity increases as a thickness of the insulating layer decreases. The first polish treatment stops when the signal intensity reaches a target value.Type: ApplicationFiled: August 11, 2020Publication date: February 17, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chiao-Chi WANG, Chung-Chuan TSENG, Chia-Ping LAI
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Publication number: 20220045109Abstract: Various embodiments of the present disclosure are directed towards methods for forming an image sensor in which a device layer overlies and has a different semiconductor material than a substrate and in which the device layer has high crystalline quality. Some embodiments of the methods include: epitaxially growing the device layer on the substrate; patterning the device layer to form a trench dividing the device layer into mesa structures corresponding to pixels; forming an inter-pixel dielectric layer filling the trench and separating the mesa structures; and forming photodetectors in the mesa structures. Other embodiments of the methods include: depositing the inter-pixel dielectric layer over the substrate; patterning the inter-pixel dielectric layer to form cavities corresponding to the pixels; epitaxially growing the mesa structures in the cavities; and forming the photodetectors in the mesa structures.Type: ApplicationFiled: August 10, 2020Publication date: February 10, 2022Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai, Szu-Chien Tseng, Yeh-Hsun Fang
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Publication number: 20210391378Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.Type: ApplicationFiled: June 15, 2020Publication date: December 16, 2021Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
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Patent number: 11127625Abstract: A method and structure for providing a semiconductor-on-insulator (SCOI) wafer having a buried low-K dielectric layer includes forming a device layer on a first semiconductor substrate. In various embodiments, at least a portion of the device layer is separated from the first semiconductor substrate, where the separating forms a cleaved surface on the separated portion of the device layer. In some examples, a patterned low-K dielectric layer is formed on a second semiconductor substrate. Thereafter, and in some embodiments, the separated portion of the device layer is bonded, along the cleaved surface, to the patterned low-K dielectric layer.Type: GrantFiled: October 7, 2019Date of Patent: September 21, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Hsiang Tsai, Chung-Chuan Tseng, Li Hsin Chu, Chia-Wei Liu
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Publication number: 20210272988Abstract: A semiconductor device with dummy and active pixel structures and a method of fabricating the same are disclosed. The semiconductor device includes a first pixel region with a first pixel structure, a second pixel region, surrounding the first pixel region, includes a second pixel structure adjacent to the first pixel structure and electrically isolated from the first pixel structure, and a contact pad region with a pad structure disposed adjacent to the second pixel region. The first pixel structure includes a first epitaxial structure disposed within a substrate and a first capping layer disposed on the first epitaxial structure. The second pixel structure includes a second epitaxial structure disposed within the substrate and a second capping layer disposed on the second epitaxial structure. Top surfaces of the first and second epitaxial structures are substantially coplanar with each other. The first and second epitaxial structures includes a same semiconductor material.Type: ApplicationFiled: August 27, 2020Publication date: September 2, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Wei CHEN, Chung-Chuan Tseng, Chiao-Chi Wang, Chia-Ping Lai
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Publication number: 20210098514Abstract: A semiconductor device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes silicon. The second semiconductor structure is embedded in the first semiconductor structure, in which the second semiconductor structure has at least one convex portion and at least one concave portion. The convex portion and the concave portion are on at least one edge of the second semiconductor structure, and a shape of the concave portion includes rectangle, trapezoid, inverted trapezoid, or parallelogram. The second semiconductor structure includes germanium, elements of group III or group V, or combinations thereof.Type: ApplicationFiled: June 5, 2020Publication date: April 1, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Zong-Jie WU, Chiao-Chi WANG, Chung-Chuan TSENG, Chia-Ping LAI
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Publication number: 20210074806Abstract: A semiconductor structure includes a substrate having a trench array therein, wherein the trench array includes a plurality of outer trenches and a plurality of inner trenches, wherein each of the plurality of outer trenches has a width greater than a width of each of the plurality of inner trenches. The semiconductor structure further includes a capacitor material stack extending into the trench array.Type: ApplicationFiled: October 27, 2020Publication date: March 11, 2021Inventors: Yu-Hsiang TSAI, Chung-Chuan TSENG, Chia-Ping LAI
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Publication number: 20210066366Abstract: A semiconductor device includes: a photodiode formed in a substrate; and at least one transistor having a gate feature that comprises a first portion and a second portion coupled to an end of the first portion, the first portion disposed above and extending along a major surface of the substrate and the second portion extending from the major surface of the substrate into the substrate, wherein the photodiode and the at least one transistor at least partially form a pixel.Type: ApplicationFiled: September 14, 2020Publication date: March 4, 2021Inventors: Chen-Hsiang HUNG, Chung-Chuan Tseng, Li-Hsin Chu, Chia-Ping Lai
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Publication number: 20210043675Abstract: A method of forming an image sensor includes forming a photodiode within a semiconductor substrate. The method further includes disposing an interconnect structure over the semiconductor substrate. The interconnect structure includes a contact etch stop layer (CESL) over the photodiode; and a plurality of dielectric layers over the CESL, wherein at least one dielectric layer of the plurality of dielectric layers comprises a low dielectric constant (low-k) material. The method further includes patterning at least the plurality of dielectric layers, wherein patterning at least the plurality of dielectric layers comprises defining an opening above an active region of the photodiode. The method further includes depositing a cap layer on sidewalls of the opening, wherein the cap layer includes a dielectric material having a higher moisture resistance than the low-k dielectric material.Type: ApplicationFiled: October 27, 2020Publication date: February 11, 2021Inventors: Chiao-Chi WANG, Chia-Ping LAI, Chung-Chuan TSENG
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Patent number: 10854658Abstract: An image sensor includes a photodiode within a semiconductor substrate and an interconnect structure over the semiconductor substrate. The interconnect structure includes a contact etch stop layer (CESL), a plurality of dielectric layers over the CESL and a plurality of metallization layers in the plurality of dielectric layers. At least one dielectric layer of the plurality of dielectric layers includes a low-k dielectric material. An opening is extended through the plurality of dielectric layers to expose a portion of the CESL above an active region of the photodiode. A cap layer is on sidewalls of the opening. The cap layer includes a dielectric material having a higher moisture resistance than the low-k dielectric material.Type: GrantFiled: July 9, 2019Date of Patent: December 1, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
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Patent number: 10847607Abstract: A method of forming a semiconductor structure includes etching a substrate to define a plurality of trench arrays in the substrate, wherein each trench array of the plurality of trench arrays includes an outer trench extending along a periphery of each trench array of the plurality of trench array and a plurality of inner trenches, the outer trench has a width greater than a width of each of the plurality of inner trenches. The method includes depositing a first conductive layer in each trench array of the plurality of trench arrays, and on a top surface of the substrate. The method includes depositing a dielectric layer over the first conductive layer. The method includes depositing a second conductive layer over the dielectric layer. The method includes patterning the second conductive layer, the dielectric layer and the first conductive layer to form a capacitor.Type: GrantFiled: January 23, 2020Date of Patent: November 24, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Hsiang Tsai, Chung-Chuan Tseng, Chia-Ping Lai
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Publication number: 20200303243Abstract: A method for manufacturing a semiconductor structure includes at least following steps. A device layer is formed on a first semiconductor substrate. The device layer is separated from the first semiconductor substrate. A dielectric layer is formed on a second semiconductor substrate. The device layer is bonded onto the dielectric layer.Type: ApplicationFiled: June 5, 2020Publication date: September 24, 2020Inventors: Yu-Hsiang TSAI, Chung-Chuan TSENG, Chia-Wei LIU, Li-Hsin CHU
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Patent number: 10777591Abstract: A semiconductor device includes: a photodiode formed in a substrate; and at least one transistor having a gate feature that comprises a first portion and a second portion coupled to an end of the first portion, the first portion disposed above and extending along a major surface of the substrate and the second portion extending from the major surface of the substrate into the substrate, wherein the photodiode and the at least one transistor at least partially form a pixel.Type: GrantFiled: January 29, 2018Date of Patent: September 15, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chen-Hsiang Hung, Chung-Chuan Tseng, Li-Hsin Chu, Chia-Ping Lai
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Patent number: 10679889Abstract: A method for manufacturing a semiconductor structure includes at least following steps. A device layer is formed on a first semiconductor substrate. The device layer is separated from the first semiconductor substrate. A dielectric layer is formed on a second semiconductor substrate. The device layer is bonded onto the dielectric layer.Type: GrantFiled: April 3, 2017Date of Patent: June 9, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Hsiang Tsai, Chung-Chuan Tseng, Chia-Wei Liu, Li-Hsin Chu