Patents by Inventor Chung Ko

Chung Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12142633
    Abstract: A semiconductor package includes a first die comprising an upper surface and a lower surface opposite to the upper surface. The first die includes a plurality of through-silicon vias (TSVs) penetrating through the first die. A second die is stacked on the upper surface of the first die. An interposer layer is disposed on the lower surface of the first die. An inductor is disposed in the interposer layer. The inductor comprises terminals directly coupled to the TSVs.
    Type: Grant
    Filed: June 12, 2023
    Date of Patent: November 12, 2024
    Assignee: MEDIATEK INC.
    Inventors: Zheng Zeng, Ching-Chung Ko, Kuei-Ti Chan
  • Publication number: 20240114336
    Abstract: In an approach to networking devices using an ephemeral mesh network, the system includes: a plurality of devices, each device of the plurality of devices further comprising a wireless interface to communicate with a mobile device; and a controller. The controller includes circuitry configured to connect to the mobile device; authenticate the mobile device; responsive to authenticating the mobile device, establishing a mesh network of the plurality of devices, wherein each light device connects to at least one other devices of the plurality of devices to create a mesh network; and responsive to disconnecting from the mobile device, dissolving the mesh network by disconnecting each device from the plurality of devices.
    Type: Application
    Filed: September 27, 2023
    Publication date: April 4, 2024
    Inventors: Robert W. HAMLIN, Rohan Patil, Che Chung Ko, Philip S. Gross
  • Publication number: 20240114562
    Abstract: In an approach to generating a wake-up advertisement to a remote device, a system includes: a computing device comprising communications circuitry, including an advertisement initiation circuitry; one or more computer processors; one or more non-transitory computer readable storage media; and instructions stored on the one or more non-transitory computer readable storage media for execution by at least one of the one or more computer processors. The instructions include: send one or more wake-up advertisements to one or more remote devices; receive one or more connection advertisements from the responding remote device; and responsive to receiving the one or more connection advertisements from the responding remote device, connect to the responding remote device.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Inventors: Robert W. HAMLIN, Philip S. GROSS, Che Chung KO
  • Publication number: 20240079444
    Abstract: A semiconductor package includes a first die comprising an upper surface and a lower surface opposite to the upper surface. The first die includes a plurality of through-silicon vias (TSVs) penetrating through the first die. A second die is stacked on the upper surface of the first die. An interposer layer is disposed on the lower surface of the first die. An inductor is disposed in the interposer layer. The inductor comprises terminals directly coupled to the TSVs.
    Type: Application
    Filed: June 12, 2023
    Publication date: March 7, 2024
    Applicant: MediaTek Inc.
    Inventors: Zheng Zeng, Ching-Chung Ko, Kuei-Ti Chan
  • Patent number: 11715754
    Abstract: A semiconductor package includes a first die comprising an upper surface and a lower surface opposite to the upper surface. The first die includes a plurality of through-silicon vias (TSVs) penetrating through the first die. A second die is stacked on the upper surface of the first die. An interposer layer is disposed on the lower surface of the first die. An inductor is disposed in the interposer layer. The inductor comprises terminals directly coupled to the TSVs.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: August 1, 2023
    Assignee: MediaTek Inc.
    Inventors: Zheng Zeng, Ching-Chung Ko, Kuei-Ti Chan
  • Publication number: 20230080080
    Abstract: A pneumatic pocket, manufactured by blow molding, has a top portion, a bottom portion, a pocket body connected between the top portion and the bottom portion, defining an air chamber therein, and a through hole communicating the air chamber and the outside. The pocket body has a responding portion and an assembly portion formed in the pocket body in a staggered manner. The responding portion allows the top portion to be deformed and telescoped towards the bottom portion for bearing an external force and driving the through hole to intake or discharge air in response. The assembly portion is configured to allow another pneumatic pocket to be positioned and assembled without interfering the deforming and telescoping of the responding portions thereof, so that the pneumatic pocket can be extended and expanded according to the size of a cushion body side by side, so that the pneumatic pockets can be arranged in the cushion body parallelly side-by-side.
    Type: Application
    Filed: April 11, 2022
    Publication date: March 16, 2023
    Inventor: FU-CHUNG KO
  • Publication number: 20220357211
    Abstract: The present invention provides a processing circuit including logic cells and a thermal sensor. The thermal sensor is positioned within the logic cells and surrounded by the logic cells, and the logic cells and the thermal sensor are all implemented by core devices.
    Type: Application
    Filed: April 13, 2022
    Publication date: November 10, 2022
    Applicant: MEDIATEK INC.
    Inventors: Min-Hang Hsieh, Jyun-Jia Huang, Chien-Sheng Chao, Ghien-An Shih, Ching-Chung Ko, Yu-Cheng Su, Lin-Chien Chen, Ai-Yun Liu, Chia-Hsin Hu
  • Patent number: 11367788
    Abstract: A semiconductor device structure is provided. A first well region with a first type of conductivity is formed over a semiconductor substrate. A second well region with a second type of conductivity is formed over the semiconductor substrate. A well region is formed over the semiconductor substrate and between the first and second well regions. A first gate structure is disposed on the well region and partially over the first and second well regions. A drain region is in the first well region. A source region and a bulk region are in the second well region. The drain region, the source region and the bulk region have the first type of conductivity. A second gate structure is disposed on the second well region, and separated from the first gate structure by the source region and the bulk region.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: June 21, 2022
    Assignee: MEDIATEK INC.
    Inventors: Jing-Chyi Liao, Ching-Chung Ko, Zheng Zeng
  • Publication number: 20220098120
    Abstract: Additives for cementitious compositions are stabilized against particle agglomeration. The additive may be provided in an aqueous liquid admixture composition for cementitious compositions that includes the additive, a polymer thickener, and water, where the particles are stabilized against agglomeration and the admixture is stabilized against physical separation. The method for stabilizing the additive against particle agglomeration utilizes a pH sensitive thickener that may be activated through neutralization of acid groups on the polymer thickener. Methods of making cementitious compositions and hardened cementitious structures using the stabilized additive and admixture are also disclosed.
    Type: Application
    Filed: January 10, 2020
    Publication date: March 31, 2022
    Inventors: Shaode ONG, Paul SEILER, Suz-chung KO, Michael MYERS, Sandra SPROUTS, Thomas VICKERS, Jacki J. ATIENZA
  • Publication number: 20220081364
    Abstract: An additive for cementitious compositions for mitigating alkali-silica reaction (ASR) includes particles of alkali-silica reaction mitigating that are against agglomeration. The additive may be provided in an aqueous liquid admixture composition for cementitious compositions that includes the alkali-silica reaction mitigating additive, a thickening agent and water. The admixture utilizes a pH sensitive thickener in combination with pH adjustment to stabilize the particles of alkali-silica reaction mitigating additive against agglomeration. The admixture composition is used to mitigate the alkali-silica reactions in a cementitious composition. Methods of making the admixture, cementitious compositions and hardened cementitious structures are also disclosed.
    Type: Application
    Filed: January 10, 2020
    Publication date: March 17, 2022
    Inventors: Shaode ONG, Paul SEILER, Suz-chung KO, Michael MYERS, Sandra SPROUTS, Thomas VICKERS, Jacki J. ATIENZA
  • Publication number: 20210384291
    Abstract: A semiconductor package includes a first die comprising an upper surface and a lower surface opposite to the upper surface. The first die includes a plurality of through-silicon vias (TSVs) penetrating through the first die. A second die is stacked on the upper surface of the first die. An interposer layer is disposed on the lower surface of the first die. An inductor is disposed in the interposer layer. The inductor comprises terminals directly coupled to the TSVs.
    Type: Application
    Filed: May 12, 2021
    Publication date: December 9, 2021
    Inventors: Zheng Zeng, Ching-Chung Ko, Kuei-Ti Chan
  • Publication number: 20200373428
    Abstract: A semiconductor device structure is provided. A first well region with a first type of conductivity is formed over a semiconductor substrate. A second well region with a second type of conductivity is formed over the semiconductor substrate. A well region is formed over the semiconductor substrate and between the first and second well regions. A first gate structure is disposed on the well region and partially over the first and second well regions. A drain region is in the first well region. A source region and a bulk region are in the second well region. The drain region, the source region and the bulk region have the first type of conductivity. A second gate structure is disposed on the second well region, and separated from the first gate structure by the source region and the bulk region.
    Type: Application
    Filed: April 21, 2020
    Publication date: November 26, 2020
    Inventors: Jing-Chyi LIAO, Ching-Chung KO, Zheng ZENG
  • Publication number: 20190142330
    Abstract: A bra-type breast tumor self-detection mask includes a double-layered structure formed by a top surface and a bottom surface. Edges on the top surface and the bottom surface are sealed, a small space is formed between the top surface and the bottom surface, and the small space is filled with a lubrication element. The self-detection mask fully covers breasts in a large area just like a bra. The self-detection mask is provided with positioning elements, a face on the top surface or the bottom surface is provided with plural recording lines which surround into plural regions on which are marks. The top surface provides for the pressing and the horizontal movement of the fingers, and the bottom surface touches the breast skin for one-time detection. The breast tumor can be touched and recorded accurately without moving the self-detection mask.
    Type: Application
    Filed: November 13, 2017
    Publication date: May 16, 2019
    Inventor: Fu-Chung Ko
  • Publication number: 20190000247
    Abstract: An air cushion type independent pocket spring structure, mainly being an independent pocket spring having a top cushion and a lower cushion; the top cushion and the lower cushion are respectively located in a top portion and a bottom portion of the independent pocket spring, and a plurality of the independent pocket springs are on a base. The independent pocket spring is compressible and resilient; wherein the independent pocket spring has an air inlet valve and an air outlet valve provided thereon; an air outlet tube is connected to the air outlet valve of the independent pocket spring and the air inlet valve of an adjacent independent pocket spring, and an air inlet tube is connected to the air inlet valve of the independent pocket spring and the air outlet valve of an adjacent independent pocket spring.
    Type: Application
    Filed: January 17, 2018
    Publication date: January 3, 2019
    Inventor: Fu-Chung Ko
  • Patent number: 10002833
    Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: June 19, 2018
    Assignee: MediaTek Inc.
    Inventors: Ching-Chung Ko, Tao Cheng, Tien-Yueh Liu, Ta-Hsi Chou, Peng-Cheng Kao, Ling-Wei Ke
  • Patent number: 9972673
    Abstract: The invention provides an electrostatic discharge (ESD) protection device formed by a Schottky diode. An exemplary embodiment of an ESD protection device comprises a semiconductor substrate having an active region. A first well region having a first conductive type is formed in the active region. A first heavily doped region having the first conductive type is formed in the first well region. A first metal contact is disposed on the first doped region. A second metal contact is disposed on the active region, connecting to the first well region without through any heavily doped region being located therebetween, wherein the first metal contact and the second metal contact are separated by a polysilicon pattern disposed on the first well region.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: May 15, 2018
    Assignee: MEDIATEK INC.
    Inventors: Zheng Zeng, Ching-Chung Ko, Bo-Shih Huang
  • Patent number: 9893049
    Abstract: The invention provides an electrostatic discharge (ESD) protection device. The ESD protection device includes a semiconductor substrate having an active region, a first well region having a first conductive type formed in the active region, a first doped region having the first conductive type formed in the first well region, a first metal contact disposed on the first doped region, and a second metal contact disposed on the active region, connecting to the first well region, wherein no doped region is formed between the second metal contact and the first well region.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: February 13, 2018
    Assignee: MEDIATEK INC.
    Inventors: Zheng Zeng, Ching-Chung Ko, Bo-Shih Huang
  • Patent number: 9858470
    Abstract: A method for performing a method for performing a performing a face tracking function in an electric device is provided. The electric device has a touch panel, a camera, and a processor. The method includes the following steps. A touch signal is receiving by the touch panel. Under a video call, a face tracking mode is entered based on the touch signal by the processor. Face tracking is performed on a captured frame from the camera to obtain at least one region of interesting (ROI) of the captured frame by the processor, each of the ROI having an image of a face. A target frame is generated by combining the at least one ROI by the processor. The target frame is transmitted to another electric device by the processor, so that the target frame is shown on the another electric device as a video talk frame.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: January 2, 2018
    Assignee: HTC CORPORATION
    Inventors: Ming-Che Kang, Chung-Ko Chiu
  • Patent number: 9804403
    Abstract: An optical substrate has a structured surface that enhances brightness and reduces moire effect. The optical substrate has a three-dimensionally varying, structured light output surface that comprises an irregular prismatic structure. The irregular prismatic structure may be viewed as comprising longitudinal prism blocks or rows thereof, arranged laterally defining peaks and valleys. Adjacent peaks, adjacent valleys, and/or adjacent peak and valley may be parallel or non-parallel, in an orderly, semi-orderly, random, or quasi-random manner. The lateral adjacent peaks, adjacent valleys, and/or adjacent peak and valley are not parallel. The adjacent irregular prism blocks may be irregular longitudinal sections having the same length, or random or quasi-random irregular sections having different lengths. The facets of each prism block may be flat, or curved (convexly and/or concavely).
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: October 31, 2017
    Assignee: UBright Optronics Corporation
    Inventors: Kong-Hua Wang, Craig Lin, Daniel Yaw-Chung Ko
  • Patent number: D985781
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: May 9, 2023
    Assignee: Morari, LLC
    Inventors: Jeffrey Bennett, Michael Hoey, Shawn McCutcheon, Dicken Shiu-Chung Ko, Rachel Goldstein