Patents by Inventor Chung Ko
Chung Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9804403Abstract: An optical substrate has a structured surface that enhances brightness and reduces moire effect. The optical substrate has a three-dimensionally varying, structured light output surface that comprises an irregular prismatic structure. The irregular prismatic structure may be viewed as comprising longitudinal prism blocks or rows thereof, arranged laterally defining peaks and valleys. Adjacent peaks, adjacent valleys, and/or adjacent peak and valley may be parallel or non-parallel, in an orderly, semi-orderly, random, or quasi-random manner. The lateral adjacent peaks, adjacent valleys, and/or adjacent peak and valley are not parallel. The adjacent irregular prism blocks may be irregular longitudinal sections having the same length, or random or quasi-random irregular sections having different lengths. The facets of each prism block may be flat, or curved (convexly and/or concavely).Type: GrantFiled: April 15, 2016Date of Patent: October 31, 2017Assignee: UBright Optronics CorporationInventors: Kong-Hua Wang, Craig Lin, Daniel Yaw-Chung Ko
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Publication number: 20170263559Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.Type: ApplicationFiled: May 25, 2017Publication date: September 14, 2017Applicant: MediaTek Inc.Inventors: Ching-Chung Ko, Tao Cheng, Tien-Yueh Liu, Ta-Hsi Chou, Peng-Cheng Kao, Ling-Wei Ke
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Publication number: 20170200783Abstract: The invention provides an electrostatic discharge (ESD) protection device formed by a Schottky diode. An exemplary embodiment of an ESD protection device comprises a semiconductor substrate having an active region. A first well region having a first conductive type is formed in the active region. A first heavily doped region having the first conductive type is formed in the first well region. A first metal contact is disposed on the first doped region. A second metal contact is disposed on the active region, connecting to the first well region without through any heavily doped region being located therebetween, wherein the first metal contact and the second metal contact are separated by a polysilicon pattern disposed on the first well region.Type: ApplicationFiled: March 27, 2017Publication date: July 13, 2017Inventors: Zheng ZENG, Ching-Chung KO, Bo-Shih HUANG
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Patent number: 9698102Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.Type: GrantFiled: May 31, 2016Date of Patent: July 4, 2017Assignee: MediaTek Inc.Inventors: Ching-Chung Ko, Tao Cheng, Tien-Yueh Liu, Ta-Hsi Chou, Peng-Cheng Kao, Ling-Wei Ke
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Patent number: 9680265Abstract: The present disclosure relates to a female connector and a method for manufacturing the same. The female connector coupled with a male terminal unit in which a plurality of male terminals are arranged includes: a housing configured to have one side provided with a male insertion hole into which the male terminal unit is inserted and the other side provided with an insertion groove; a body configured to be inserted into the insertion groove to be coupled with the housing; and a female terminal configured to be formed on a surface of the body and provided with a pattern part electrically connected to the male connector by activating the surface by a laser.Type: GrantFiled: July 9, 2015Date of Patent: June 13, 2017Assignees: HYUNDAI MOTOR COMPANY, OPTO LINE CO., LTD.Inventors: Se Hoon Park, Cheol Hun Lee, Jin Sung Sa, Hyun Chung Ko
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Publication number: 20160380377Abstract: A joint connector includes a housing having a plurality of mounting passages into which a plurality of wires are horizontally inserted from the outside to the inside, and a fastening hole formed in the upper surface thereof and in communication with the mounting passages of the housing, a terminal inserted into the mounting passages of the housing and having a plurality of connection parts connected to an external circuit through the plurality of wires, and a holder vertically inserted into the fastening hole of the housing and having a plurality of fastening protrusions formed on a bottom surface thereof to fasten the terminal to the housing.Type: ApplicationFiled: October 30, 2015Publication date: December 29, 2016Inventors: Se Hoon PARK, Jin Sung SA, Hyun Chung KO
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Patent number: 9531104Abstract: A joint connector includes a housing having a plurality of mounting passages into which a plurality of wires are horizontally inserted from the outside to the inside, and a fastening hole formed in the upper surface thereof and in communication with the mounting passages of the housing, a terminal inserted into the mounting passages of the housing and having a plurality of connection parts connected to an external circuit through the plurality of wires, and a holder vertically inserted into the fastening hole of the housing and having a plurality of fastening protrusions formed on a bottom surface thereof to fasten the terminal to the housing.Type: GrantFiled: October 30, 2015Date of Patent: December 27, 2016Assignee: HYUNDAI MOTOR COMPANYInventors: Se Hoon Park, Jin Sung Sa, Hyun Chung Ko
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Publication number: 20160276274Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of first conductive layers embedded in respective said plurality of IMD layers, wherein said first conductive layers comprise copper; a first insulating layer overlying said plurality of IMD layers and said plurality of first conductive layers; at least a first wiring line in a second conductive layer overlying said first insulating layer, for distributing power signal or ground signal, wherein said second conductive layer comprise aluminum; and at least a second wiring line in a third conductive layer overlying said second conductive layer, for distributing power signal or ground signal.Type: ApplicationFiled: May 31, 2016Publication date: September 22, 2016Inventors: Ching-Chung KO, Tao CHENG, Tien-Yueh LIU, Ta-Hsi CHOU, Peng-Cheng KAO, Ling-Wei KE
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Patent number: 9448411Abstract: An optical substrate having a structured surface that enhances brightness and reduces moiré effect. The optical substrate has a three-dimensionally varying, structured light output surface that comprises an irregular prismatic structure. The irregular prismatic structure may be viewed as comprising longitudinal prism blocks or rows thereof, arranged laterally defining peaks and valleys. Adjacent peaks, adjacent valleys, and/or adjacent peak and valley may be parallel or non-parallel, in an orderly, semi-orderly, random, or quasi-random manner. The lateral adjacent peaks, adjacent valleys, and/or adjacent peak and valley are not parallel. The adjacent irregular prism blocks may be irregular longitudinal sections having the same length, or random or quasi-random irregular sections having different lengths. The facets of each prism block may be flat, or curved (convexly and/or concavely).Type: GrantFiled: August 26, 2013Date of Patent: September 20, 2016Assignee: UBright Optronics CorporationInventors: Kong-Hua Wang, Craig Lin, Daniel Yaw-Chung Ko
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Publication number: 20160231498Abstract: An optical substrate has a structured surface that enhances brightness and reduces moire effect. The optical substrate has a three-dimensionally varying, structured light output surface that comprises an irregular prismatic structure. The irregular prismatic structure may be viewed as comprising longitudinal prism blocks or rows thereof, arranged laterally defining peaks and valleys. Adjacent peaks, adjacent valleys, and/or adjacent peak and valley may be parallel or non-parallel, in an orderly, semi-orderly, random, or quasi-random manner. The lateral adjacent peaks, adjacent valleys, and/or adjacent peak and valley are not parallel. The adjacent irregular prism blocks may be irregular longitudinal sections having the same length, or random or quasi-random irregular sections having different lengths. The facets of each prism block may be flat, or curved (convexly and/or concavely).Type: ApplicationFiled: April 15, 2016Publication date: August 11, 2016Inventors: Kong-Hua Wang, Craig Lin, Daniel Yaw-Chung KO
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Patent number: 9400392Abstract: An optical substrate has a structured surface that enhances brightness and reduces moire effect. The optical substrate has a three-dimensionally varying, structured light output surface that comprises an irregular prismatic structure. The irregular prismatic structure may be viewed as comprising longitudinal prism blocks or rows thereof, arranged laterally defining peaks and valleys. Adjacent peaks, adjacent valleys, and/or adjacent peak and valley may be parallel or non-parallel, in an orderly, semi-orderly, random, or quasi-random manner. The lateral adjacent peaks, adjacent valleys, and/or adjacent peak and valley are not parallel. The adjacent irregular prism blocks may be irregular longitudinal sections having the same length, or random or quasi-random irregular sections having different lengths. The facets of each prism block may be flat, or curved (convexly and/or concavely).Type: GrantFiled: August 13, 2015Date of Patent: July 26, 2016Assignee: UBright Optronics CorporationInventors: Kong-Hua Wang, Craig Lin, Daniel Yaw-Chung Ko
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Patent number: 9379059Abstract: An integrated circuit chip includes a semiconductor substrate having thereon a plurality of IMD layers and a plurality of first conductive layers; a first passivation layer overlying the plurality of IMD layers and the first conductive layers; at least a first power/ground mesh wiring line in a first aluminum layer overlying the first Insulating layer; and at least a second power/ground mesh wiring line in a second aluminum layer overlying the first aluminum layer.Type: GrantFiled: November 1, 2011Date of Patent: June 28, 2016Assignee: MEDIATEK INC.Inventors: Ching-Chung Ko, Tao Cheng, Tien-Yueh Liu, Ta-Hsi Chou, Peng-Cheng Kao, Ling-Wei Ke
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Publication number: 20160156142Abstract: The present disclosure relates to a female connector and a method for manufacturing the same. The female connector coupled with a male terminal unit in which a plurality of male terminals are arranged includes: a housing configured to have one side provided with a male insertion hole into which the male terminal unit is inserted and the other side provided with an insertion groove; a body configured to be inserted into the insertion groove to be coupled with the housing; and a female terminal configured to be formed on a surface of the body and provided with a pattern part electrically connected to the male connector by activating the surface by a laser.Type: ApplicationFiled: July 9, 2015Publication date: June 2, 2016Applicants: OPTO LINE CO., LTD., HYUNDAI MOTOR COMPANYInventors: Se Hoon PARK, Cheol Hun LEE, Jin Sung SA, Hyun Chung KO
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Patent number: 9324705Abstract: A lateral bipolar junction transistor includes an emitter region; a base region surrounding the emitter region; a gate disposed at least over a portion of the base region; and a collector region surrounding the base region; wherein the portion of the base region under the gate does not under go a threshold voltage implant process.Type: GrantFiled: January 22, 2014Date of Patent: April 26, 2016Assignee: MEDIATEK INC.Inventors: Ching-Chung Ko, Tung-Hsing Lee
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Patent number: 9293424Abstract: A semiconductor structure is arranged on an integrated circuit, the integrated circuit includes a seal ring arranged at outer periphery of the integrated circuit, a metal ring arranged at an inner side of the seal ring and a power bus arranged at a side of the metal ring. The semiconductor structure includes a first P type electrode area, a second P type electrode area and a first N type electrode area. The first P type electrode area is formed at a position on a P well corresponding to the seal ring, and coupled to the seal ring. The second P type electrode area is formed at a position on the P well corresponding to the metal ring, and coupled to the metal ring. The first N type electrode area is formed at a position corresponding to the power bus, and coupled to the power bus.Type: GrantFiled: October 12, 2014Date of Patent: March 22, 2016Assignee: Advanced Analog Technology, Inc.Inventors: Chun-Chung Ko, Chih-Lun Wu, Shuo-Yen Lin
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Publication number: 20160019412Abstract: A method for performing a method for performing a performing a face tracking function in an electric device is provided. The electric device has a touch panel, a camera, and a processor. The method includes the following steps. A touch signal is receiving by the touch panel. Under a video call, a face tracking mode is entered based on the touch signal by the processor. Face tracking is performed on a captured frame from the camera to obtain at least one region of interesting (ROI) of the captured frame by the processor, each of the ROI having an image of a face. A target frame is generated by combining the at least one ROI by the processor. The target frame is transmitted to another electric device by the processor, so that the target frame is shown on the another electric device as a video talk frame.Type: ApplicationFiled: June 24, 2015Publication date: January 21, 2016Applicant: HTC CORPORATIONInventors: Ming-Che KANG, Chung-Ko CHIU
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Publication number: 20150346421Abstract: An optical substrate has a structured surface that enhances brightness and reduces moire effect. The optical substrate has a three-dimensionally varying, structured light output surface that comprises an irregular prismatic structure. The irregular prismatic structure may be viewed as comprising longitudinal prism blocks or rows thereof, arranged laterally defining peaks and valleys. Adjacent peaks, adjacent valleys, and/or adjacent peak and valley may be parallel or non-parallel, in an orderly, semi-orderly, random, or quasi-random manner. The lateral adjacent peaks, adjacent valleys, and/or adjacent peak and valley are not parallel. The adjacent irregular prism blocks may be irregular longitudinal sections having the same length, or random or quasi-random irregular sections having different lengths. The facets of each prism block may be flat, or curved (convexly and/or concavely).Type: ApplicationFiled: August 13, 2015Publication date: December 3, 2015Inventors: Kong-Hua Wang, Craig Lin, Daniel Yaw-Chung KO
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Patent number: 9202807Abstract: A semiconductor structure includes a P well formed on a P type substrate; a first N type electrode area formed on a central region of the P well; a first insulating area formed on the P well and surrounding the first N type electrode area; a second N type electrode area formed on the P well and surrounding the first insulating area; a second insulating area formed on the P well and surrounding the second N type electrode area; and a P type electrode area formed on the P well and surrounding the second insulating area; wherein periphery outlines of the first N type electrode area and the second N type electrode area are both 8K sided polygons or circles, and K is a positive integer.Type: GrantFiled: June 17, 2014Date of Patent: December 1, 2015Assignee: Advanced Analog Technology, Inc.Inventors: Chun-Chung Ko, Chih-Lun Wu, Shuo-Yen Lin
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Patent number: 9186385Abstract: A composition for affecting one or more of influenza, inflammation, and immune system function, said composition comprising an extract prepared from Radix isatidis and an extract prepared from Flos Lonicerae. In alternative embodiments, the composition further comprises one or more of an extract prepared from Poria cocos(Schw.) Wolf and an extract prepared from Herba houttuyniae. Method for treating one or more of influenza, inflammation by administering a patient a therapeutically effective amount of the above composition.Type: GrantFiled: March 2, 2010Date of Patent: November 17, 2015Assignee: Viva Pharmaceutical Inc.Inventors: Xueju Xie, Jason Jiang-Chung Ko
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Patent number: 9124800Abstract: The present invention discloses a mobile device, where the mobile device includes an image sensing unit, a touch screen, and a processor. The image sensing unit is configured to receive at least an image of a scene comprising at least an object. The touch screen is configured to display at least an image of a scene and received at least one user input. The processor is configured to identify the object in response to a first user input corresponding to the object is received, determine characteristics of the object, track the object in the scene according to the characteristics of the object, and capture a number of images of the scene according to a motion state of the object. The motion state is determined according to variance of the characteristics of the object in consecutive images received by the image sensing unit.Type: GrantFiled: January 31, 2013Date of Patent: September 1, 2015Assignee: HTC CorporationInventors: Peter Chou, Drew Bamford, John C. Wang, Sung-Hao Lin, Chung-Ko Chiu, Li-Chun Hsu, Jeng-Yu Yeh, Micah Shotel, Jorge Furuya