Abstract: A medical image analysis system comprises: a database for storing a first medical image data indicating a target medical image; and a server for accessing the database. The server includes: a first analysis module for generating a first determination data according to the first medical image data; a second analysis module for generating a second determination data according to the first medical image data; and an ensemble module communicatively connected with the first and second analysis modules and generating a third determination data according to the first and second determination data. The first and second determination data each indicate whether the target medical image includes a cancerous tissue image or indicate a chance of the target medical image including a cancerous tissue image. The third determination data indicates whether the target medical image includes a cancerous tissue image.

Abstract: An embodiment includes a process for treating an abdominal aortic aneurysm (AAA) endoleak with a shape memory polymer (SMP) foam device. First, a bifurcated stent graft is placed within the aneurysm while a micro guidewire is positioned within the aneurysm for future catheter access. Second, after placing the iliac graft extension, a catheter is introduced over wire to deliver embolic foams. Third, embolic foams expand and conform to the aneurysm wall. Fourth, embolic foams create a stable thrombus to prevent endoleak formation by isolating peripheral vessels from the aneurysm volume.

Abstract: A semiconductor device includes a substrate having a first conductivity type and an epitaxial layer disposed on the substrate. A first trench and a second trench are disposed in the epitaxial layer. A first body region and a second body region both having a second conductivity type are disposed in the epitaxial layer, and located on two sides of the first trench, respectively. A first source region and a second source region both having the first conductivity type are disposed on the first body region and the second body region, respectively. A first electrode is disposed in the first trench. A source contact structure includes a first portion disposed in the first trench and is electrically connected to the first source region and the second source region. A first gate is disposed in the second trench.

Abstract: A display panel including a substrate, scan lines, data lines, pixel structures, and a light shielding pattern layer is provided. The substrate is provided with a display area. The scan lines and the data lines are disposed on the substrate, and intersect with each other. The pixel structures are disposed in the display area, and each includes a display transistor and a pixel electrode. The display transistor includes a first semiconductor pattern, a first gate electrode, a first source electrode, and a first drain electrode. The first gate electrode is disposed between the substrate and the first semiconductor pattern, and is electrically connected to one of the scan lines. The first source electrode is electrically connected to one of the data lines. The pixel electrode is electrically connected to the first drain electrode of the display transistor. The light shielding pattern layer is disposed between the first gate electrode and the substrate, and has a first opening overlapping the first gate electrode.

Abstract: A method performed by at least one processor includes the following steps: generating a layout of an integrated circuit (IC), the layout including a cell and a layout context in a vicinity of the cell; determining a representative context group for the cell from a set of predetermined context groups; determining a representative timing table corresponding to the representative context group, the representative timing table including a best-case delay value and a worst-case delay value; and performing a timing analysis on the layout according to the best-case delay value and the worst-case delay value.

Abstract: A photo-detecting apparatus is provided. The photo-detecting apparatus includes a carrier conducting layer having a first surface; an absorption region is doped with a first dopant having a first conductivity type and a first peak doping concentration, wherein the carrier conducting layer is doped with a second dopant having a second conductivity type and a second peak doping concentration, wherein the carrier conducting layer comprises a material different from a material of the absorption region, wherein the carrier conducting layer is in contact with the absorption region to form at least one heterointerface, wherein a ratio between the first peak doping concentration of the absorption region and the second peak doping concentration of the carrier conducting layer is equal to or greater than 10; and a first electrode and a second electrode both formed over the first surface of the carrier conducting layer.

Abstract: A method for adjusting application settings is provided. The method includes using an application setting module to receive at least one performance target from an application running on an electronic device. The method further includes using the application setting module to record at least one performance indicator of the application while the application is running, wherein the performance indicator corresponds to the performance target. The method further includes using the application setting module to estimate the estimated time that the temperature of the electronic device sustains less than the defense temperature. The method further includes using the application setting module to determine the score according to the performance indicator and the estimated time, wherein the score indicates to the application that it should raise, lower, or keep a current setting.

Abstract: An embodiment includes a process for treating an abdominal aortic aneurysm (AAA) endoleak with a shape memory polymer (SMP) foam device. First, a bifurcated stent graft is placed within the aneurysm while a micro guidewire is positioned within the aneurysm for future catheter access. Second, after placing the iliac graft extension, a catheter is introduced over wire to deliver embolic foams. Third, embolic foams expand and conform to the aneurysm wall. Fourth, embolic foams create a stable thrombus to prevent endoleak formation by isolating peripheral vessels from the aneurysm volume.

Abstract: Systems and methods for context aware circuit design are described herein. A method includes: identifying at least one cell to be designed into a circuit; identifying at least one context parameter having an impact to layout dependent effect of the circuit; generating, for each cell and for each context parameter, a plurality of abutment environments associated with the cell; estimating, for each cell and each context parameter, a sensitivity of at least one electrical property of the cell to the context parameter by generating a plurality of electrical property values of the cell under the plurality of abutment environments; and determining whether each context parameter is a key context parameter for a static analysis of the circuit, based on the sensitivity of the at least one electrical property of each cell and based on at least one predetermined threshold.

Abstract: A conductive line structure includes: first and second offset sets of long pillars that are substantially coaxial on an intra-set basis; a third set of offset short pillars, the short pillars being: overlapping of long pillars in the first and second sets; and organized into groups of first quantities of the short pillars; each of the groups being overlapping of and electrically coupled between a pair of one of the long pillars in the first set and a one of the long pillars in the second set such that, in each of the groups, each short pillar being overlapping of and electrically coupled between the pair; and each long pillar in each of the first and second sets being overlapped by a second quantity of short pillars in the third set and being electrically coupled to same; and the first quantity being less than the second quantity.

Abstract: Systems, apparatuses, and methods for improved reconfigurable optical sensing are provided. For instance, an example optical sensing apparatus can include a photodetector array including a plurality of photodetectors. The optical sensing apparatus can include circuitry or one or more processing devices configured to receive one or more electrical signals representing an optical signal received by a first subset of the plurality of photodetectors; determine, based on the one or more electrical signals, a region of interest in the photodetector array for optical measurements; and deactivate, based on the region of interest, a second subset of the plurality of photodetectors of the photodetector array.

Abstract: A display panel includes a substrate, multiple scan lines, multiple data lines, and multiple pixel structures. The scan lines and the data lines are disposed on the substrate. The pixel structure is disposed on the substrate and electrically connected to the scan lines and the data lines, and includes an active device, a pixel electrode, a capacitor electrode, an overcoat layer, a first common electrode, a second common electrode, a first passivation layer, and a second passivation layer. The active device is electrically connected one scan line, one data line, and the pixel electrode. The capacitor electrode extends from a drain and is electrically connected to the pixel electrode. The overcoat layer is disposed between the pixel electrode and the capacitor electrode. The first common electrode overlaps the capacitor electrode, and is located between the overcoat layer and the capacitor electrode.

Abstract: An injection molding method is provided. A molding device is provided and includes a first mold, a second mold over the first mold and a mold cavity defined by the first mold and the second mold. A first mixture is injected into the mold cavity through a first feeding port. A first component is formed from the first mixture. A second mixture is injected into the mold cavity through a second feeding port. A second component is formed from the second mixture. The second component is at least partially contact with the first component, and the first component and the second component have different physical properties.

Abstract: A method performed by at least one processor includes the following steps: generating a layout of an integrated circuit (IC), the layout comprising a cell and a layout context in a vicinity of the cell; receiving from a library a set of context groups and a set of timing tables, wherein each of the context groups is associated with one of the set of timing tables; determining a representative context group for the cell through comparing the layout context of the cell with the set of context groups; and performing a timing analysis on the layout according to a representative timing table associated with the representative context group for the cell.

Abstract: A semiconductor device includes a substrate having a first conductivity type and including a cell region and a termination region. A trench is disposed in the substrate and located in the cell region, and a gate electrode disposed in the trench. A shielding doped region having a second conductivity type is disposed in the substrate and directly below the trench. A buried guard ring having the second conductivity type is disposed in the substrate and located in the termination region. The buried guard ring and the shielding doped region are disposed at the same depth in the substrate. In addition, a junction termination extension structure having the second conductivity type is disposed in the substrate, located directly above and separated from the buried guard ring.

Abstract: A semiconductor device includes a trench in a substrate, a gate electrode in the trench, a source contact region on a first surface of the substrate, a drain contact region on a second surface of the substrate, a heavily doped region directly below the trench, and a current spreading layer in the substrate to surround the bottom of the trench and the heavily doped region. The heavily doped region has a first conductivity type, and the width of the heavily doped region is smaller than the width of the trench in a first direction. The current spreading layer has a second conductivity type and a gradual doping concentration that is gradually increased along the first direction from the heavily doped region to the outside of the current spreading layer.

Abstract: An isolated power supplies converts an input power source in a primary side into an output power source in a secondary side, capable of transmitting a signal from the secondary side to the primary side via a transformer. The transformer has a primary winding connected with a main switch, and a secondary winding connected with a secondary-side switch. A primary-side controller controls the main switch. A secondary-side controller controls the secondary-side switch and detects a demagnetization time of the transformer. Before the end of the demagnetization time, the secondary-side controller turns OFF the secondary-side switch to signal, via the transformer, the primary-side controller, which in response turns ON the main switch to operate the isolated power supply in a continuous-conduction mode or in a boundary mode.

Abstract: A semiconductor structure including a substrate, an epitaxy layer, an electrode structure, a first sidewall doping region, a second sidewall doping region, and a bottom doping region is provided. The substrate has a first conductivity type. The epitaxy layer has a first conductivity type and is disposed on the substrate. The electrode structure is disposed in the epitaxy layer. The electrode structure extends along a first direction. The first sidewall doping region has the first conductivity type and is disposed on one side of the electrode structure. The second sidewall doping region has a second conductivity type different than the first conductivity type and is disposed on the other side of the electrode structure. The bottom doping region has the second conductivity type and is disposed under the electrode structure. The second sidewall doping region is connected to the bottom doping region.

Abstract: The present invention relates to compounds of formula (I) as activators of glucagon-like peptide 1 (GLP1) receptor for the treatment of obesity, type 2 diabetes mellitus, insulin resistance, hyperinsulinemia, glucose intolerance, hyperglycemia, one or more diabetic complications, diabetic nephropathy, dyslipidemia, non-alcoholic fatty liver disease (NAFLD), non-alcoholic steatohepatitis (NASH), hypertension, atherosclerosis, peripheral arterial disease, stroke, cardiomyopathy, atrial fibrillation, heart failure, coronary heart disease and neuropathy. Preferred compounds are e.g. 2-((4-((S)-2-(4-chloro-2-fluorophenyl)-2-methylbenzo[d][1,3]dioxol-4-yl)piperidin-1-yl)methyl)-1-(((S)-oxetan-2-yl)methyl)-1H-imidazole derivatives and similar compounds, such as e.g. C-1, C-2, C-3, C-4 and other compounds.

Abstract: A semiconductor device includes a substrate having a first conductivity type, an epitaxial layer formed on the substrate, a well region extending from a top surface of the epitaxial layer into the epitaxial layer, a drift region formed in the epitaxial layer and in contact with the bottom surface of the well region, a gate structure and a conductive structure. The epitaxial layer has the first conductivity type, the well region has the second conductivity type, and the drift region has the first conductivity type. The gate structure that extends from the top surface of the epitaxial layer penetrates the well region and is in contact with the drift region. The conductive structure is formed in the drift region and disposed below the gate structure. A gate electrode of the gate structure is separated from the underlying conductive structure by the gate dielectric layer of the gate structure.