Patents by Inventor Chunong Qiu

Chunong Qiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9325279
    Abstract: One object of this invention is to provide a structure of integrated power transistor device having low thermal budget metal oxynitrides as the active channel on a CMOS logic and control circuit chip to form an integrated intelligent power switching module for power switching. The other object of this invention is to provide a structure of integrated power amplifier transistor device having low thermal budget metal oxynitride active channel layer on a CMOS logic and control circuit chip to form an integrated intelligent microwave power amplifier for RF power amplification.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: April 26, 2016
    Inventors: Cindy X. Qiu, Andy Shih, Yi-Chi Shih, Lu Han, Chunong Qiu, Ishiang Shih
  • Patent number: 9324739
    Abstract: In one embodiment of the invention, a high electron mobility thin film transistor with a plurality of gate insulating layers and a metal oxynitride active channel layer is provided for forming a backplane circuit for pixel switching in an electronic display, to reduce unwanted ON state series resistance in the metal oxynitride active channel layer and minimize unwanted power dissipation in the backplane circuit. Another embodiment of the invention provides a high electron mobility thin film transistor structure with a plurality of metal oxynitride active channel layers and a gate insulating layer for forming a backplane circuit for pixel switching in an electronic display, to reduce unwanted ON state series resistance in the metal oxynitride active channel layer and to minimize unwanted power dissipation in the backplane circuit.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: April 26, 2016
    Inventors: Ishiang Shih, Andy Shih, Cindy Qiu, Julia Qiu, Yi-Chi Shih, Chunong Qiu
  • Publication number: 20160099684
    Abstract: One object of this invention is to provide a structure of integrated power transistor device having low thermal budget metal oxynitrides as the active channel on a CMOS logic and control circuit chip to form an integrated intelligent power switching module for power switching. The other object of this invention is to provide a structure of integrated power amplifier transistor device having low thermal budget metal oxynitride active channel layer on a CMOS logic and control circuit chip to form an integrated intelligent microwave power amplifier for RF power amplification.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 7, 2016
    Inventors: Cindy X. Qiu, Andy Shih, Yi-Chi Shih, Lu Han, Chunong Qiu, Ishiang Shih
  • Patent number: 9276131
    Abstract: This invention teaches stress release metal electrodes for gate, drain and source in a field effect transistor and stress release metal electrodes for emitter, base and collector in a bipolar transistor. Due to the large difference in the thermal expansion coefficients between semiconductor materials and metal electrodes, significant strain and stresses can be induced in the devices during the fabrication and operation. The present invention provides metal electrode with stress release structures to reduce the strain and stresses in these devices.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: March 1, 2016
    Inventors: Ishiang Shih, Cindy Xing Qiu, Chunong Qiu, Yi-Chi Shih
  • Publication number: 20160005771
    Abstract: MMIC circuits with thin film transistors are provided without the need of grinding and etching of the substrate after the fabrication of active and passive components. Furthermore, technology for active devices based on non-toxic compound semiconductors is provided. The success in the MMIC methods and structures without substrate grinding/etching and the use of semiconductors without toxic elements for active components will reduce manufacturing time, decrease economic cost and environmental burden. MMIC structures are provided where the requirements for die or chip attachment, alignment and wire bonding are eliminated completely or minimized. This will increase the reproducibility and reduce the manufacturing time for the MMIC circuits and modules.
    Type: Application
    Filed: August 3, 2015
    Publication date: January 7, 2016
    Inventors: Ishiang Shih, Cindy Xing Qiu, Chunong Qiu, Yi-Chi Shih
  • Publication number: 20150372096
    Abstract: High mobility transistors and microwave integrated circuits with an improved uniformity of the width of the smallest of features, an increased lithographic yield and reduced defects in the active components are provided. Before and during fabrication, a first grooving process is performed to partially or completely remove composite epitaxial layers in the field lanes to reduce the initial bow to be smaller than DOF range and to improve the uniformity of the critical dimension. A second grooving process may also be performed to remove composite epitaxial layers in the dicing lanes to further improve the uniformity of the width of the smallest features for the devices and circuits to be made.
    Type: Application
    Filed: June 20, 2014
    Publication date: December 24, 2015
    Inventors: Ishiang Shih, Chunong Qiu, Cindy X. Qiu, Yi-Chi Shih
  • Publication number: 20150263116
    Abstract: The present invention is related to high electron mobility transistors for power switching and microwave amplification and switching. More specifically, it related to a high electron mobility transistor with an improved gate to enhance the performance. When fabricating a high electron mobility thin film transistors, a first gate metal layer made of chromium alloy or tungsten alloy is deposited to reduce surface traps and to enhance the stability and integrity of the gates.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 17, 2015
    Inventors: Chunong Qiu, Jay-Hsing Wu, Cindy X. Qiu, Yi-Chi Shih, Ishiang Shih
  • Patent number: 9048305
    Abstract: In HEMTs based on III-nitrides epitaxial films or GaAs, AlGaAs and InGaAs epitaxial films, unwanted microcracks are often formed in the composite epitaxial layers in the channel region during fabrication and operation. These microcracks are caused by strain or stresses due to lattice mismatch and thermal expansion coefficient differences between materials and substrate's. Those microcracks will bring about an increase in source to drain resistance and lead to performance and reliability degradation of the HEMTs and the MMICs containing them. The present invention provides HEMTs with minimized effects of the unwanted microcracks by aligning the channel region long axis to a certain direction so that the channel region long axis forms a right angle with axis of at least one type of the microcracks.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: June 2, 2015
    Inventors: Ishiang Shih, Chunong Qiu, Cindy X. Qiu, Yi-Chi Shih
  • Publication number: 20150102387
    Abstract: In HEMTs based on III-nitrides epitaxial films or GaAs, AlGaAs and InGaAs epitaxial films, unwanted microcracks are often formed in the composite epitaxial layers in the channel region during fabrication and operation. These microcracks are caused by strain or stresses due to lattice mismatch and thermal expansion coefficient differences between materials and substrate's. Those microcracks will bring about an increase in source to drain resistance and lead to performance and reliability degradation of the HEMTs and the MMICs containing them. The present invention provides HEMTs with minimized effects of the unwanted microcracks by aligning the channel region long axis to a certain direction so that the channel region long axis forms a right angle with axis of at least one type of the microcracks.
    Type: Application
    Filed: October 15, 2013
    Publication date: April 16, 2015
    Inventors: Ishiang Shih, Chunong Qiu, Cindy X. Qiu, Yi-Chi Shih
  • Publication number: 20150069514
    Abstract: MMIC circuits with thin film transistors are provided without the need of grinding and etching of the substrate after the fabrication of active and passive components. Furthermore, technology for active devices based on non-toxic compound semiconductors is provided. The success in the MMIC methods and structures without substrate grinding/etching and the use of semiconductors without toxic elements for active components will reduce manufacturing time, decrease economic cost and environmental burden. MMIC structures are provided where the requirements for die or chip attachment, alignment and wire bonding are eliminated completely or minimized. This will increase the reproducibility and reduce the manufacturing time for the MMIC circuits and modules.
    Type: Application
    Filed: September 9, 2013
    Publication date: March 12, 2015
    Inventors: Ishiang Shih, Cindy X. Qiu, Chunong Qiu, Yi-Chi Shih
  • Publication number: 20140332854
    Abstract: This invention teaches stress release metal electrodes for gate, drain and source in a field effect transistor and stress release metal electrodes for emitter, base and collector in a bipolar transistor. Due to the large difference in the thermal expansion coefficients between semiconductor materials and metal electrodes, significant strain and stresses can be induced in the devices during the fabrication and operation. The present invention provides metal electrode with stress release structures to reduce the strain and stresses in these devices.
    Type: Application
    Filed: May 10, 2013
    Publication date: November 13, 2014
    Inventors: Ishiang Shih, Cindy Xing Qiu, Chunong Qiu, Yi-Chi Shih
  • Patent number: 8852755
    Abstract: The present invention relates to oxadiazole metallic complexes. More specifically it relates to the synthesis and electronic and opto-electronic applications of oxadiazole metallic complexes having a general Formula I, wherein each of variables is defined herein.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: October 7, 2014
    Assignee: Merck Patent GmbH
    Inventors: Chunong Qiu, Steven Xiao, Cindy Xing Qiu
  • Patent number: 8759877
    Abstract: This invention teaches stress release metal electrodes for gate, drain and source in a field effect transistor and stress release metal electrodes for emitter, base and collector in a bipolar transistor. Due to the large difference in the thermal expansion coefficients between semiconductor materials and metal electrodes, significant strain and stresses can be induced in the devices during the fabrication and operation. The present invention provides metal electrode with stress release structures to reduce the strain and stresses in these devices.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: June 24, 2014
    Inventors: Ishiang Shih, Cindy Xing Qiu, Chunong Qiu, Yi-Chi Shih
  • Patent number: 8455312
    Abstract: In high frequency circuits, the switching speed of devices is often limited by the series resistance and capacitance across the input terminals. To reduce the resistance and capacitance, the cross-section of input electrodes is made into a T-shape or inverted L-shape through lithography. The prior art method for the formation of cavities for T-gate or inverted L-gate is achieved through several steps using multiple photomasks. Often, two or even three different photoresists with different sensitivity are required. In one embodiment of the present invention, an optical lithography method for the formation of T-gate or inverted L-gate structures using only one photomask is disclosed. In another embodiment, the structure for the T-gate or inverted L-gate is formed using the same type of photoresist material.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: June 4, 2013
    Inventors: Cindy X. Qiu, Ishiang Shih, Chunong Qiu, Yi-Chi Shih, Julia Qiu
  • Publication number: 20130065383
    Abstract: In high frequency circuits, the switching speed of devices is often limited by the series resistance and capacitance across the input terminals. To reduce the resistance and capacitance, the cross-section of input electrodes is made into a T-shape or inverted L-shape through lithography. The prior art method for the formation of cavities for T-gate or inverted L-gate is achieved through several steps using multiple photomasks. Often, two or even three different photoresists with different sensitivity are required. In one embodiment of the present invention, an optical lithography method for the formation of T-gate or inverted L-gate structures using only one photomask is disclosed. In another embodiment, the structure for the T-gate or inverted L-gate is formed using the same type of photoresist material.
    Type: Application
    Filed: September 12, 2011
    Publication date: March 14, 2013
    Inventors: Cindy X. Qiu, Ishiang Shih, Chunong Qiu, Yi-Chi Shih, Julia Qiu
  • Patent number: 8324037
    Abstract: The prior art method for the formation of T-gate or inverted L-gate is achieved through several lift-off processes and requires at least two different photoresists and hence two different developers. In one embodiment of the present invention, an etching method for the formation of the source, the drain and the T-gate or inverted L-gate of a compound semiconductor HEMT device is disclosed. In such a method, only one type of photoresist and developer are needed. In one other embodiment, a fabrication process for a HEMT device is disclosed to have the stem of the T-gate or the inverted L-gate defined by a dielectric cavity and its mechanical strength enhanced by a dielectric layer. In another embodiment, a fabrication process for a HEMT device is disclosed to have the stems of the source and the drain defined by dielectric cavities and their mechanical strength enhanced by a dielectric layer.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: December 4, 2012
    Inventors: Ishiang Shih, Cindy X. Qiu, Chunong Qiu, Yi-Chi Shih, Julia Qiu
  • Patent number: 8314421
    Abstract: Thin film transistors and circuits having improved mobility and stability are disclosed in this invention to have metal oxynitrides as the active channel layers. In one embodiment, the charge carrier mobility in the thin film transistors is increased by using the metal oxynitrides as the active channel layers. In another embodiment, a thin film transistor having a p-type metal oxynitride active channel layer and a thin film transistor having an n-type metal oxynitride active channel layer are fabricated to forming a CMOS circuit. In yet another embodiment, thin film transistor circuits having metal oxynitrides as the active channel layers are provided.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: November 20, 2012
    Inventors: Cindy X. Qiu, Yi-Chi Shih, Chunong Qiu, Ishiang Shih
  • Patent number: 8283221
    Abstract: The present invention provides methods for fabricating devices with low resistance structures involving a lift-off process. A radiation blocking layer is introduced between two resist layers in order to prevent intermixing of the photoresists. Cavities suitable for the formation of low resistance T-gates or L-gates can be obtained by a first exposure, developing, selective etching of blocking layer and a second exposure and developing. In another embodiment, a low resistance gate structure with pillars to enhance mechanical stability or strength is provided.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: October 9, 2012
    Inventors: Ishiang Shih, Chunong Qiu, Cindy X. Qiu, Yi-Chi Shih
  • Publication number: 20110291159
    Abstract: This invention teaches stress release metal electrodes for gate, drain and source in a field effect transistor and stress release metal electrodes for emitter, base and collector in a bipolar transistor. Due to the large difference in the thermal expansion coefficients between semiconductor materials and metal electrodes, significant strain and stresses can be induced in the devices during the fabrication and operation. The present invention provides metal electrode with stress release structures to reduce the strain and stresses in these devices.
    Type: Application
    Filed: June 1, 2010
    Publication date: December 1, 2011
    Inventors: Ishiang Shih, Cindy Xing Qiu, Chunong Qiu, Yi-Chi Shih
  • Patent number: 8013339
    Abstract: Thin film transistors and arrays having controlled threshold voltage and improved ION/IOFF ratio are provided in this invention. In one embodiment, a thin film transistor having a first gate insulator of high breakdown field with positive fixed charges and a second gate insulator with negative fixed charges is provided; said negative fixed charges substantially compensate said positive fixed charges in order to reduce threshold voltage and OFF state threshold voltage of said transistor. In another embodiment, a thin film transistor having a first passivation layer with negative fixed charges is provided, the negative charges reduce substantially unwanted negative charges in the adjacent active channel and hence reduce the OFF state current and increase ION/IOFF ratio, which in turn reduce the threshold voltage of the transistor.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: September 6, 2011
    Inventors: Ishiang Shih, Cindy X. Qiu, Chunong Qiu, Yi-Chi Shih