Abstract: An array substrate and a display device are provided. The array substrate includes a base substrate, gate lines and a metal layer on the base substrate. The metal layer is located on a side of the gate lines away from the base substrate, and includes data lines, a first connecting portion and a first electrode and a second electrode of a thin film transistor. The first electrode is electrically connected to a pixel electrode by the first connecting portion. A gate line includes a gate line pad which includes a protrusion protruding towards a pixel region relative to the portion of the gate line other than the gate line pad. The metal layer located in the pixel region includes a plurality of traces extending along at least part of a contour of the pixel region and including first traces surrounding the protrusion.

Abstract: A touch structure, a touch display panel and an electronic apparatus are provided. The touch structure includes a first touch electrode extended along a first direction and a second touch electrode extended along a second direction; the first touch electrode includes first electrode main body portions in a first conductive layer and a first connection portion in a second conductive layer; the second touch electrode includes second electrode main body portions and a second connection portion in the first conductive layer; the first connection portion is overlapped with the second connection portion in a direction perpendicular to the first conductive layer; the first conductive layer includes first metal meshes formed by first metal lines. The touch structure also includes a dummy electrode in the second conductive layer. The dummy electrode is coupled with at least one of the first connection portion and the second connection portion.

Abstract: At least one embodiment of the present disclosure provides a display panel, and the display panel includes: a first substrate and a second substrate oppositely combined with each other, the first substrate includes a base substrate, and a gate line, a first electrode, a first interlayer insulating layer, and second electrode on the base substrate; the first interlayer insulating layer includes a first via hole penetrating through the first interlayer insulating layer, the second electrode is electrically connected to the first electrode the first via hole, first support structure is provided in a region corresponding to the first via hole and on a side of the second electrode away from the base substrate; at least a part of the first support structure is located in the first via hole, an orthographic projection of the first via hole overlaps with an orthographic projection of the gate line on the base substrate.

Abstract: An array substrate and a display panel. The array substrate includes: a base substrate; a gate line and a data line on the base substrate, the gate line intersect the data line to define a pixel region; a metal oxide thin film transistor is arranged in the pixel region, the metal oxide thin film transistor includes a metal oxide semiconductor layer; the metal oxide semiconductor layer includes a first part and a second part; the first part and the data line are connected through a first via hole; the first part is in a stripe shape; a first included angle is between extension directions of the first part and the data line; an orthographic projection of the second part overlap with an orthographic projection of the gate line on the base substrate and do not overlap with an orthographic projection of the data line on the base substrate.

Abstract: A touch structure, a touch display panel and an electronic apparatus are provided. The touch structure includes a first touch electrode extended along a first direction and a second touch electrode extended along a second direction; the first touch electrode includes first electrode main body portions in a first conductive layer (201) and a first connection portion in a second conductive layer (202); the second touch electrode includes second electrode main body portions and a second connection portion in the first conductive layer; the first connection portion is overlapped with the second connection portion in a direction perpendicular to the first conductive layer; the first conductive layer includes first metal meshes formed by first metal lines. The touch structure also includes a dummy electrode in the second conductive layer. The dummy electrode is coupled with at least one of the first connection portion and the second connection portion.

Abstract: The present disclosure relates to an array substrate, a display panel, and a display device. The array substrate comprises a display area and a non-display area surrounding the display area; wherein: the display area includes gate lines and data lines, and a plurality of pixel units defined by the intersections of gate lines and data lines, each of the pixel units including a thin film transistor and a pixel electrode electrically connected to a drain electrode of the thin film transistor; the non-display area includes a plurality of dummy pixel units arranged around the display area, each of the dummy pixel units including a dummy thin film transistor and a dummy pixel electrode floating relative to a drain electrode of the dummy thin film transistor; the non-display area further includes a dummy common electrode structure electrically connected to at least some of the dummy pixel units.

Abstract: Provided an electrostatic protection circuit. The electrostatic protection circuit includes: at least one first transistor and at least one second transistor. A gate electrode and a first electrode of the first transistor are connected to a first signal line, and a second electrode of the first transistor is connected to a second signal line. A gate electrode and a first electrode of the second transistor are connected to the second signal line, and a second electrode of the second transistor is connected to the first signal line. Orthographic projection(s) of a channel and/or a first electrode of the first transistor on a main surface of the array substrate is/are within an orthographic projection of the first signal line on the main surface of the array substrate.

Abstract: The disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes a plurality of conductive lines and an electrostatic protection circuit on a base substrate. At least some of the conductive lines are connected through the electrostatic protection circuit. Two conductive lines connected with the electrostatic protection circuit are respectively a first conductive line and a second conductive line. The electrostatic protection circuit includes a first transistor, a second transistor, and a first capacitor. A first electrode of the first transistor, a first electrode of the second transistor and a gate electrode of the second transistor are connected to the second conductive line, and a second electrode of the first transistor, a second electrode of the second transistor and a gate electrode of the first transistor are connected to the first conductive line.

Abstract: An Electro-Static Discharge (ESD) protection circuit including a Thin Film Transistor (TFT) arranged between a to-be-protected signal line and a discharging line is provided, wherein a length direction of a channel of the TFT is parallel to an extension direction of the to-be-protected signal line. A display panel and a display device are also provided.

Abstract: The present disclosure relates to a driving unit, including a first driving sub-circuit, a second driving sub-circuit, and a driving control circuit. The first driving sub-circuit includes first switching elements, configured to output a first signal to the driving unit in response to a control signal from the driving control circuit. The second driving sub-circuit includes one or more second switching elements, and at least one of the second switching elements is configured to output a second signal to the driving unit in response to the control signal. The driving control circuit is configured to output the control signal at a control signal output terminal. Each of the first switching elements and second switching elements includes a transistor. Control signal input terminals of the first switching elements are coupled to the control signal output terminal through a control signal input line having a ring structure.

Abstract: A light emitting substrate and a display device are provided, the light emitting substrate includes: a base substrate; an electrode planarization layer, on the base substrate; an electrode layer, at a side of the electrode planarization layer away from the base substrate, the electrode layer includes a first electrode and a second electrode, the first electrode includes at least one first electrode strip, the second electrode includes at least one second electrode strip, the first electrode strip and the second electrode strip are spaced and alternately arranged in a first direction, each of the at least one first electrode strip and each of the at least one second electrode strip extend along a second direction, the electrode planarization layer includes a first groove between a first electrode strip and a second electrode strip which are adjacent to each other, the first groove is configured to accommodate a light emitting diode.

Abstract: A light-emitting substrate and a display device. The light-emitting substrate includes a base substrate, an electrode layer and a definition pattern layer; the electrode layer is at a side of the base substrate, and the definition pattern layer is at a side of the electrode layer away from the base substrate; the electrode layer includes a first electrode, and the definition pattern layer covers at least a part of the first electrode; the definition pattern layer includes a plurality of first openings, the plurality of first openings expose a same first electrode. Therefore, the light-emitting substrate can ensure the bonding success rate of the light-emitting substrate, and thus can further improve the product yield of the light-emitting substrate.

Abstract: An array substrate, a display panel, and a display device. The array substrate includes a substrate having a display region and a non-display region surrounding the display region. The display region includes a plurality of signal lines extending along a first direction. The non-display region includes at least three repair lead wires, and welding terminals connected to the repair lead wires in a one-to-one corresponding manner. The signal lines form overlapping regions together with an orthographic projection of at least one repair lead wire on the substrate.

Abstract: A method for manufacturing an array substrate includes: providing a base substrate; forming gate lines and data lines intercrossing each other, the gate lines and the data lines define multiple pixel units. Multiple pixel regions are formed in each pixel unit, a display electrode having a slit is formed in each pixel region. Each data line includes multiple data line segments. In each pixel unit, each of a part of the pixel regions has a display electrode whose slit is parallel to a data line segment adjacent to this pixel region; each of another part of the pixel regions has a display electrode whose slit is non-parallel to a data line segment adjacent to this pixel region. The display electrodes in each of the pixel units are located at a same side of the gate line to which the pixel unit where the display electrodes are located is coupled.

Abstract: The application provides a display substrate and a display device. The display substrate includes: gate lines, data lines, the gate lines and the data lines being arranged to intersect to define sub-pixels, every multiple sub-pixels in a same row constituting a pixel unit; and common electrode lines, each of the common electrode lines is between adjacent two of the gate lines. The display substrate further includes common voltage input line groups intersecting with the common electrode lines. Common voltage input lines in different groups are electrically connected to different ones of the common electrode lines, respectively; and an orthographic projection of every N columns of pixel units on a substrate covers an orthographic projection of a corresponding one of the common voltage input line groups on the substrate, where N is an integer greater than or equal to 1.

Abstract: The present disclosure relates to a driving unit. The driving unit may include a first driving sub-circuit, a second driving sub-circuit, and a driving control circuit. The first driving sub-circuit may include a plurality of first switching elements, and at least some of the plurality of first switching elements may be configured to output a first signal to a first output terminal of the driving unit in response to a control signal from the driving control circuit. The second driving sub-circuit may include one or more second switching elements, and at least one of the one or more second switching elements may be configured to output a second signal to a second output terminal of the driving unit in response to the control signal from the driving control circuit. The driving control circuit may be configured to output the control signal at a control signal output terminal.

Abstract: The present disclosure relates to an array substrate comprising a substrate body provided, on a perimeter edge thereof, with a sealant coating region to be coated with a sealant, and the sealant coating region comprises a first region provided with a metal trace structure, and further comprises a region provided with a metal structure, a difference between an area of the metal structure and that of the metal trace structure being smaller than a threshold.

Abstract: A display substrate includes a base substrate and an encapsulation film disposed at a first side of the base substrate. At least one corner of an edge of the encapsulation film is a rounded corner or a substantially rounded corner.

Abstract: There are provided an electrostatic protection circuit, an array substrate, and a display apparatus. The electrostatic protection circuit includes: at least one first transistor and at least one second transistor. Each of the first transistors has a gate and a second electrode both connected to an electrostatic protection line, and a first electrode connected to a signal line; and each of the second transistors has a gate and a second electrode both connected to the signal line, and a first electrode connected to the electrostatic protection line. One resistor is connected in series between a gate and a second electrode of at least one transistor in the electrostatic protection circuit.

Abstract: Disclosed is an electrostatic protection circuit, an array substrate and a display device. The electrostatic protection circuit includes a first electrostatic discharge end, a second electrostatic discharge end and a signal line connecting end; a first discharge sub-circuit coupled between the first electrostatic discharge end and the signal line connecting end; and a second discharge sub-circuit coupled between the second electrostatic discharge end and the signal line connecting end. Each of the first discharge sub-circuit and the second discharge sub-circuit comprises at least one MOSFET, and gates of all MOSFETs comprised in the first discharge sub-circuit and the second discharge sub-circuit are not coupled with any one of the first electrostatic discharge end, the second electrostatic discharge end and the signal line connecting end.