Abstract: Some embodiments of the present disclosure provide an array substrate, a display panel and a display device. The array substrate includes a test circuit located in a non-display area, wherein the test circuit includes at least one stage of subcircuit, and the subcircuit includes at least one demux; except the first stage of subcircuit, the input ends of the demuxes in the subcircuit are connected with corresponding output ends of the demuxes in the previous stage of subcircuit; except the last stage of subcircuit, the output ends of the demuxes in the subcircuit are connected with corresponding input ends of the demuxes in the next stage of subcircuit; and the input end of the demux in the first stage of subcircuit is connected with a test terminal, and the output ends of the demuxes in the last stage of subcircuit are connected with signal lines in a display area.

Abstract: An array substrate including a base substrate; a thin film transistor disposed on the base substrate, the thin film transistor including a gate electrode connected to a gate line; an active layer; a gate insulating layer insulating the gate electrode from the active layer; a first electrode connected to a data line; and a second electrode spaced apart from the first electrode; a micro light emitting diode disposed on a side of the gate insulating layer away from the base substrate, the micro light emitting diode including a first electrode, a light emitting layer and a second electrode; and a common electrode. The second electrode of the thin film transistor is connected to one of the first and second electrodes of the micro light emitting diode. The other of the first and second electrodes of the micro light emitting diode is connected to the common electrode.

Abstract: An array substrate, a display panel and a display device are disclosed. The array substrate includes a display region and a non-display region around the display region, and further includes: a first leading wire extending from the non-display region to the display region and a second leading wire extending from the non-display region to the display region. The first leading wire is between a first signal line and a first fan-out line and electrically connects the first signal line and the first fan-out line, and the second leading wire is between a second signal line and a second fan-out line and electrically connects the second signal line and the second fan-out line. The first leading wire and the second leading wire are in different layers.

Abstract: The disclosure discloses a display substrate, a display panel, and a display device. The display substrate includes a plurality of pixel units, each pixel unit includes a first sub-pixel region, a second sub-pixel region, slit electrodes and two thin film transistors, the slit electrodes include a first slit electrode and a second slit electrode corresponding respectively to the first sub-pixel region and the second sub-pixel region, where each of the first slit electrode and the second slit electrode includes at least one slit group, each slit group includes a plurality of slits arranged in a same direction, a slit extension direction and a direction of a formed electric field of one slit group of the first slit electrode are different from a slit extension direction and a direction of a formed electric field of at least one of the at least one slit group of the second slit electrode, respectively.

Abstract: An array substrate and a display device are provided. The array substrate includes a substrate, which has a display area and a periphery wiring area at the outer side of the display area of the substrate; at least one periphery wiring in the periphery wiring area; an insulating layer on a side of the periphery wiring away from the substrate, wherein a plurality of grooves is formed in the insulating layer in region corresponding to the periphery wiring area, so as to form a barrier wall with the grooves; and a conductive shielding layer on one side of the insulating layer, an orthographic projection of portions, directly facing the grooves, of the periphery wiring on the substrate is within an orthographic projection of the conductive shielding layer on the substrate.

Abstract: Provided are an array substrate and a display panel. The array substrate includes: gate lines and data lines on a substrate, the gate lines extending in a first direction, the data lines extending in a second direction, and the gate lines and the data lines crossing over each other to define pixel regions arranged in a matrix; pixel electrodes respectively in the plurality of pixel regions and on a side of the gate lines away from the substrate; common electrode lines at least partially surrounding the plurality of pixel regions; and a shielding electrode on a side of the gate lines away from the substrate and electrically connected to the common electrode lines, an orthographic projection of the shielding electrode on the substrate covering an orthographic projection of a portion, between the pixel electrodes adjacent in the second direction, of at least one of the gate lines on the substrate.

Abstract: The disclosure discloses an array substrate, a display panel, and a display device. A first power signal line is configured to be formed by electrically connecting a first signal line located in a first source-drain metal layer and a second signal line located in a second source-drain metal layer through a via hole, which is equivalent to that the first power signal line is composed of the first signal line and the second signal line connected in parallel, and the equivalent resistance of the parallel-connected first signal line and second signal line included in the first power signal line is smaller than the resistance of any of the signal lines. Thus, the resistance of the first power signal line may be effectively reduced, so that an IR drop of a display panel with an array substrate may be reduced, and the display uniformity of the display panel is improved.

Abstract: An array substrate, an embedded touch screen, and a display device. The array substrate comprises a base substrate, a touch electrode line located above the base substrate, a touch electrode located above the touch electrode line, and a first insulating layer located between the touch electrode line and the touch electrode. The touch electrode line has a groove portion, the first insulating layer has a via hole, and a connecting portion of the touch electrode extends into the groove portion through the via hole, so as to be electrically connected to the touch electrode line.

Abstract: An array substrate, a display panel, and a display device. The array substrate includes a substrate having a display region and a non-display region surrounding the display region. The display region includes a plurality of signal lines extending along a first direction. The non-display region includes at least three repair lead wires, and welding terminals connected to the repair lead wires in a one-to-one corresponding manner. The signal lines form overlapping regions together with an orthographic projection of at least one repair lead wire on the substrate.

Abstract: An array substrate and a display device are provided. The array substrate includes a substrate, which has a display area and a periphery wiring area at the outer side of the display area of the substrate; at least one periphery wiring in the periphery wiring area; an insulating layer on a side of the periphery wiring away from the substrate, wherein a plurality of grooves is formed in the insulating layer in region corresponding to the periphery wiring area, so as to form a barrier wall with the grooves; and a conductive shielding layer on one side of the insulating layer, an orthographic projection of portions, directly facing the grooves, of the periphery wiring on the substrate is within an orthographic projection of the conductive shielding layer on the substrate.

Abstract: The present disclosure relates to a driving unit. The driving unit may include a first driving sub-circuit, a second driving sub-circuit, and a driving control circuit. The first driving sub-circuit may include a plurality of first switching demerits, and at least some of the plurality of first switching elements may be configured to output a first signal to a first output terminal of the driving unit in response to a control signal from the driving control circuit. The second driving sub-circuit may include one or more second switching elements, and at least one of the one or more second switching elements may he configured to output a second signal to a second output terminal of the driving unit in response to the control signal from the driving control circuit. The driving control circuit may be configured to output the control signal at a control signal output terminal.

Abstract: The application provides a display substrate and a display device. The display substrate includes: gate lines, data lines, the gate lines and the data lines being arranged to intersect to define sub-pixels, every multiple sub-pixels in a same row constituting a pixel unit; and common electrode lines, each of the common electrode lines is between adjacent two of the gate lines. The display substrate further includes common voltage input line groups intersecting with the common electrode lines. Common voltage input lines in different groups are electrically connected to different ones of the common electrode lines, respectively; and an orthographic projection of every N columns of pixel units on a substrate covers an orthographic projection of a corresponding one of the common voltage input line groups on the substrate, where N is an integer greater than or equal to 1.

Abstract: Disclosed are a display substrate, a display panel, a display device. The display substrate includes pixel units on a substrate in form of array, gate lines in one-to-one correspondence to each row of pixel units, data lines between any two adjacent columns of pixel units and on sides, far away from the substrate, of gate lines, each pixel unit includes a pixel electrode, a thin film transistor configured to control the pixel electrode; each data line includes curved data line parts between any two pixel units, whose row directions are adjacent to each other, in two columns of pixel units on two sides of data line; each data line part includes a first part covered by a pixel electrode of pixel unit on one side of the data line part, a second part covered by a pixel electrode of pixel unit on the other side of the data line part.

Abstract: The disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate includes a plurality of conductive lines and an electrostatic protection circuit on a base substrate. At least some of the conductive lines are connected through the electrostatic protection circuit. Two conductive lines connected with the electrostatic protection circuit are respectively a first conductive line and a second conductive line. The electrostatic protection circuit includes a first transistor, a second transistor, and a first capacitor. A first electrode of the first transistor, a first electrode of the second transistor and a gate electrode of the second transistor are connected to the second conductive line, and a second electrode of the first transistor, a second electrode of the second transistor and a gate electrode of the first transistor are connected to the first conductive line.

Abstract: A thin film transistor, an array substrate, a display panel and a display device are provided, which is related to the field of display technologies. A thin film transistor comprises: a substrate; at least two active layers on the substrate, each active layer comprising a first terminal and a second terminal opposite to each other; a source and a drain above the substrate. The first terminal of each of the at least two active layers is electrically connected to the source, and the second terminal of each of the at least two active layers is electrically connected to the drain, and the at least two active layers are arranged on an upper surface of the substrate and separated from one another.

Abstract: A wiring structure includes a plurality of signal lines on the base substrate, the plurality of signal lines including a plurality of first type signal lines extending in a first direction and a second type signal line extending in a second direction crossing the first direction, the second type signal line being at first ends of the plurality of first type signal lines and spaced from the plurality of first type signal lines, and a plurality of conductive blocks, each of which is between the first ends of two corresponding adjacent signal lines of the plurality of first type signal lines. The plurality of conductive blocks are insulated from the plurality of first type signal lines and electrically connected to the second type signal line.

Abstract: A touch display substrate including: a base substrate having a plurality of pixel regions arranged in the form of an array; a common electrode layer on the base substrate, divided into a plurality of self-capacitive electrodes independent from each other, an orthogonal projection of each of the self-capacitive electrodes on the base substrate covering more than one of the pixel regions; a plurality of touch data lines, arranged in a different layer from the self-capacitive electrodes and each connected with a corresponding one of the self-capacitive electrodes, orthogonal projections of the touch data lines on the base substrate being located within gaps between the plurality of pixel regions; a touch detection chip, connected with each of the self-capacitive electrodes through a corresponding one of the touch data lines, and configured to load a common electrode signal to each of the self-capacitive electrodes in a display period through the corresponding touch data line, and to determine a touch position in

Abstract: An electrostatic protection circuit and a manufacturing method thereof, an array substrate and a display apparatus in the field of display technology are provided. This electrostatic protection circuit includes: a discharge sub-circuit, a buffer sub-circuit and an electrostatic protection line, wherein the electrostatic protection line is a common electrode line; the buffer sub-circuit includes a third transistor and a fourth transistor; a gate and a second electrode of the third transistor are both connected to a first electrode of the fourth transistor, and the first electrode of the third transistor is connected to a signal line; a gate and a second electrode of the fourth transistor are both connected to the signal line.

Abstract: An ESD protection circuit including a TFT arranged between a to-be-protected signal line and a discharging line is provided, wherein a length direction of a channel of the TFT is parallel to an extension direction of the to-be-protected signal line. A display panel and a display device are also provided.

Abstract: The present disclosure provides a package structure of a display component and a display device. The package structure of a display component includes: a base substrate, a display component arranged on a surface of the base substrate, and an package layer covering the display component, in which the package layer includes a second inorganic layer, an organic layer, and a first inorganic layer capable of reducing amount of charges to be trapped sequentially stacked along a direction toward the display component.