Patents by Inventor Chunsheng Jiang

Chunsheng Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9698278
    Abstract: There are provided a thin film transistor and a manufacturing method thereof, an array substrate, a display device. The manufacturing method includes forming a gate electrode, a gate insulating layer, a metal oxide semiconductor active layer, a source electrode and a drain electrode on a substrate. The forming the metal oxide semiconductor active layer includes forming a zinc oxide-based binary metal oxide pattern layer on a substrate. The pattern layer includes a first pattern, a second pattern and a third pattern. Metal doping ions are implanted into the zinc oxide-based binary metal oxide pattern layer by using an ion implantation technology, so that a binary metal oxide of the third pattern is transformed into a multi-element metal oxide semiconductor, and the metal oxide semiconductor active layer is formed.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: July 4, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Chunsheng Jiang
  • Patent number: 9698166
    Abstract: The present disclosure relates to the field of display technology, and provides a TFT, a method for manufacturing the TFT, an array substrate, a method for manufacturing the array substrate, and a display device. The method for manufacturing the TFT includes a step of forming a pattern including a source electrode, a drain electrode and an active layer by a single patterning process, wherein the source electrode, the drain electrode and the active layer are arranged at an identical layer, and the active layer is arranged between the source electrode and the drain electrode.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: July 4, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunsheng Jiang, Wei Liu
  • Patent number: 9691836
    Abstract: A pixel unit is used in an array substrate of a display device. In one embodiment, it comprises a gate line, a source-drain line and a thin-film transistor; and the gate line is in an overlapped structure comprising a first MoW layer, a Cu layer and a second MoW layer overlapped successively; and a gate of the thin-film transistor is formed of the first MoW layer. In another embodiment, the source-drain line is in a same overlapped structure; and a source and a drain of the thin-film transistor are formed of the first MoW layer. The first embodiment is achieved by means of a halftone process while the second embodiment is achieved by means of a lift off process. Diffusion of Cu in the gate layer or in the source-drain layer towards the oxide active layer is prevented.
    Type: Grant
    Filed: December 25, 2014
    Date of Patent: June 27, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chunsheng Jiang, Jingfei Fang, Baojiang Zhang
  • Patent number: 9679953
    Abstract: The present invention discloses a WOLED back panel and a method of manufacturing the same. The method comprises: forming a pattern of a color filter layer on a substrate; exposing the pattern of the color filter layer by halftone exposure so as to form a groove structure in the pattern of the color filter layer; forming a pattern of a resin material layer on a surface of the substrate formed with the groove structure, and heavily doping a partial region of the resin material layer so as to form a heavily doped part having a conductivity; the heavily doped partial region of the resin material layer corresponding to a pixel electrode region, a via region, and a connection region between the pixel electrode region and the via region; and forming an organic light-emitting layer and a cathode in order on a surface of the substrate after heavily doping the partial region of the resin material layer.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: June 13, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Jingfei Fang, Chunsheng Jiang, Yanzhao Li
  • Publication number: 20170162604
    Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The method includes forming a gate electrode, a gate insulating layer, a metal oxide semiconductor (MOS) active layer, a source electrode and a drain electrode on a substrate. The MOS active layer includes forming a pattern layer of indium oxide series binary metal oxide including a first pattern directly contacting with the source electrode and the drain electrode. An insulating layer formed over the source electrode and the drain electrode acts as a protection layer, the pattern layer of indium oxide series binary metal oxide is implanted with metal doping ions by using an ion implanting process, and is annealed, so that the indium oxide series binary metal oxide of the third pattern is converted into the indium oxide series multiple metal oxide to form the MOS active layer.
    Type: Application
    Filed: February 17, 2017
    Publication date: June 8, 2017
    Inventors: Ce Zhao, Chunsheng Jiang, Guangcai Yuan
  • Patent number: 9659975
    Abstract: Fabrication methods of a transparent conductive electrode (301) and an array substrate are provided. The fabrication method of the transparent conductive electrode (301) comprises: forming a sacrificial layer pattern (201) on a substrate (10) having a first region (A1) and a second region (A2) adjacent to each other, wherein the sacrificial layer pattern (201) is located in the second region (A2), and has an upper sharp corner profile formed on a side adjacent to the first region (A1); forming a transparent conductive thin-film (30) in the first region (A1) and the second region (A2) of the substrate (10) with the sacrificial layer pattern (201) formed thereon, wherein a thickness ratio of the transparent conductive thin-film (30) to the sacrificial layer pattern (201) is less than or equal to 1:1.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: May 23, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Meili Wang, Fengjuan Liu, Chunsheng Jiang
  • Publication number: 20170133403
    Abstract: The present disclose provides in some embodiments an array substrate and a method for fabricating the same, and a display device. The array substrate includes a source-drain metal layer formed on a base substrate and including copper, an alloy layer formed on the source-drain metal layer and including copper alloy, non-copper metal in the copper alloy being easier to be oxidized than copper in the copper alloy, a passivation layer formed on the alloy layer, and an oxide layer formed between the alloy layer and the passivation layer.
    Type: Application
    Filed: March 3, 2016
    Publication date: May 11, 2017
    Inventor: Chunsheng JIANG
  • Patent number: 9640553
    Abstract: A thin-film transistor (TFT), a manufacturing method thereof, an array substrate and a display device are disclosed. The method for manufacturing the a TFT comprises the step of forming a gate electrode, a gate insulating layer, an active area, a source electrode and a drain electrode on a base substrate. The active area (4) is made of a ZnON material. When the gate insulating layer is formed, a material for forming the gate insulating layer is subjected to control treatment, so that a sub-threshold amplitude of the TFT is less than or equal to 0.5 mV/dec. The manufacturing method reduces the sub-threshold amplitude of the TFT and improves the semiconductor characteristic of the TFT.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: May 2, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventor: Chunsheng Jiang
  • Patent number: 9614098
    Abstract: A thin film transistor and a manufacturing method thereof, an array substrate and a display device are provided. The method includes forming a gate electrode, a gate insulating layer, a metal oxide semiconductor (MOS) active layer, a source electrode and a drain electrode on a substrate. The MOS active layer includes forming a pattern layer of indium oxide series binary metal oxide including a first, second, and third pattern directly contacting with the source electrode and the drain electrode. An insulating layer formed over the source electrode and the drain electrode acts as a protection layer, the pattern layer of indium oxide series binary metal oxide is implanted with metal doping ions by using an ion implanting process, and is annealed, so that the indium oxide series binary metal oxide of the third pattern is converted into the indium oxide series multiple metal oxide to form the MOS active layer.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: April 4, 2017
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Ce Zhao, Chunsheng Jiang, Guangcai Yuan
  • Publication number: 20170077201
    Abstract: Embodiments of the invention provide an array substrate and a method of manufacturing the same. The method comprises: forming a gate electrode pattern, a gate insulation layer, an active layer pattern and an etching stopping layer on a substrate; forming a photoresist layer on the etching stopping layer; performing a single patterning process on the photoresist layer, such that photoresist in the first region is partially etched off, photoresist in the second region is completely etched off, and photoresist in the third region is completely remained; and performing a single etching process, such that residual photoresist in the first region and a portion of the etching stopping layer in the first region are etched off, and at the same time, a portion of the etching stopping layer and a portion of the gate insulation layer in the second region are etched off.
    Type: Application
    Filed: September 25, 2015
    Publication date: March 16, 2017
    Inventors: Jiangbo Chen, Jun Cheng, Chunsheng Jiang, Xiaodi Liu, Xiangyong Kong
  • Publication number: 20170031193
    Abstract: Embodiments of the disclosure provide a manufacturing method of a TFT array substrate, a TFT array substrate and a display device. The TFT array substrate comprises a thin film transistor and a pixel electrode formed on a base substrate, the pixel electrode is electrically connected with a drain electrode of the thin film transistor. The array substrate further comprises an light-shielding pattern provided above the thin film transistor.
    Type: Application
    Filed: October 11, 2016
    Publication date: February 2, 2017
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shi SHU, Guanbao HUI, Teng YE, Chunsheng JIANG, Cuili GAI
  • Publication number: 20170025491
    Abstract: An embodiment of the present disclosure provides an organic electroluminescent transistor array substrate, including a substrate, and a gate layer, a gate insulating layer, a semiconductor layer, a source layer, a pixel defining layer, an electroluminescent layer and a drain layer formed on the substrate, wherein, the source layer and the drain layer are located in different levels, the source layer includes plural source electrode units corresponding to sub-pixel units respectively, the pixel defining layer includes plural pixel defining units corresponding to the source electrode units respectively, and the respective source electrode units are embedded within the pixel defining units corresponding thereto.
    Type: Application
    Filed: June 2, 2016
    Publication date: January 26, 2017
    Inventors: Xuyuan Li, Liqiang Chen, Chunsheng Jiang, Changcheng Xu
  • Publication number: 20160372603
    Abstract: A thin film transistor and a fabrication method thereof, an array substrate and a display device are provided. The thin film transistor includes: an active layer, a source-drain metal layer and a diffusion blocking layer located between the active layer and the source-drain metal layer, wherein, the source-drain metal layer includes a source electrode and a drain electrode; the diffusion blocking layer includes a source blocking part corresponding to a position of the source electrode and a drain blocking part corresponding to a position of the drain electrode; and the diffusion blocking layer is doped with different concentrations of nitrogen from a side close to the source-drain metal layer to a side close to the active layer.
    Type: Application
    Filed: August 14, 2015
    Publication date: December 22, 2016
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Wei Liu, Chunsheng Jiang, Lung Pao Hsin
  • Publication number: 20160365361
    Abstract: A thin film transistor, a pixel structure, an array substrate, a display device, a method for manufacturing a thin film transistor, and a method for manufacturing a pixel structure are disclosed. The thin film transistor includes a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode. Since the first passivation layer as insulation material is doped with the ions to form an active layer, the etching stop layer may be omitted, thereby simplifying the structure of the thin film transistor.
    Type: Application
    Filed: September 8, 2015
    Publication date: December 15, 2016
    Inventor: Chunsheng Jiang
  • Publication number: 20160359054
    Abstract: The present invention provides an array substrate and a method of fabricating the same, a display panel and a display device. The array substrate array substrate includes a thin film transistor and a zinc oxide layer provided above and/or below an active layer of the thin film transistor, and a vertical projection of the zinc oxide layer on the array substrate is at least overlapped with the vertical projection of the active layer on the array substrate The zinc oxide layer has good absorption on UV light, so that adverse effects of UV light irradiation on a threshold voltage of the TFT of the array substrate are effectively avoided.
    Type: Application
    Filed: November 11, 2015
    Publication date: December 8, 2016
    Inventors: Jingang FANG, Yanzhao LI, Chunsheng JIANG, Wulin SHEN
  • Patent number: 9508762
    Abstract: Embodiments of the present invention disclose an array substrate, a method of manufacturing an array substrate and a display device, which belong to field of display technology.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: November 29, 2016
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wei Liu, Chunsheng Jiang
  • Publication number: 20160343864
    Abstract: A thin-film transistor and a manufacturing method thereof, an array substrate and a manufacturing method thereof, and a display apparatus are provided. The method for manufacturing the TFT includes: forming a gate electrode, a gate insulating layer, a metal oxide semiconductor active layer, a source electrode and a drain electrode on a substrate; the forming the metal oxide semiconductor active layer includes: forming the metal oxide semiconductor active layer by electrochemical reaction. The method for manufacturing the TFT is applied in the production of the TFT and the array substrate and the display apparatus comprising the TFTs and provides a new method for forming the metal oxide semiconductor active layer.
    Type: Application
    Filed: June 19, 2015
    Publication date: November 24, 2016
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Chunsheng JIANG, Xuyuan LI, Wei LIU
  • Patent number: 9494837
    Abstract: Embodiments of the disclosure provide a manufacturing method of a TFT array substrate, a TFT array substrate and a display device. The method comprises steps of: S1. forming a thin film transistor on a base substrate; S2. forming a passivation layer thin film on the base substrate after the step S1; S3. forming a passivation layer via hole and a light-shielding pattern on the base substrate after the step S2; and S4. forming a color filter layer and a pixel electrode on the base substrate after the step S3. The pixel electrode is electrically connected to a drain electrode of the thin film transistor through the passivation layer via hole, and the color filter layer is in correspondence with a position of the pixel electrode.
    Type: Grant
    Filed: April 18, 2013
    Date of Patent: November 15, 2016
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Shi Shu, Guanbao Hui, Teng Ye, Chunsheng Jiang, Cuili Gai
  • Publication number: 20160300869
    Abstract: Embodiments of the present invention disclose an array substrate, a method of manufacturing an array substrate and a display device, which belong to field of display technology.
    Type: Application
    Filed: March 14, 2016
    Publication date: October 13, 2016
    Inventors: Wei Liu, Chunsheng Jiang
  • Publication number: 20160300955
    Abstract: The present invention discloses a thin film transistor, a method of manufacturing the thin film transistor, a display substrate and a display apparatus.
    Type: Application
    Filed: August 19, 2014
    Publication date: October 13, 2016
    Inventors: Jingfei FANG, Chunsheng JIANG