Patents by Inventor Chwen Yu

Chwen Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9214212
    Abstract: A magnetic-assist, spin-torque transfer magnetic tunnel junction device and a method for performing a magnetic-assist, spin-torque-transfer write to the device are disclosed. In an exemplary embodiment, the magnetic tunnel junction device includes a first electrode, a pinned layer disposed on the first electrode, a free layer disposed on the pinned layer, and a barrier layer disposed between the pinned layer and the free layer. The device further includes a second electrode electrically coupled to the free layer, the second electrode containing a magnetic assist region. In some embodiments, the magnetic assist region is configured to produce a net magnetic field when supplied with a write current. The net magnetic field is aligned to assist a spin-torque transfer of the write current on the free layer.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: December 15, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chwen Yu
  • Patent number: 8952330
    Abstract: System and method for EMI shielding for a CD-SEM are described. One embodiment is a scanning electron microscope (“SEM”) comprising an electron gun for producing an electron beam directed toward a sample; a secondary electron (“SE”) detector for detecting secondary electrons reflected from the sample in response to the electron beam; and a dual-layer shield disposed around and enclosing the SE detector. The shield comprises a magnetic shielding lamina layer and a metallic foil layer.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: February 10, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chi Tsao, Syun-Jie Jhan, Yi-Cheng Shih, Chwen Yu
  • Patent number: 8884386
    Abstract: A magnetoresistive random access memory (MRAM) device and a method of manufacture are provided. The MRAM device comprises a magnetic pinned layer, a compound GMR structure acting as a free layer, and a non-magnetic barrier layer separating the pinned and GMR layers. The barrier layer is provided to reduce the magnetic coupling of the free layer and GMR structure, as well as provide a resistive state (high or low) for retaining binary data (0 or 1) in the device. The GMR structure provides physical electrode connectivity for set/clear memory functionality which is separated from the physical electrode connectivity for the read functionality for the memory device.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Wei Chiang, Chwen Yu, Ya-Chen Kao
  • Publication number: 20140252513
    Abstract: A Magnetoresistive Tunnel Junction (MTJ) device includes an elongated MTJ structure formed onto a substrate, the MTJ structure including a magnetic reference layer and a tunnel barrier layer. The MTJ device also includes a number of discrete free magnetic regions disposed onto the tunnel barrier layer. The ratio of length to width of the elongated MTJ structure is such that the magnetic field of the magnetic reference layer is pinned in a single direction.
    Type: Application
    Filed: March 9, 2013
    Publication date: September 11, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chwen Yu, Kai-Wen Cheng, Tien-Wei Chiang, Dong Cheng Chen
  • Publication number: 20140153324
    Abstract: A magnetic-assist, spin-torque transfer magnetic tunnel junction device and a method for performing a magnetic-assist, spin-torque-transfer write to the device are disclosed. In an exemplary embodiment, the magnetic tunnel junction device includes a first electrode, a pinned layer disposed on the first electrode, a free layer disposed on the pinned layer, and a barrier layer disposed between the pinned layer and the free layer. The device further includes a second electrode electrically coupled to the free layer, the second electrode containing a magnetic assist region. In some embodiments, the magnetic assist region is configured to produce a net magnetic field when supplied with a write current. The net magnetic field is aligned to assist a spin-torque transfer of the write current on the free layer.
    Type: Application
    Filed: December 3, 2012
    Publication date: June 5, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, LTD
    Inventor: Chwen Yu
  • Publication number: 20140131652
    Abstract: A Magnetoresistive Tunnel Junction (MTJ) includes a magnetic reference layer disposed between a first electrode and a resistive layer. The junction also includes a magnetic free layer disposed between the resistive layer and a second electrode. The surface area of the free layer is less than the surface area of the reference layer.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 15, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Chwen Yu
  • Publication number: 20140124667
    Abstract: System and method for EMI shielding for a CD-SEM are described. One embodiment is a scanning electron microscope (“SEM”) comprising an electron gun for producing an electron beam directed toward a sample; a secondary electron (“SE”) detector for detecting secondary electrons reflected from the sample in response to the electron beam; and a dual-layer shield disposed around and enclosing the SE detector. The shield comprises a magnetic shielding lamina layer and a metallic foil layer.
    Type: Application
    Filed: January 17, 2014
    Publication date: May 8, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chi Tsao, Syun-Jie Jhan, Yi-Cheng Shih, Chwen Yu
  • Patent number: 8709267
    Abstract: Methods for patterning material layers, which may be implemented in forming integrated circuit device features, are disclosed. In an example, a method includes forming a first resist layer over a material layer; forming a second resist layer over the first resist layer; forming an opening that extends through the second resist layer and the first resist layer to expose the material layer, wherein the opening has a substantially constant width in the second resist layer and a tapered width in the first resist layer; and performing a tilt-angle deposition process to form a feature over the exposed material layer.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: April 29, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chwen Yu, Fei-Gwo Tsai, Kai-Wen Cheng
  • Patent number: 8633439
    Abstract: System and method for EMI shielding for a CD-SEM are described. One embodiment is a scanning electron microscope (“SEM”) comprising an electron gun for producing an electron beam directed toward a sample; a secondary electron (“SE”) detector for detecting secondary electrons reflected from the sample in response to the electron beam; and a dual-layer shield disposed around and enclosing the SE detector. The shield comprises a magnetic shielding lamina layer and a metallic foil layer.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: January 21, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chi Tsao, Syun-Jie Jhan, Yi-Cheng Shih, Chwen Yu
  • Patent number: 8629356
    Abstract: A magnetic field shielding raised floor panel having a plurality of grain-oriented electrical steel (GOES) sections. The orientation of each GOES section is parallel to a top surface of the section. The plurality of GOES sections can include sidewall and lip portions. The plurality of GOES sections can be perforated to permit air flow through the GOES section. Openings in adjacent perforated GOES sections do not substantially overlap.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: January 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chwen Yu, Yung-Ti Hung, Kuo-An Yeh, Tzu-Sou Chuang, Chien-Teh Huang
  • Patent number: 8624338
    Abstract: An apparatus, method for manufacturing the apparatus, and method for processing a substrate using the apparatus are disclosed. An exemplary apparatus includes a substrate having a plurality of cells, wherein each cell includes a cell structure. The cell structure includes a piezoelectric film portion and a tip disposed over the piezoelectric film portion. The tip is physically coupled with the piezoelectric film portion.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: January 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Fei-Gwo Tsai, Chwen Yu
  • Publication number: 20130228882
    Abstract: Methods and apparatuses for a magnetic tunnel junction (MTJ) which can be used in as a magnetic random access memory cell are disclosed. The MTJ comprises a free layer and an insulator layer. The MTJ further comprises a pinned layer with a first region, a second region, and a third region. The second region is of a first length and of a first thickness, and the first region and the third region are of a second length and of a second thickness. A ratio of the first thickness to the second thickness may be larger than 1.2. A ratio of the second length to the first length is larger than 0.5. The first thickness may be larger than a spin diffusion length of a material for the pinned layer. So formed MTJ results in increased tunneling magnetic resistance ratio and reduced critical switch current of the MTJ.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 5, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Wen Cheng, Chwen Yu, Chih-Ming Chen
  • Publication number: 20130200475
    Abstract: A magnetoresistive random access memory (MRAM) device and a method of manufacture are provided. The MRAM device comprises a magnetic pinned layer, a compound GMR structure acting as a free layer, and a non-magnetic barrier layer separating the pinned and GMR layers. The barrier layer is provided to reduce the magnetic coupling of the free layer and GMR structure, as well as provide a resistive state (high or low) for retaining binary data (0 or 1) in the device. The GMR structure provides physical electrode connectivity for set/clear memory functionality which is separated from the physical electrode connectivity for the read functionality for the memory device.
    Type: Application
    Filed: February 2, 2012
    Publication date: August 8, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Wei Chiang, Chwen Yu, Ya-Chen Kao
  • Patent number: 8477531
    Abstract: A semiconductor memory device includes a magnetic tunneling junction (MTJ); and a magnetic feature aligned with the MTJ and approximate the MTJ. When viewed in a direction perpendicular to the MTJ and the magnetic feature, the magnetic feature has a disk shape, and the MTJ has an elliptical shape and is positioned within the disk shape.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: July 2, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chwen Yu, Tien-Wei Chiang
  • Patent number: 8471598
    Abstract: The present disclosure provides for magnetic logic devices and methods of operating such a device. In one embodiment, the device includes a bottom electrode configured to receive a first input current and a second input current, a bottom magnetic layer disposed over the bottom electrode, a nonmagnetic layer disposed over the bottom magnetic layer, a top magnetic layer disposed over the nonmagnetic layer, and a top electrode disposed over the top magnetic layer, the top electrode and the bottom electrode configured to provide an output voltage which is dependent on the first and second input currents and which follows an AND gate logic or an OR gate logic.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: June 25, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chwen Yu, Kai-Wen Cheng, Tien-Wei Chiang
  • Publication number: 20130153285
    Abstract: A magnetic field shielding raised floor panel having a plurality of grain-oriented electrical steel (GOES) sections. The orientation of each GOES section is parallel to a top surface of the section. The plurality of GOES sections can include sidewall and lip portions. The plurality of GOES sections can be perforated to permit air flow through the GOES section. Openings in adjacent perforated GOES sections do not substantially overlap.
    Type: Application
    Filed: December 16, 2011
    Publication date: June 20, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chwen YU, Yung-Ti HUNG, Kuo-An YEH, Tzu-Sou CHUANG, Chien-Teh HUANG
  • Publication number: 20130146996
    Abstract: The present disclosure provides for magnetic devices and methods of fabricating such a device. In one embodiment, a magnetic device includes a first elliptical pillar of first material layers; a second elliptical pillar concentrically disposed over the first elliptical pillar, the second elliptical pillar includes second material layers. The second elliptical pillar is smaller than the first elliptical pillar in size.
    Type: Application
    Filed: December 8, 2011
    Publication date: June 13, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chwen Yu, Tien-Wei Chiang, Kai-Wen Cheng
  • Publication number: 20130023121
    Abstract: Methods for patterning material layers, which may be implemented in forming integrated circuit device features, are disclosed. In an example, a method includes forming a first resist layer over a material layer; forming a second resist layer over the first resist layer; forming an opening that extends through the second resist layer and the first resist layer to expose the material layer, wherein the opening has a substantially constant width in the second resist layer and a tapered width in the first resist layer; and performing a tilt-angle deposition process to form a feature over the exposed material layer.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 24, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chwen Yu, Fei-Gwo Tsai, Kai-Wen Cheng
  • Publication number: 20130001419
    Abstract: System and method for EMI shielding for a CD-SEM are described. One embodiment is a scanning electron microscope (“SEM”) comprising an electron gun for producing an electron beam directed toward a sample; a secondary electron (“SE”) detector for detecting secondary electrons reflected from the sample in response to the electron beam; and a dual-layer shield disposed around and enclosing the SE detector. The shield comprises a magnetic shielding lamina layer and a metallic foil layer.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 3, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Chi Tsao, Syun-Jie Jhan, Yi-Cheng Shih, Chwen Yu
  • Publication number: 20120319732
    Abstract: The present disclosure provides for magnetic logic devices and methods of operating such a device. In one embodiment, the device includes a bottom electrode configured to receive a first input current and a second input current, a bottom magnetic layer disposed over the bottom electrode, a nonmagnetic layer disposed over the bottom magnetic layer, a top magnetic layer disposed over the nonmagnetic layer, and a top electrode disposed over the top magnetic layer, the top electrode and the bottom electrode configured to provide an output voltage which is dependent on the first and second input currents and which follows an AND gate logic or an OR gate logic.
    Type: Application
    Filed: June 16, 2011
    Publication date: December 20, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chwen Yu, Kai-Wen Cheng, Tai-Wei Chiang