Patents by Inventor Conor O'Keeffe

Conor O'Keeffe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120287978
    Abstract: A method for processing at least one polarization type of at least one wireless signal by a communication unit operably couplable to an antenna arrangement that comprises at least two orthogonally polarized antenna elements. The method comprises processing at least one signal radiated by at least one first antenna element of the antenna arrangement; and processing the at least one signal where processing comprises at least applying at least one digital complex scaling operation on the at least one signal radiated by at least one second antenna element of orthogonal polarization to the at least one first antenna element of the antenna arrangement thereby radiating at least one wireless signal of at least one non-native polarization type.
    Type: Application
    Filed: December 8, 2010
    Publication date: November 15, 2012
    Inventors: Conor O'Keeffe, Joe Moore
  • Patent number: 8310362
    Abstract: A method of processing location information on a mobile device which includes a primary receiver for receiving a primary signal; a diversity receiver for receiving a diversity signal or location information; a diversity combiner which can combine primary and diversity signals to form a combined signal; and a first processing unit for processing the combined signal; the method comprising the steps of: identifying whether the device is in a location mode or a diversity mode; if the device is in location mode, disabling the diversity combiner; passing the output from the primary receiver directly to the first processing unit; and passing location information from the diversity receiver to a location processing unit.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: November 13, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Norman Beamish, Wayne Edwards, Aidan Murphy, Hugh O Brien, Conor O'Keeffe, Patrick Pratt, David Redmond, Daniel B Schwartz, Keith Tilley
  • Patent number: 8306172
    Abstract: A wireless communication device comprises a number of sub-systems and clock generation logic arranged to generate at least one clock signal to be applied to the number of sub-systems. One of the number of sub-systems comprises sampling logic for receiving input data and performing initial sampling on an input data bit using multiple separated phases of a clock period of the at least one clock signal applied to the sampling logic thereby producing multiple phase separated sampled outputs of the input data bit. The sampling logic is configured to perform a number of re-sampling operations on the multiple phase separated sampled outputs at a number of intermediate phases thereby producing multiple phase separated intermediate sampled outputs prior to performing a final sample of the multiple phase separated intermediate sampled outputs at a single phase of the at least one clock signal to produce a sampled input data signal.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: November 6, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Paul Kelleher, Diarmuid McSwiney, Conor O'Keeffe, Emilio Quiroga, Samir Soni
  • Publication number: 20120196591
    Abstract: A wireless network element is operably couplable to an antenna array for communicating with at least one remote wireless communication unit. The antenna array comprises a plurality of radiating elements where at least one first radiating element of the plurality of radiating elements is arranged to create a radiation pattern in a sector of a communication cell. The wireless network element comprises a receiver arranged to receive and process at least one signal from the at least one remote wireless communication unit via the at least one first radiating element. The wireless network element also comprises a beam scanning module for stepping/sweeping the radiation pattern through the sector of the communication cell, such that at least one signal from the at least one remote wireless communication unit is processed to identify signal parameters representative of incoming signal power and angle of arrival of the received at least one signal.
    Type: Application
    Filed: June 15, 2010
    Publication date: August 2, 2012
    Inventors: Conor O'Keeffe, Joe Moore
  • Patent number: 8175548
    Abstract: Methods and device for transmitting a sequence of transmission bursts in a wireless device. The method includes transmitting a sequence of transmission bursts according to a transmission schedule. The method is characterized by: receiving, at a radio frequency integrated circuit, prior to a transmission of at least one transmission burst of the sequence, information representative of the timing of the transmission of the at least one transmission burst; and generating timing signals, by the radio frequency integrated circuit that implement the transmission schedule. A wireless device includes a base band integrated circuit adapted to determine a transmission schedule of a sequence of transmission bursts. The wireless device is characterized by including a radio frequency integrated circuit that is adapted receive information representative of the timing schedule and to autonomously control a transmission of the sequence of transmission bursts.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: May 8, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Conor O'Keeffe, Denis Dineen, Paul Kelleher
  • Patent number: 8126101
    Abstract: A communications device comprises a receiver for receiving an input signal operably coupled to analogue to digital converter logic. The analogue to digital converter logic is operably coupled to control logic via a signal analyzer arranged to analyze a converted received input signal, output from the analogue to digital converter logic to determine at least one characteristic of the received signal. The control logic is arranged to vary a dynamic range of the analogue to digital converter logic depending on the at least one determined characteristic of the received input signal.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: February 28, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Norman Beamish, Alan Bannon, Anthony Dunne, Conor O'Keeffe
  • Publication number: 20120044917
    Abstract: A wireless communication system comprises a network element (315) operably coupled to an antenna array for communicating with a remote wireless communication unit (305). The antenna array comprises a plurality of radiating elements where at least one first radiating element of the plurality of radiating elements is arranged to create a radiation pattern that comprises a sector beam (405). The plurality of radiating elements comprises at least one second radiating element arranged to create a major portion of at least one sub-sector beam (420, 425, 430) within the sector beam (405).
    Type: Application
    Filed: February 10, 2010
    Publication date: February 23, 2012
    Inventor: Conor O'Keeffe
  • Publication number: 20120027066
    Abstract: A method for calibrating (700) an antenna array comprises a plurality of antenna elements coupled to a plurality of respective receive paths in a wireless communication system. The method comprises, in receive mode, applying a test signal to an individual single receive path (715) of the plurality of receive paths; and feeding back the test signal via a switched coupler network. The method further comprises running a receive calibration measurement routine to determine at least one measurement value used to calibrate the individual signal receive path and waiting for at least one converged measurement value; and extracting (720) the converged measurement value for at least one individual receive path. The steps of applying, running, extracting for a next individual single receive path are repeated until the calibration routine has completed (725).
    Type: Application
    Filed: February 10, 2010
    Publication date: February 2, 2012
    Inventor: Conor O'Keeffe
  • Publication number: 20120026998
    Abstract: A network element for a wireless communication system is locatable to couple at least one base station to an antenna array. The network element comprises at least one receiver arranged to receive a radio frequency signal from the at least one base station or the antenna array and modem logic operably coupled to the at least one receiver. The modem logic comprises radio frequency conversion circuitry arranged to down-convert a received radio frequency signal to a baseband signal; analogue-to-digital conversion logic arranged to convert the baseband signal to digitized signals; and beam-form processing logic arranged to perform active beam-forming adjustment on the digitized signals.
    Type: Application
    Filed: February 12, 2010
    Publication date: February 2, 2012
    Inventors: Conor O'Keeffe, Joe Moore
  • Publication number: 20120020392
    Abstract: A network element for a wireless communication system is locatable to couple at least one base station to an antenna array comprising a plurality of antenna elements. The network element comprises a plurality of independent transceiver circuits coupled to at least one of a plurality of respective antenna elements of the antenna array; and logic arranged to apply at least one complex digital signal to at least one transceiver signal path of a transceiver circuit of the plurality of independent transceiver circuits. A feedback path is arranged to provide feedback of the at least one complex digital signal such that it is capable of facilitating determination of latency mismatch error response between at least two transceiver signal paths. Adjustment means comprises delay logic arranged to receive a complex digital signal and provide a modified representation of the received complex digital signal in response to the latency mismatch error response of the at least two transceiver signal path.
    Type: Application
    Filed: February 10, 2010
    Publication date: January 26, 2012
    Inventors: Conor O'Keeffe, Michael William O'Brien
  • Patent number: 8094755
    Abstract: A modulation system can switch between two modulation modes. In order to comply with limits on peak power in spectral bands outside the RF operating one the transmitter is required to ramp down to a condition of minimal power. To avoid fixed ramping and trailing bits, the transmitting signal is subjected to FIR filtering. The two FIR filters are primed with a sequence using a parallel input mode before serially entering the information data.
    Type: Grant
    Filed: July 4, 2005
    Date of Patent: January 10, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Conor O'Keeffe, Robert O'Sullivan, Patrick Pratt
  • Publication number: 20110182335
    Abstract: A calibration signal generator for use in a balancing circuit calibration device in a radio receiver, the calibration signal generator comprising: a means of amplifying a clocking signal from a clocking signal generator to provide a first calibration signal; a means of generating a second calibration signal from the clocking signal, the first and second calibration signals being transmissible to a one or more mixing circuits in the balancing circuit calibration device; and a means synchronising the operation of other circuit elements in the balancing circuit calibration device with the clocking signal; characterised in that the clocking signal generator is present in the radio receiver and used therein for other functions.
    Type: Application
    Filed: January 22, 2007
    Publication date: July 28, 2011
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Patrick J. Pratt, Hari Thirumoorthy, Conor O'Keeffe
  • Publication number: 20110164624
    Abstract: A semiconductor device comprising interface logic for transmitting data bursts across an interface. The interface logic is arranged to transmit bursts of data across the interface such that the start of a burst of data is substantially aligned with a symbol interval (SI) boundary. The interface logic is further arranged to apply an offset to the SI boundary at the start of the burst of data.
    Type: Application
    Filed: September 5, 2008
    Publication date: July 7, 2011
    Applicant: Freescale Semiconductor Inc.
    Inventors: Paul Kelleher, Michael O'brien, Conor O'keeffe
  • Publication number: 20110167185
    Abstract: A semiconductor device comprising an interface logic module for transmitting data frames across an interface, and controller logic module arranged to control a rate at which the interface logic transmits data across the interface. Upon receipt of data frames to transmit across the interface, the controller logic module is arranged to determine a sequence of data rates with which to transmit sequential data frames across the interface, and to configure the transmission of the data frames across the interface according to the determined data rate sequence. The selection of these data rates will be dependent on specific critical RF frequencies where EMI impacts have to be minimized.
    Type: Application
    Filed: September 4, 2008
    Publication date: July 7, 2011
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Michael O'brien, Paul Kelleher, Conor O'keeffe
  • Publication number: 20110142169
    Abstract: An electronic device comprises a number of sub-systems coupled via an interface. One of the number of sub-systems comprises logic for receiving a frame of input data having a plurality of phases on respective data paths. The electronic device further comprises logic for performing cross correlation on the received input data with a pre-determined bit pattern, operably coupled to selection logic, for selecting a single phase from the plurality of phases sent to the interface to sample the received input data in a middle region of a data bit period in response to the cross correlation.
    Type: Application
    Filed: January 9, 2007
    Publication date: June 16, 2011
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Paul Kelleher, Diarmuid McSwiney, Conor O'keeffe
  • Publication number: 20110043253
    Abstract: A semiconductor device comprises sampling logic, comprising: input sample path selection logic arranged to enable at least one input sample path; sampler logic arranged to receive and sample an input data signal in a serial data stream in accordance with a phase of the at least one enabled input sample path; and transition detection logic arranged to detect transitions within the received input data signal. The input sample path selection logic is further arranged, upon detection of a transition within the received input data signal, to determine if the phase of the at least one input sample path is a phase having a largest window between logic values; and if it is determined that the phase of the at least one input sample path is not the phase having a largest window between logic values, to enable at least one input sample path comprising a more appropriate phase.
    Type: Application
    Filed: May 19, 2008
    Publication date: February 24, 2011
    Inventors: Conor O'Keeffe, Kiyoshi Kase, Paul Kelleher
  • Publication number: 20110007847
    Abstract: Receiver circuitry for processing a received Very Low Intermediate Frequency signal wherein the receiver circuitry comprises a main processing path. The main processing path comprises mixing circuitry arranged to mix a received VLIF signal with a frequency down conversion signal to produce a main path signal. The receiver circuitry further comprises a direct current cancellation path comprising mixing circuitry arranged to mix a DC element of the received VLIF signal with the frequency down conversion signal to produce a DC cancellation signal. The receiver circuitry still further comprises signal summing circuitry arranged to add the DC cancellation signal in anti-phase with the main path signal.
    Type: Application
    Filed: March 19, 2008
    Publication date: January 13, 2011
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Conor O'Keeffe, Norman Beamish, Richard Verellen
  • Publication number: 20100298035
    Abstract: A wireless communication unit comprises a transmitter having a power amplifier and a feedback path operably coupled to the power amplifier. The feedback path comprises a coupler for feeding back a portion of a signal to be transmitted and a detector for detecting a power level of the fed back signal. A controller provides a ramp signal to the power amplifier that controls an amplitude characteristic of the signal to be transmitted. Averaging logic is operably coupled to the detector and arranged to average the detected power level over a first period. Comparison logic is operably coupled to the averaging logic and arranged to compare the average detected power level with a reference value. The controller is operably coupled to the comparison logic and arranged to scale a ramp signal applied to the power amplifier in response to the comparison.
    Type: Application
    Filed: August 9, 2007
    Publication date: November 25, 2010
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Norman Beamish, Conor O'Keeffe, Patrick Pratt, David Redmond, Jacques Trichet
  • Patent number: 7840189
    Abstract: A wireless communication device comprises a frequency generation circuit employing a crystal oscillator operably coupled to a fractional-based synthesiser and a voltage-controlled oscillator. The fractional-based synthesiser utilises a ratio between an integer value and a fractional value to set a radio frequency signal of the voltage-controlled oscillator. An automatic frequency control scaling sub-system is operably coupled to a fractional-based synthesiser and configured to receive and use an AFC word to frequency scale the fractional value in a multiplicative manner to set a radio frequency supported by the fractional-based synthesiser. Preferably, an automatic frequency generation sub-system utilises Absolute Radio Frequency Channel Number and the cyclical nature of the fractional value. In this manner, a saving on hardware and software overheads associated with frequency channel selection for fractional-N type synthesizers can be made.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: November 23, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Paul Kelleher, Conor O'Keeffe
  • Publication number: 20100203919
    Abstract: A master radiofrequency integrated circuit (RF IC) and a slave radiofrequency integrated circuit include a master radiofrequency module and a slave radiofrequency module, respectively. Both RF ICs include a radiofrequency side contact connectable to an antenna, for receiving radiofrequency signals, via the antenna, from a wireless communications network and a baseband side contact connected to the radiofrequency module and connectable to a contact of a baseband integrated circuit, for transmitting the baseband signals from the master radiofrequency module to the baseband integrated circuit. The RF module is connected to the radiofrequency side contact, for converting the radiofrequency signals into baseband signals. The master radiofrequency module includes a slave control unit for controlling the slave radiofrequency module.
    Type: Application
    Filed: August 9, 2007
    Publication date: August 12, 2010
    Inventors: Paul Kelleher, Michael Crowley, Conor O'Keeffe